1 /* $NetBSD: uslsareg.h,v 1.1 2012/01/14 21:06:01 jakllsch Exp $ */ 2 3 /* 4 * Copyright (c) 2011 Jonathan A. Kollasch. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 */ 28 29 #ifndef _SLSAREG_H_ 30 #define _SLSAREG_H_ 31 32 #include <lib/libkern/libkern.h> 33 #include <sys/systm.h> 34 #include <sys/types.h> 35 36 /* From Silicon Laboratories Application Note AN571 */ 37 38 #define SLSA_FREQ 3686400 39 40 /* USB Control Requests */ 41 #define SLSA_R_IFC_ENABLE 0x00 42 #define SLSA_R_SET_BAUDDIV 0x01 43 #define SLSA_R_GET_BAUDDIV 0x02 44 #define SLSA_R_SET_LINE_CTL 0x03 45 #define SLSA_R_GET_LINE_CTL 0x04 46 #define SLSA_R_SET_BREAK 0x05 47 #define SLSA_R_IMM_CHAR 0x06 48 #define SLSA_R_SET_MHS 0x07 49 #define SLSA_R_GET_MDMSTS 0x08 50 #define SLSA_R_SET_XON 0x09 51 #define SLSA_R_SET_XOFF 0x0a 52 #define SLSA_R_SET_EVENTMASK 0x0b 53 #define SLSA_R_GET_EVENTMASK 0x0c 54 #define SLSA_R_SET_CHAR 0x0d 55 #define SLSA_R_GET_CHARS 0x0e 56 #define SLSA_R_GET_PROPS 0x0f 57 #define SLSA_R_GET_COMM_STATUS 0x10 58 #define SLSA_R_RESET 0x11 59 #define SLSA_R_PURGE 0x12 60 #define SLSA_R_SET_FLOW 0x13 61 #define SLSA_R_GET_FLOW 0x14 62 #define SLSA_R_EMBED_EVENTS 0x15 63 #define SLSA_R_SET_CHARS 0x19 64 #define SLSA_R_GET_BAUDRATE 0x1d 65 #define SLSA_R_SET_BAUDRATE 0x1e 66 #define SLSA_R_VENDOR_SPECIFIC 0xff 67 68 69 #define SLSA_RV_IFC_ENABLE_DISABLE 0x0000 70 #define SLSA_RV_IFC_ENABLE_ENABLE 0x0001 71 72 73 #define SLSA_RV_BAUDDIV(b) (SLSA_FREQ/(b)) 74 75 76 #define SLSA_RV_LINE_CTL_STOP __BITS(3,0) 77 #define SLSA_RV_LINE_CTL_PARITY __BITS(7,4) 78 #define SLSA_RV_LINE_CTL_LEN __BITS(15,8) 79 80 #define SLSA_RV_LINE_CTL_STOP_1 __SHIFTIN(0, SLSA_RV_LINE_CTL_STOP) 81 #define SLSA_RV_LINE_CTL_STOP_1_5 __SHIFTIN(1, SLSA_RV_LINE_CTL_STOP) 82 #define SLSA_RV_LINE_CTL_STOP_2 __SHIFTIN(2, SLSA_RV_LINE_CTL_STOP) 83 84 #define SLSA_RV_LINE_CTL_PARITY_NONE __SHIFTIN(0, SLSA_RV_LINE_CTL_PARITY) 85 #define SLSA_RV_LINE_CTL_PARITY_ODD __SHIFTIN(1, SLSA_RV_LINE_CTL_PARITY) 86 #define SLSA_RV_LINE_CTL_PARITY_EVEN __SHIFTIN(2, SLSA_RV_LINE_CTL_PARITY) 87 #define SLSA_RV_LINE_CTL_PARITY_MARK __SHIFTIN(3, SLSA_RV_LINE_CTL_PARITY) 88 #define SLSA_RV_LINE_CTL_PARITY_SPACE __SHIFTIN(4, SLSA_RV_LINE_CTL_PARITY) 89 90 #define SLSA_RV_LINE_CTL_LEN_5 __SHIFTIN(5, SLSA_RV_LINE_CTL_LEN) 91 #define SLSA_RV_LINE_CTL_LEN_6 __SHIFTIN(6, SLSA_RV_LINE_CTL_LEN) 92 #define SLSA_RV_LINE_CTL_LEN_7 __SHIFTIN(7, SLSA_RV_LINE_CTL_LEN) 93 #define SLSA_RV_LINE_CTL_LEN_8 __SHIFTIN(8, SLSA_RV_LINE_CTL_LEN) 94 95 96 #define SLSA_RV_SET_BREAK_DISABLE 0x0000 97 #define SLSA_RV_SET_BREAK_ENABLE 0x0001 98 99 100 #define SLSA_RV_SET_MHS_DTR __BIT(0) 101 #define SLSA_RV_SET_MHS_RTS __BIT(1) 102 /* AN571 calls these next two masks, they're more like change-enables */ 103 #define SLSA_RV_SET_MHS_DTR_MASK __BIT(8) 104 #define SLSA_RV_SET_MHS_RTS_MASK __BIT(9) 105 106 107 #define SLSA_RL_GET_MDMSTS 1 108 /* data in uint8_t returned from GET_MDMSTS */ 109 #define SLSA_MDMSTS_DTR __BIT(0) 110 #define SLSA_MDMSTS_RTS __BIT(1) 111 #define SLSA_MDMSTS_CTS __BIT(4) 112 #define SLSA_MDMSTS_DSR __BIT(5) 113 #define SLSA_MDMSTS_RI __BIT(6) 114 #define SLSA_MDMSTS_DCD __BIT(7) 115 116 117 #define SLSA_RL_SET_EVENTMASK 0 118 #define SLSA_RL_GET_EVENTMASK 2 119 #define SLSA_RL_GET_EVENTSTATE 2 120 #define SLSA_EVENT_TERI __BIT(0) /* RI trailing edge */ 121 #define SLSA_EVENT_RB80 __BIT(2) /* Rx buf 80% full */ 122 #define SLSA_EVENT_CR __BIT(8) /* char received */ 123 #define SLSA_EVENT_SCR __BIT(9) /* special char received */ 124 #define SLSA_EVENT_TQE __BIT(10) /* Tx queue empty */ 125 #define SLSA_EVENT_DCTS __BIT(11) /* CTS changed */ 126 #define SLSA_EVENT_DDSR __BIT(12) /* DSR changed */ 127 #define SLSA_EVENT_DDCD __BIT(13) /* DCD changed */ 128 #define SLSA_EVENT_BI __BIT(14) /* line break received */ 129 #define SLSA_EVENT_LSE __BIT(15) /* line status error */ 130 131 132 /* USETW2(wValue, char, index) */ 133 #define SLSA_RV_SET_CHAR_EofChar 0 134 #define SLSA_RV_SET_CHAR_ErrorChar 1 135 #define SLSA_RV_SET_CHAR_BreakChar 2 136 #define SLSA_RV_SET_CHAR_EventChar 3 137 #define SLSA_RV_SET_CHAR_XonChar 4 138 #define SLSA_RV_SET_CHAR_XoffChar 5 139 140 141 #define SLSA_RV_PURGE_TX __BIT(0) 142 #define SLSA_RV_PURGE_RX __BIT(1) 143 #define SLSA_RV_PURGE_TX1 __BIT(2) /* what's the second set for? */ 144 #define SLSA_RV_PURGE_RX1 __BIT(3) 145 146 147 /* Communication Properties Response Table 7. */ 148 struct slsa_cpr { 149 uint16_t wLength; 150 uint16_t bcdVersion; 151 uint32_t ulServiceMask; 152 uint32_t _reserved8; 153 uint32_t ulMaxTxQueue; 154 uint32_t ulMaxRxQueue; 155 uint32_t ulMaxBaud; 156 uint32_t ulProvSubType; 157 uint32_t ulProvCapabilities; 158 uint32_t ulSettableParams; 159 uint32_t ulSettableBaud; 160 uint16_t wSettableData; 161 uint16_t _reserved42; 162 uint32_t ulCurrentTxQueue; 163 uint32_t ulCurrentRxQueue; 164 uint32_t _reserved52; 165 uint32_t _reserved56; 166 uint16_t uniProvName[0]; 167 }; 168 CTASSERT(offsetof(struct slsa_cpr, _reserved8) == 8); 169 CTASSERT(offsetof(struct slsa_cpr, _reserved42) == 42); 170 CTASSERT(offsetof(struct slsa_cpr, uniProvName[0]) == 60); 171 #define SLSA_CPR_MINLEN 60 172 173 #define SLSA_RL_GET_COMM_STATUS 19 174 /* Serial Status Response Table 8. */ 175 struct slsa_ssr { 176 uint32_t ulErrors; 177 uint32_t ulHoldReasons; 178 uint32_t ulAmountInInQueue; 179 uint32_t ulAmountInOutQueue; 180 uint8_t bEofReceived; 181 uint8_t bWaitForImmediate; 182 uint8_t bReserved; 183 }; 184 CTASSERT(offsetof(struct slsa_ssr, bReserved) == 18); 185 CTASSERT(sizeof(struct slsa_ssr) >= SLSA_RL_GET_COMM_STATUS); 186 187 #define SLSA_RL_SET_FLOW 16 188 #define SLSA_RL_GET_FLOW 16 189 /* Flow Control State Setting/Response Table 9. */ 190 struct slsa_fcs { 191 uint32_t ulControlHandshake; 192 #define SERIAL_DTR_MASK __BITS(0, 1) 193 #define SERIAL_CTS_HANDSHAKE __BIT(3) 194 #define SERIAL_DSR_HANDSHAKE __BIT(4) 195 #define SERIAL_DCD_HANDSHAKE __BIT(5) 196 #define SERIAL_DSR_SENSITIVITY __BIT(6) 197 uint32_t ulFlowReplace; 198 #define SERIAL_AUTO_TRANSMIT __BIT(0) 199 #define SERIAL_AUTO_RECEIVE __BIT(1) 200 #define SERIAL_ERROR_CHAR __BIT(2) 201 #define SERIAL_NULL_STRIPPING __BIT(3) 202 #define SERIAL_BREAK_CHAR __BIT(4) 203 #define SERIAL_RTS_MASK __BITS(6, 7) 204 #define SERIAL_XOFF_CONTINUE __BIT(31) 205 uint32_t ulXonLimit; 206 uint32_t ulXoffLimit; 207 }; 208 CTASSERT(sizeof(struct slsa_fcs) == SLSA_RL_SET_FLOW); 209 CTASSERT(sizeof(struct slsa_fcs) == SLSA_RL_GET_FLOW); 210 211 #define SLSA_RL_SET_CHARS 6 212 #define SLSA_RL_GET_CHARS 6 213 /* Special Characters Response Table 12. */ 214 struct slsa_scr { 215 uint8_t bEofChar; 216 uint8_t bErrorChar; 217 uint8_t bBreakChar; 218 uint8_t bEventChar; 219 uint8_t bXonChar; 220 uint8_t bXoffChar; 221 }; 222 CTASSERT(sizeof(struct slsa_scr) == SLSA_RL_SET_CHARS); 223 CTASSERT(sizeof(struct slsa_scr) == SLSA_RL_GET_CHARS); 224 225 226 #define SLSA_RV_VENDOR_SPECIFIC_READ_LATCH 0x00c2 227 #define SLSA_RL_VENDOR_SPECIFIC_READ_LATCH 1 228 229 #define SLSA_RV_VENDOR_SPECIFIC_WRITE_LATCH 0x37e1 230 /* 231 * on CP2103/CP2104 the latch state and latch mask are 232 * written in the high and low bytes of wIndex respectively 233 * 234 * on CP2105, wIndex is the interface number, and the same 235 * latch/mask is written as data instead. 236 */ 237 #define SLSA_RL_VENDOR_SPECIFIC_WRITE_LATCH_CP2103 0 238 #define SLSA_RL_VENDOR_SPECIFIC_WRITE_LATCH_CP2105 2 239 240 #endif /* _SLSAREG_H_ */ 241