1 /* $NetBSD: if_mue.c,v 1.83 2022/10/31 21:22:06 andvar Exp $ */
2 /* $OpenBSD: if_mue.c,v 1.3 2018/08/04 16:42:46 jsg Exp $ */
3
4 /*
5 * Copyright (c) 2018 Kevin Lo <kevlo@openbsd.org>
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 /* Driver for Microchip LAN7500/LAN7800 chipsets. */
21
22 #include <sys/cdefs.h>
23 __KERNEL_RCSID(0, "$NetBSD: if_mue.c,v 1.83 2022/10/31 21:22:06 andvar Exp $");
24
25 #ifdef _KERNEL_OPT
26 #include "opt_usb.h"
27 #include "opt_inet.h"
28 #endif
29
30 #include <sys/param.h>
31
32 #include <dev/usb/usbnet.h>
33
34 #include <dev/usb/if_muereg.h>
35 #include <dev/usb/if_muevar.h>
36
37 #define MUE_PRINTF(un, fmt, args...) \
38 device_printf((un)->un_dev, "%s: " fmt, __func__, ##args);
39
40 #ifdef USB_DEBUG
41 int muedebug = 0;
42 #define DPRINTF(un, fmt, args...) \
43 do { \
44 if (muedebug) \
45 MUE_PRINTF(un, fmt, ##args); \
46 } while (0 /* CONSTCOND */)
47 #else
48 #define DPRINTF(un, fmt, args...) __nothing
49 #endif
50
51 /*
52 * Various supported device vendors/products.
53 */
54 struct mue_type {
55 struct usb_devno mue_dev;
56 uint16_t mue_flags;
57 #define LAN7500 0x0001 /* LAN7500 */
58 #define LAN7800 0x0002 /* LAN7800 */
59 #define LAN7801 0x0004 /* LAN7801 */
60 #define LAN7850 0x0008 /* LAN7850 */
61 };
62
63 static const struct mue_type mue_devs[] = {
64 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7500 }, LAN7500 },
65 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7505 }, LAN7500 },
66 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7800 }, LAN7800 },
67 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7801 }, LAN7801 },
68 { { USB_VENDOR_SMSC, USB_PRODUCT_SMSC_LAN7850 }, LAN7850 }
69 };
70
71 #define MUE_LOOKUP(uaa) ((const struct mue_type *)usb_lookup(mue_devs, \
72 uaa->uaa_vendor, uaa->uaa_product))
73
74 #define MUE_ENADDR_LO(enaddr) \
75 ((enaddr[3] << 24) | (enaddr[2] << 16) | (enaddr[1] << 8) | enaddr[0])
76 #define MUE_ENADDR_HI(enaddr) \
77 ((enaddr[5] << 8) | enaddr[4])
78
79 static int mue_match(device_t, cfdata_t, void *);
80 static void mue_attach(device_t, device_t, void *);
81
82 static uint32_t mue_csr_read(struct usbnet *, uint32_t);
83 static int mue_csr_write(struct usbnet *, uint32_t, uint32_t);
84 static int mue_wait_for_bits(struct usbnet *, uint32_t, uint32_t,
85 uint32_t, uint32_t);
86 static uint8_t mue_eeprom_getbyte(struct usbnet *, int, uint8_t *);
87 static bool mue_eeprom_present(struct usbnet *);
88 static void mue_dataport_write(struct usbnet *, uint32_t, uint32_t,
89 uint32_t, uint32_t *);
90 static void mue_init_ltm(struct usbnet *);
91 static int mue_chip_init(struct usbnet *);
92 static void mue_set_macaddr(struct usbnet *);
93 static int mue_get_macaddr(struct usbnet *, prop_dictionary_t);
94 static int mue_prepare_tso(struct usbnet *, struct mbuf *);
95 static void mue_uno_mcast(struct ifnet *);
96 static void mue_sethwcsum_locked(struct usbnet *);
97 static void mue_setmtu_locked(struct usbnet *);
98 static void mue_reset(struct usbnet *);
99
100 static void mue_uno_stop(struct ifnet *, int);
101 static int mue_uno_ioctl(struct ifnet *, u_long, void *);
102 static int mue_uno_mii_read_reg(struct usbnet *, int, int, uint16_t *);
103 static int mue_uno_mii_write_reg(struct usbnet *, int, int, uint16_t);
104 static void mue_uno_mii_statchg(struct ifnet *);
105 static void mue_uno_rx_loop(struct usbnet *, struct usbnet_chain *,
106 uint32_t);
107 static unsigned mue_uno_tx_prepare(struct usbnet *, struct mbuf *,
108 struct usbnet_chain *);
109 static int mue_uno_init(struct ifnet *);
110
111 static const struct usbnet_ops mue_ops = {
112 .uno_stop = mue_uno_stop,
113 .uno_ioctl = mue_uno_ioctl,
114 .uno_mcast = mue_uno_mcast,
115 .uno_read_reg = mue_uno_mii_read_reg,
116 .uno_write_reg = mue_uno_mii_write_reg,
117 .uno_statchg = mue_uno_mii_statchg,
118 .uno_tx_prepare = mue_uno_tx_prepare,
119 .uno_rx_loop = mue_uno_rx_loop,
120 .uno_init = mue_uno_init,
121 };
122
123 #define MUE_SETBIT(un, reg, x) \
124 mue_csr_write(un, reg, mue_csr_read(un, reg) | (x))
125
126 #define MUE_CLRBIT(un, reg, x) \
127 mue_csr_write(un, reg, mue_csr_read(un, reg) & ~(x))
128
129 #define MUE_WAIT_SET(un, reg, set, fail) \
130 mue_wait_for_bits(un, reg, set, ~0, fail)
131
132 #define MUE_WAIT_CLR(un, reg, clear, fail) \
133 mue_wait_for_bits(un, reg, 0, clear, fail)
134
135 #define ETHER_IS_VALID(addr) \
136 (!ETHER_IS_MULTICAST(addr) && !ETHER_IS_ZERO(addr))
137
138 #define ETHER_IS_ZERO(addr) \
139 (!(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]))
140
141 CFATTACH_DECL_NEW(mue, sizeof(struct usbnet), mue_match, mue_attach,
142 usbnet_detach, usbnet_activate);
143
144 static uint32_t
mue_csr_read(struct usbnet * un,uint32_t reg)145 mue_csr_read(struct usbnet *un, uint32_t reg)
146 {
147 usb_device_request_t req;
148 usbd_status err;
149 uDWord val;
150
151 if (usbnet_isdying(un))
152 return 0;
153
154 USETDW(val, 0);
155 req.bmRequestType = UT_READ_VENDOR_DEVICE;
156 req.bRequest = MUE_UR_READREG;
157 USETW(req.wValue, 0);
158 USETW(req.wIndex, reg);
159 USETW(req.wLength, 4);
160
161 err = usbd_do_request(un->un_udev, &req, &val);
162 if (err) {
163 MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err));
164 return 0;
165 }
166
167 return UGETDW(val);
168 }
169
170 static int
mue_csr_write(struct usbnet * un,uint32_t reg,uint32_t aval)171 mue_csr_write(struct usbnet *un, uint32_t reg, uint32_t aval)
172 {
173 usb_device_request_t req;
174 usbd_status err;
175 uDWord val;
176
177 if (usbnet_isdying(un))
178 return 0;
179
180 USETDW(val, aval);
181 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
182 req.bRequest = MUE_UR_WRITEREG;
183 USETW(req.wValue, 0);
184 USETW(req.wIndex, reg);
185 USETW(req.wLength, 4);
186
187 err = usbd_do_request(un->un_udev, &req, &val);
188 if (err) {
189 MUE_PRINTF(un, "reg = %#x: %s\n", reg, usbd_errstr(err));
190 return -1;
191 }
192
193 return 0;
194 }
195
196 static int
mue_wait_for_bits(struct usbnet * un,uint32_t reg,uint32_t set,uint32_t clear,uint32_t fail)197 mue_wait_for_bits(struct usbnet *un, uint32_t reg,
198 uint32_t set, uint32_t clear, uint32_t fail)
199 {
200 uint32_t val;
201 int ntries;
202
203 for (ntries = 0; ntries < 1000; ntries++) {
204 if (usbnet_isdying(un))
205 return 1;
206 val = mue_csr_read(un, reg);
207 if ((val & set) || !(val & clear))
208 return 0;
209 if (val & fail)
210 return 1;
211 usbd_delay_ms(un->un_udev, 1);
212 }
213
214 return 1;
215 }
216
217 static int
mue_uno_mii_read_reg(struct usbnet * un,int phy,int reg,uint16_t * val)218 mue_uno_mii_read_reg(struct usbnet *un, int phy, int reg, uint16_t *val)
219 {
220 uint32_t data;
221
222 if (un->un_phyno != phy) {
223 *val = 0;
224 return EINVAL;
225 }
226
227 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
228 MUE_PRINTF(un, "not ready\n");
229 *val = 0;
230 return EBUSY;
231 }
232
233 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_READ |
234 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
235 MUE_MII_ACCESS_PHYADDR(phy));
236
237 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
238 MUE_PRINTF(un, "timed out\n");
239 *val = 0;
240 return ETIMEDOUT;
241 }
242
243 data = mue_csr_read(un, MUE_MII_DATA);
244 *val = data & 0xffff;
245
246 return 0;
247 }
248
249 static int
mue_uno_mii_write_reg(struct usbnet * un,int phy,int reg,uint16_t val)250 mue_uno_mii_write_reg(struct usbnet *un, int phy, int reg, uint16_t val)
251 {
252
253 if (un->un_phyno != phy)
254 return EINVAL;
255
256 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
257 MUE_PRINTF(un, "not ready\n");
258 return EBUSY;
259 }
260
261 mue_csr_write(un, MUE_MII_DATA, val);
262 mue_csr_write(un, MUE_MII_ACCESS, MUE_MII_ACCESS_WRITE |
263 MUE_MII_ACCESS_BUSY | MUE_MII_ACCESS_REGADDR(reg) |
264 MUE_MII_ACCESS_PHYADDR(phy));
265
266 if (MUE_WAIT_CLR(un, MUE_MII_ACCESS, MUE_MII_ACCESS_BUSY, 0)) {
267 MUE_PRINTF(un, "timed out\n");
268 return ETIMEDOUT;
269 }
270
271 return 0;
272 }
273
274 static void
mue_uno_mii_statchg(struct ifnet * ifp)275 mue_uno_mii_statchg(struct ifnet *ifp)
276 {
277 struct usbnet * const un = ifp->if_softc;
278 struct mii_data * const mii = usbnet_mii(un);
279 uint32_t flow, threshold;
280
281 if (usbnet_isdying(un))
282 return;
283
284 if ((mii->mii_media_status & (IFM_ACTIVE | IFM_AVALID)) ==
285 (IFM_ACTIVE | IFM_AVALID)) {
286 switch (IFM_SUBTYPE(mii->mii_media_active)) {
287 case IFM_10_T:
288 case IFM_100_TX:
289 case IFM_1000_T:
290 usbnet_set_link(un, true);
291 break;
292 default:
293 break;
294 }
295 }
296
297 /* Lost link, do nothing. */
298 if (!usbnet_havelink(un)) {
299 DPRINTF(un, "mii_media_status = %#x\n", mii->mii_media_status);
300 return;
301 }
302
303 if (!(un->un_flags & LAN7500)) {
304 if (un->un_udev->ud_speed == USB_SPEED_SUPER) {
305 if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
306 /* Disable U2 and enable U1. */
307 MUE_CLRBIT(un, MUE_USB_CFG1,
308 MUE_USB_CFG1_DEV_U2_INIT_EN);
309 MUE_SETBIT(un, MUE_USB_CFG1,
310 MUE_USB_CFG1_DEV_U1_INIT_EN);
311 } else {
312 /* Enable U1 and U2. */
313 MUE_SETBIT(un, MUE_USB_CFG1,
314 MUE_USB_CFG1_DEV_U1_INIT_EN |
315 MUE_USB_CFG1_DEV_U2_INIT_EN);
316 }
317 }
318 }
319
320 flow = 0;
321 /* XXX Linux does not check IFM_FDX flag for 7800. */
322 if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
323 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_TXPAUSE)
324 flow |= MUE_FLOW_TX_FCEN | MUE_FLOW_PAUSE_TIME;
325 if (IFM_OPTIONS(mii->mii_media_active) & IFM_ETH_RXPAUSE)
326 flow |= MUE_FLOW_RX_FCEN;
327 }
328
329 /* XXX Magic numbers taken from Linux driver. */
330 if (un->un_flags & LAN7500)
331 threshold = 0x820;
332 else
333 switch (un->un_udev->ud_speed) {
334 case USB_SPEED_SUPER:
335 threshold = 0x817;
336 break;
337 case USB_SPEED_HIGH:
338 threshold = 0x211;
339 break;
340 default:
341 threshold = 0;
342 break;
343 }
344
345 /* Threshold value should be set before enabling flow. */
346 mue_csr_write(un, (un->un_flags & LAN7500) ?
347 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, threshold);
348 mue_csr_write(un, MUE_FLOW, flow);
349
350 DPRINTF(un, "done\n");
351 }
352
353 static uint8_t
mue_eeprom_getbyte(struct usbnet * un,int off,uint8_t * dest)354 mue_eeprom_getbyte(struct usbnet *un, int off, uint8_t *dest)
355 {
356 uint32_t val;
357
358 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY, 0)) {
359 MUE_PRINTF(un, "not ready\n");
360 return ETIMEDOUT;
361 }
362
363 KASSERT((off & ~MUE_E2P_CMD_ADDR_MASK) == 0);
364 mue_csr_write(un, MUE_E2P_CMD, MUE_E2P_CMD_READ | MUE_E2P_CMD_BUSY |
365 off);
366
367 if (MUE_WAIT_CLR(un, MUE_E2P_CMD, MUE_E2P_CMD_BUSY,
368 MUE_E2P_CMD_TIMEOUT)) {
369 MUE_PRINTF(un, "timed out\n");
370 return ETIMEDOUT;
371 }
372
373 val = mue_csr_read(un, MUE_E2P_DATA);
374 *dest = val & 0xff;
375
376 return 0;
377 }
378
379 static int
mue_read_eeprom(struct usbnet * un,uint8_t * dest,int off,int cnt)380 mue_read_eeprom(struct usbnet *un, uint8_t *dest, int off, int cnt)
381 {
382 uint32_t val = 0; /* XXX gcc */
383 uint8_t byte;
384 int i, err = 0;
385
386 /*
387 * EEPROM pins are muxed with the LED function on LAN7800 device.
388 */
389 if (un->un_flags & LAN7800) {
390 val = mue_csr_read(un, MUE_HW_CFG);
391 mue_csr_write(un, MUE_HW_CFG,
392 val & ~(MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN));
393 }
394
395 for (i = 0; i < cnt; i++) {
396 err = mue_eeprom_getbyte(un, off + i, &byte);
397 if (err)
398 break;
399 *(dest + i) = byte;
400 }
401
402 if (un->un_flags & LAN7800)
403 mue_csr_write(un, MUE_HW_CFG, val);
404
405 return err ? 1 : 0;
406 }
407
408 static bool
mue_eeprom_present(struct usbnet * un)409 mue_eeprom_present(struct usbnet *un)
410 {
411 uint32_t val;
412 uint8_t sig;
413 int ret;
414
415 if (un->un_flags & LAN7500) {
416 val = mue_csr_read(un, MUE_E2P_CMD);
417 return val & MUE_E2P_CMD_LOADED;
418 } else {
419 ret = mue_read_eeprom(un, &sig, MUE_E2P_IND_OFFSET, 1);
420 return (ret == 0) && (sig == MUE_E2P_IND);
421 }
422 }
423
424 static int
mue_read_otp_raw(struct usbnet * un,uint8_t * dest,int off,int cnt)425 mue_read_otp_raw(struct usbnet *un, uint8_t *dest, int off, int cnt)
426 {
427 uint32_t val;
428 int i, err;
429
430 val = mue_csr_read(un, MUE_OTP_PWR_DN);
431
432 /* Checking if bit is set. */
433 if (val & MUE_OTP_PWR_DN_PWRDN_N) {
434 /* Clear it, then wait for it to be cleared. */
435 mue_csr_write(un, MUE_OTP_PWR_DN, 0);
436 err = MUE_WAIT_CLR(un, MUE_OTP_PWR_DN, MUE_OTP_PWR_DN_PWRDN_N,
437 0);
438 if (err) {
439 MUE_PRINTF(un, "not ready\n");
440 return 1;
441 }
442 }
443
444 /* Start reading the bytes, one at a time. */
445 for (i = 0; i < cnt; i++) {
446 mue_csr_write(un, MUE_OTP_ADDR1,
447 ((off + i) >> 8) & MUE_OTP_ADDR1_MASK);
448 mue_csr_write(un, MUE_OTP_ADDR2,
449 ((off + i) & MUE_OTP_ADDR2_MASK));
450 mue_csr_write(un, MUE_OTP_FUNC_CMD, MUE_OTP_FUNC_CMD_READ);
451 mue_csr_write(un, MUE_OTP_CMD_GO, MUE_OTP_CMD_GO_GO);
452
453 err = MUE_WAIT_CLR(un, MUE_OTP_STATUS, MUE_OTP_STATUS_BUSY, 0);
454 if (err) {
455 MUE_PRINTF(un, "timed out\n");
456 return 1;
457 }
458 val = mue_csr_read(un, MUE_OTP_RD_DATA);
459 *(dest + i) = (uint8_t)(val & 0xff);
460 }
461
462 return 0;
463 }
464
465 static int
mue_read_otp(struct usbnet * un,uint8_t * dest,int off,int cnt)466 mue_read_otp(struct usbnet *un, uint8_t *dest, int off, int cnt)
467 {
468 uint8_t sig;
469 int err;
470
471 if (un->un_flags & LAN7500)
472 return 1;
473
474 err = mue_read_otp_raw(un, &sig, MUE_OTP_IND_OFFSET, 1);
475 if (err)
476 return 1;
477 switch (sig) {
478 case MUE_OTP_IND_1:
479 break;
480 case MUE_OTP_IND_2:
481 off += 0x100;
482 break;
483 default:
484 DPRINTF(un, "OTP not found\n");
485 return 1;
486 }
487 err = mue_read_otp_raw(un, dest, off, cnt);
488 return err;
489 }
490
491 static void
mue_dataport_write(struct usbnet * un,uint32_t sel,uint32_t addr,uint32_t cnt,uint32_t * data)492 mue_dataport_write(struct usbnet *un, uint32_t sel, uint32_t addr,
493 uint32_t cnt, uint32_t *data)
494 {
495 uint32_t i;
496
497 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
498 MUE_PRINTF(un, "not ready\n");
499 return;
500 }
501
502 mue_csr_write(un, MUE_DP_SEL,
503 (mue_csr_read(un, MUE_DP_SEL) & ~MUE_DP_SEL_RSEL_MASK) | sel);
504
505 for (i = 0; i < cnt; i++) {
506 mue_csr_write(un, MUE_DP_ADDR, addr + i);
507 mue_csr_write(un, MUE_DP_DATA, data[i]);
508 mue_csr_write(un, MUE_DP_CMD, MUE_DP_CMD_WRITE);
509 if (MUE_WAIT_SET(un, MUE_DP_SEL, MUE_DP_SEL_DPRDY, 0)) {
510 MUE_PRINTF(un, "timed out\n");
511 return;
512 }
513 }
514 }
515
516 static void
mue_init_ltm(struct usbnet * un)517 mue_init_ltm(struct usbnet *un)
518 {
519 uint32_t idx[MUE_NUM_LTM_INDEX] = { 0, 0, 0, 0, 0, 0 };
520 uint8_t temp[2];
521 size_t i;
522
523 if (mue_csr_read(un, MUE_USB_CFG1) & MUE_USB_CFG1_LTM_ENABLE) {
524 if (mue_eeprom_present(un) &&
525 (mue_read_eeprom(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0)) {
526 if (temp[0] != sizeof(idx)) {
527 DPRINTF(un, "EEPROM: unexpected size\n");
528 goto done;
529 }
530 if (mue_read_eeprom(un, (uint8_t *)idx, temp[1] << 1,
531 sizeof(idx))) {
532 DPRINTF(un, "EEPROM: failed to read\n");
533 goto done;
534 }
535 DPRINTF(un, "success\n");
536 } else if (mue_read_otp(un, temp, MUE_E2P_LTM_OFFSET, 2) == 0) {
537 if (temp[0] != sizeof(idx)) {
538 DPRINTF(un, "OTP: unexpected size\n");
539 goto done;
540 }
541 if (mue_read_otp(un, (uint8_t *)idx, temp[1] << 1,
542 sizeof(idx))) {
543 DPRINTF(un, "OTP: failed to read\n");
544 goto done;
545 }
546 DPRINTF(un, "success\n");
547 } else
548 DPRINTF(un, "nothing to do\n");
549 } else
550 DPRINTF(un, "nothing to do\n");
551 done:
552 for (i = 0; i < __arraycount(idx); i++)
553 mue_csr_write(un, MUE_LTM_INDEX(i), idx[i]);
554 }
555
556 static int
mue_chip_init(struct usbnet * un)557 mue_chip_init(struct usbnet *un)
558 {
559 uint32_t val;
560
561 if ((un->un_flags & LAN7500) &&
562 MUE_WAIT_SET(un, MUE_PMT_CTL, MUE_PMT_CTL_READY, 0)) {
563 MUE_PRINTF(un, "not ready\n");
564 return ETIMEDOUT;
565 }
566
567 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_LRST);
568 if (MUE_WAIT_CLR(un, MUE_HW_CFG, MUE_HW_CFG_LRST, 0)) {
569 MUE_PRINTF(un, "timed out\n");
570 return ETIMEDOUT;
571 }
572
573 /* Respond to the IN token with a NAK. */
574 if (un->un_flags & LAN7500)
575 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BIR);
576 else
577 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BIR);
578
579 if (un->un_flags & LAN7500) {
580 if (un->un_udev->ud_speed == USB_SPEED_HIGH)
581 val = MUE_7500_HS_RX_BUFSIZE /
582 MUE_HS_USB_PKT_SIZE;
583 else
584 val = MUE_7500_FS_RX_BUFSIZE /
585 MUE_FS_USB_PKT_SIZE;
586 mue_csr_write(un, MUE_7500_BURST_CAP, val);
587 mue_csr_write(un, MUE_7500_BULKIN_DELAY,
588 MUE_7500_DEFAULT_BULKIN_DELAY);
589
590 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_BCE | MUE_HW_CFG_MEF);
591
592 /* Set FIFO sizes. */
593 val = (MUE_7500_MAX_RX_FIFO_SIZE - 512) / 512;
594 mue_csr_write(un, MUE_7500_FCT_RX_FIFO_END, val);
595 val = (MUE_7500_MAX_TX_FIFO_SIZE - 512) / 512;
596 mue_csr_write(un, MUE_7500_FCT_TX_FIFO_END, val);
597 } else {
598 /* Init LTM. */
599 mue_init_ltm(un);
600
601 val = MUE_7800_RX_BUFSIZE;
602 switch (un->un_udev->ud_speed) {
603 case USB_SPEED_SUPER:
604 val /= MUE_SS_USB_PKT_SIZE;
605 break;
606 case USB_SPEED_HIGH:
607 val /= MUE_HS_USB_PKT_SIZE;
608 break;
609 default:
610 val /= MUE_FS_USB_PKT_SIZE;
611 break;
612 }
613 mue_csr_write(un, MUE_7800_BURST_CAP, val);
614 mue_csr_write(un, MUE_7800_BULKIN_DELAY,
615 MUE_7800_DEFAULT_BULKIN_DELAY);
616
617 MUE_SETBIT(un, MUE_HW_CFG, MUE_HW_CFG_MEF);
618 MUE_SETBIT(un, MUE_USB_CFG0, MUE_USB_CFG0_BCE);
619
620 /*
621 * Set FCL's RX and TX FIFO sizes: according to data sheet this
622 * is already the default value. But we initialize it to the
623 * same value anyways, as that's what the Linux driver does.
624 */
625 val = (MUE_7800_MAX_RX_FIFO_SIZE - 512) / 512;
626 mue_csr_write(un, MUE_7800_FCT_RX_FIFO_END, val);
627 val = (MUE_7800_MAX_TX_FIFO_SIZE - 512) / 512;
628 mue_csr_write(un, MUE_7800_FCT_TX_FIFO_END, val);
629 }
630
631 /* Enabling interrupts. */
632 mue_csr_write(un, MUE_INT_STATUS, ~0);
633
634 mue_csr_write(un, (un->un_flags & LAN7500) ?
635 MUE_7500_FCT_FLOW : MUE_7800_FCT_FLOW, 0);
636 mue_csr_write(un, MUE_FLOW, 0);
637
638 /* Reset PHY. */
639 MUE_SETBIT(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST);
640 if (MUE_WAIT_CLR(un, MUE_PMT_CTL, MUE_PMT_CTL_PHY_RST, 0)) {
641 MUE_PRINTF(un, "PHY not ready\n");
642 return ETIMEDOUT;
643 }
644
645 /* LAN7801 only has RGMII mode. */
646 if (un->un_flags & LAN7801)
647 MUE_CLRBIT(un, MUE_MAC_CR, MUE_MAC_CR_GMII_EN);
648
649 if ((un->un_flags & (LAN7500 | LAN7800)) ||
650 !mue_eeprom_present(un)) {
651 /* Allow MAC to detect speed and duplex from PHY. */
652 MUE_SETBIT(un, MUE_MAC_CR, MUE_MAC_CR_AUTO_SPEED |
653 MUE_MAC_CR_AUTO_DUPLEX);
654 }
655
656 MUE_SETBIT(un, MUE_MAC_TX, MUE_MAC_TX_TXEN);
657 MUE_SETBIT(un, (un->un_flags & LAN7500) ?
658 MUE_7500_FCT_TX_CTL : MUE_7800_FCT_TX_CTL, MUE_FCT_TX_CTL_EN);
659
660 MUE_SETBIT(un, (un->un_flags & LAN7500) ?
661 MUE_7500_FCT_RX_CTL : MUE_7800_FCT_RX_CTL, MUE_FCT_RX_CTL_EN);
662
663 /* Set default GPIO/LED settings only if no EEPROM is detected. */
664 if ((un->un_flags & LAN7500) && !mue_eeprom_present(un)) {
665 MUE_CLRBIT(un, MUE_LED_CFG, MUE_LED_CFG_LED10_FUN_SEL);
666 MUE_SETBIT(un, MUE_LED_CFG,
667 MUE_LED_CFG_LEDGPIO_EN | MUE_LED_CFG_LED2_FUN_SEL);
668 }
669
670 /* XXX We assume two LEDs at least when EEPROM is missing. */
671 if (un->un_flags & LAN7800 &&
672 !mue_eeprom_present(un))
673 MUE_SETBIT(un, MUE_HW_CFG,
674 MUE_HW_CFG_LED0_EN | MUE_HW_CFG_LED1_EN);
675
676 return 0;
677 }
678
679 static void
mue_set_macaddr(struct usbnet * un)680 mue_set_macaddr(struct usbnet *un)
681 {
682 struct ifnet * const ifp = usbnet_ifp(un);
683 const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
684 uint32_t lo, hi;
685
686 lo = MUE_ENADDR_LO(enaddr);
687 hi = MUE_ENADDR_HI(enaddr);
688
689 mue_csr_write(un, MUE_RX_ADDRL, lo);
690 mue_csr_write(un, MUE_RX_ADDRH, hi);
691 }
692
693 static int
mue_get_macaddr(struct usbnet * un,prop_dictionary_t dict)694 mue_get_macaddr(struct usbnet *un, prop_dictionary_t dict)
695 {
696 prop_data_t eaprop;
697 uint32_t low, high;
698
699 if (!(un->un_flags & LAN7500)) {
700 low = mue_csr_read(un, MUE_RX_ADDRL);
701 high = mue_csr_read(un, MUE_RX_ADDRH);
702 un->un_eaddr[5] = (uint8_t)((high >> 8) & 0xff);
703 un->un_eaddr[4] = (uint8_t)((high) & 0xff);
704 un->un_eaddr[3] = (uint8_t)((low >> 24) & 0xff);
705 un->un_eaddr[2] = (uint8_t)((low >> 16) & 0xff);
706 un->un_eaddr[1] = (uint8_t)((low >> 8) & 0xff);
707 un->un_eaddr[0] = (uint8_t)((low) & 0xff);
708 if (ETHER_IS_VALID(un->un_eaddr))
709 return 0;
710 else
711 DPRINTF(un, "registers: %s\n",
712 ether_sprintf(un->un_eaddr));
713 }
714
715 if (mue_eeprom_present(un) && !mue_read_eeprom(un, un->un_eaddr,
716 MUE_E2P_MAC_OFFSET, ETHER_ADDR_LEN)) {
717 if (ETHER_IS_VALID(un->un_eaddr))
718 return 0;
719 else
720 DPRINTF(un, "EEPROM: %s\n",
721 ether_sprintf(un->un_eaddr));
722 }
723
724 if (mue_read_otp(un, un->un_eaddr, MUE_OTP_MAC_OFFSET,
725 ETHER_ADDR_LEN) == 0) {
726 if (ETHER_IS_VALID(un->un_eaddr))
727 return 0;
728 else
729 DPRINTF(un, "OTP: %s\n",
730 ether_sprintf(un->un_eaddr));
731 }
732
733 /*
734 * Other MD methods. This should be tried only if other methods fail.
735 * Otherwise, MAC address for internal device can be assigned to
736 * external devices on Raspberry Pi, for example.
737 */
738 eaprop = prop_dictionary_get(dict, "mac-address");
739 if (eaprop != NULL) {
740 KASSERT(prop_object_type(eaprop) == PROP_TYPE_DATA);
741 KASSERT(prop_data_size(eaprop) == ETHER_ADDR_LEN);
742 memcpy(un->un_eaddr, prop_data_value(eaprop),
743 ETHER_ADDR_LEN);
744 if (ETHER_IS_VALID(un->un_eaddr))
745 return 0;
746 else
747 DPRINTF(un, "prop_dictionary_get: %s\n",
748 ether_sprintf(un->un_eaddr));
749 }
750
751 return 1;
752 }
753
754
755 /*
756 * Probe for a Microchip chip.
757 */
758 static int
mue_match(device_t parent,cfdata_t match,void * aux)759 mue_match(device_t parent, cfdata_t match, void *aux)
760 {
761 struct usb_attach_arg *uaa = aux;
762
763 return (MUE_LOOKUP(uaa) != NULL) ? UMATCH_VENDOR_PRODUCT : UMATCH_NONE;
764 }
765
766 static void
mue_attach(device_t parent,device_t self,void * aux)767 mue_attach(device_t parent, device_t self, void *aux)
768 {
769 USBNET_MII_DECL_DEFAULT(unm);
770 struct usbnet * const un = device_private(self);
771 prop_dictionary_t dict = device_properties(self);
772 struct usb_attach_arg *uaa = aux;
773 struct usbd_device *dev = uaa->uaa_device;
774 usb_interface_descriptor_t *id;
775 usb_endpoint_descriptor_t *ed;
776 char *devinfop;
777 usbd_status err;
778 const char *descr;
779 uint32_t id_rev;
780 uint8_t i;
781 unsigned rx_list_cnt, tx_list_cnt;
782 unsigned rx_bufsz;
783
784 aprint_naive("\n");
785 aprint_normal("\n");
786 devinfop = usbd_devinfo_alloc(dev, 0);
787 aprint_normal_dev(self, "%s\n", devinfop);
788 usbd_devinfo_free(devinfop);
789
790 un->un_dev = self;
791 un->un_udev = dev;
792 un->un_sc = un;
793 un->un_ops = &mue_ops;
794 un->un_rx_xfer_flags = USBD_SHORT_XFER_OK;
795 un->un_tx_xfer_flags = USBD_FORCE_SHORT_XFER;
796
797 #define MUE_CONFIG_NO 1
798 err = usbd_set_config_no(dev, MUE_CONFIG_NO, 1);
799 if (err) {
800 aprint_error_dev(self, "failed to set configuration: %s\n",
801 usbd_errstr(err));
802 return;
803 }
804
805 #define MUE_IFACE_IDX 0
806 err = usbd_device2interface_handle(dev, MUE_IFACE_IDX, &un->un_iface);
807 if (err) {
808 aprint_error_dev(self, "failed to get interface handle: %s\n",
809 usbd_errstr(err));
810 return;
811 }
812
813 un->un_flags = MUE_LOOKUP(uaa)->mue_flags;
814
815 /* Decide on what our bufsize will be. */
816 if (un->un_flags & LAN7500) {
817 rx_bufsz = (un->un_udev->ud_speed == USB_SPEED_HIGH) ?
818 MUE_7500_HS_RX_BUFSIZE : MUE_7500_FS_RX_BUFSIZE;
819 rx_list_cnt = 1;
820 tx_list_cnt = 1;
821 } else {
822 rx_bufsz = MUE_7800_RX_BUFSIZE;
823 rx_list_cnt = MUE_RX_LIST_CNT;
824 tx_list_cnt = MUE_TX_LIST_CNT;
825 }
826
827 un->un_rx_list_cnt = rx_list_cnt;
828 un->un_tx_list_cnt = tx_list_cnt;
829 un->un_rx_bufsz = rx_bufsz;
830 un->un_tx_bufsz = MUE_TX_BUFSIZE;
831
832 /* Find endpoints. */
833 id = usbd_get_interface_descriptor(un->un_iface);
834 for (i = 0; i < id->bNumEndpoints; i++) {
835 ed = usbd_interface2endpoint_descriptor(un->un_iface, i);
836 if (ed == NULL) {
837 aprint_error_dev(self, "failed to get ep %hhd\n", i);
838 return;
839 }
840 if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
841 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
842 un->un_ed[USBNET_ENDPT_RX] = ed->bEndpointAddress;
843 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_OUT &&
844 UE_GET_XFERTYPE(ed->bmAttributes) == UE_BULK) {
845 un->un_ed[USBNET_ENDPT_TX] = ed->bEndpointAddress;
846 } else if (UE_GET_DIR(ed->bEndpointAddress) == UE_DIR_IN &&
847 UE_GET_XFERTYPE(ed->bmAttributes) == UE_INTERRUPT) {
848 un->un_ed[USBNET_ENDPT_INTR] = ed->bEndpointAddress;
849 }
850 }
851 if (un->un_ed[USBNET_ENDPT_RX] == 0 ||
852 un->un_ed[USBNET_ENDPT_TX] == 0 ||
853 un->un_ed[USBNET_ENDPT_INTR] == 0) {
854 aprint_error_dev(self, "failed to find endpoints\n");
855 return;
856 }
857
858 /* Set these up now for mue_cmd(). */
859 usbnet_attach(un);
860
861 un->un_phyno = 1;
862
863 if (mue_chip_init(un)) {
864 aprint_error_dev(self, "failed to initialize chip\n");
865 return;
866 }
867
868 /* A Microchip chip was detected. Inform the world. */
869 id_rev = mue_csr_read(un, MUE_ID_REV);
870 descr = (un->un_flags & LAN7500) ? "LAN7500" : "LAN7800";
871 aprint_normal_dev(self, "%s id %#x rev %#x\n", descr,
872 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_ID),
873 (unsigned)__SHIFTOUT(id_rev, MUE_ID_REV_REV));
874
875 if (mue_get_macaddr(un, dict)) {
876 aprint_error_dev(self, "failed to read MAC address\n");
877 return;
878 }
879
880 struct ifnet *ifp = usbnet_ifp(un);
881 ifp->if_capabilities = IFCAP_TSOv4 | IFCAP_TSOv6 |
882 IFCAP_CSUM_IPv4_Tx | IFCAP_CSUM_IPv4_Rx |
883 IFCAP_CSUM_TCPv4_Tx | IFCAP_CSUM_TCPv4_Rx |
884 IFCAP_CSUM_UDPv4_Tx | IFCAP_CSUM_UDPv4_Rx |
885 IFCAP_CSUM_TCPv6_Tx | IFCAP_CSUM_TCPv6_Rx |
886 IFCAP_CSUM_UDPv6_Tx | IFCAP_CSUM_UDPv6_Rx;
887
888 struct ethercom *ec = usbnet_ec(un);
889 ec->ec_capabilities = ETHERCAP_VLAN_MTU;
890 #if 0 /* XXX not yet */
891 ec->ec_capabilities = ETHERCAP_VLAN_MTU | ETHERCAP_JUMBO_MTU;
892 #endif
893
894 usbnet_attach_ifp(un, IFF_SIMPLEX | IFF_BROADCAST | IFF_MULTICAST,
895 0, &unm);
896 }
897
898 static unsigned
mue_uno_tx_prepare(struct usbnet * un,struct mbuf * m,struct usbnet_chain * c)899 mue_uno_tx_prepare(struct usbnet *un, struct mbuf *m, struct usbnet_chain *c)
900 {
901 struct ifnet * const ifp = usbnet_ifp(un);
902 struct mue_txbuf_hdr hdr;
903 uint32_t tx_cmd_a, tx_cmd_b;
904 int csum, len, rv;
905 bool tso, ipe, tpe;
906
907 if ((unsigned)m->m_pkthdr.len > un->un_tx_bufsz - sizeof(hdr))
908 return 0;
909
910 csum = m->m_pkthdr.csum_flags;
911 tso = csum & (M_CSUM_TSOv4 | M_CSUM_TSOv6);
912 ipe = csum & M_CSUM_IPv4;
913 tpe = csum & (M_CSUM_TCPv4 | M_CSUM_UDPv4 |
914 M_CSUM_TCPv6 | M_CSUM_UDPv6);
915
916 len = m->m_pkthdr.len;
917 if (__predict_false((!tso && len > (int)MUE_FRAME_LEN(ifp->if_mtu)) ||
918 ( tso && len > MUE_TSO_FRAME_LEN))) {
919 MUE_PRINTF(un, "packet length %d\n too long", len);
920 return 0;
921 }
922
923 KASSERT((len & ~MUE_TX_CMD_A_LEN_MASK) == 0);
924 tx_cmd_a = len | MUE_TX_CMD_A_FCS;
925
926 if (tso) {
927 tx_cmd_a |= MUE_TX_CMD_A_LSO;
928 if (__predict_true(m->m_pkthdr.segsz > MUE_TX_MSS_MIN))
929 tx_cmd_b = m->m_pkthdr.segsz;
930 else
931 tx_cmd_b = MUE_TX_MSS_MIN;
932 tx_cmd_b <<= MUE_TX_CMD_B_MSS_SHIFT;
933 KASSERT((tx_cmd_b & ~MUE_TX_CMD_B_MSS_MASK) == 0);
934 rv = mue_prepare_tso(un, m);
935 if (__predict_false(rv))
936 return 0;
937 } else {
938 if (ipe)
939 tx_cmd_a |= MUE_TX_CMD_A_IPE;
940 if (tpe)
941 tx_cmd_a |= MUE_TX_CMD_A_TPE;
942 tx_cmd_b = 0;
943 }
944
945 hdr.tx_cmd_a = htole32(tx_cmd_a);
946 hdr.tx_cmd_b = htole32(tx_cmd_b);
947
948 memcpy(c->unc_buf, &hdr, sizeof(hdr));
949 m_copydata(m, 0, len, c->unc_buf + sizeof(hdr));
950
951 return len + sizeof(hdr);
952 }
953
954 /*
955 * L3 length field should be cleared.
956 */
957 static int
mue_prepare_tso(struct usbnet * un,struct mbuf * m)958 mue_prepare_tso(struct usbnet *un, struct mbuf *m)
959 {
960 struct ether_header *eh;
961 struct ip *ip;
962 struct ip6_hdr *ip6;
963 uint16_t type, len = 0;
964 int off;
965
966 if (__predict_true(m->m_len >= (int)sizeof(*eh))) {
967 eh = mtod(m, struct ether_header *);
968 type = eh->ether_type;
969 } else
970 m_copydata(m, offsetof(struct ether_header, ether_type),
971 sizeof(type), &type);
972 switch (type = htons(type)) {
973 case ETHERTYPE_IP:
974 case ETHERTYPE_IPV6:
975 off = ETHER_HDR_LEN;
976 break;
977 case ETHERTYPE_VLAN:
978 off = ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN;
979 break;
980 default:
981 return EINVAL;
982 }
983
984 if (m->m_pkthdr.csum_flags & M_CSUM_TSOv4) {
985 if (__predict_true(m->m_len >= off + (int)sizeof(*ip))) {
986 ip = (void *)(mtod(m, char *) + off);
987 ip->ip_len = 0;
988 } else
989 m_copyback(m, off + offsetof(struct ip, ip_len),
990 sizeof(len), &len);
991 } else {
992 if (__predict_true(m->m_len >= off + (int)sizeof(*ip6))) {
993 ip6 = (void *)(mtod(m, char *) + off);
994 ip6->ip6_plen = 0;
995 } else
996 m_copyback(m, off + offsetof(struct ip6_hdr, ip6_plen),
997 sizeof(len), &len);
998 }
999 return 0;
1000 }
1001
1002 static void
mue_uno_mcast(struct ifnet * ifp)1003 mue_uno_mcast(struct ifnet *ifp)
1004 {
1005 struct usbnet *un = ifp->if_softc;
1006 struct ethercom *ec = usbnet_ec(un);
1007 const uint8_t *enaddr = CLLADDR(ifp->if_sadl);
1008 struct ether_multi *enm;
1009 struct ether_multistep step;
1010 uint32_t pfiltbl[MUE_NUM_ADDR_FILTX][2];
1011 uint32_t hashtbl[MUE_DP_SEL_VHF_HASH_LEN];
1012 uint32_t reg, rxfilt, h, hireg, loreg;
1013 size_t i;
1014
1015 if (usbnet_isdying(un))
1016 return;
1017
1018 /* Clear perfect filter and hash tables. */
1019 memset(pfiltbl, 0, sizeof(pfiltbl));
1020 memset(hashtbl, 0, sizeof(hashtbl));
1021
1022 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1023 rxfilt = mue_csr_read(un, reg);
1024 rxfilt &= ~(MUE_RFE_CTL_PERFECT | MUE_RFE_CTL_MULTICAST_HASH |
1025 MUE_RFE_CTL_UNICAST | MUE_RFE_CTL_MULTICAST);
1026
1027 /* Always accept broadcast frames. */
1028 rxfilt |= MUE_RFE_CTL_BROADCAST;
1029
1030 ETHER_LOCK(ec);
1031 if (usbnet_ispromisc(un)) {
1032 rxfilt |= MUE_RFE_CTL_UNICAST;
1033 allmulti: rxfilt |= MUE_RFE_CTL_MULTICAST;
1034 ec->ec_flags |= ETHER_F_ALLMULTI;
1035 if (usbnet_ispromisc(un))
1036 DPRINTF(un, "promisc\n");
1037 else
1038 DPRINTF(un, "allmulti\n");
1039 } else {
1040 /* Now program new ones. */
1041 pfiltbl[0][0] = MUE_ENADDR_HI(enaddr) | MUE_ADDR_FILTX_VALID;
1042 pfiltbl[0][1] = MUE_ENADDR_LO(enaddr);
1043 i = 1;
1044 ETHER_FIRST_MULTI(step, ec, enm);
1045 while (enm != NULL) {
1046 if (memcmp(enm->enm_addrlo, enm->enm_addrhi,
1047 ETHER_ADDR_LEN)) {
1048 memset(pfiltbl, 0, sizeof(pfiltbl));
1049 memset(hashtbl, 0, sizeof(hashtbl));
1050 rxfilt &= ~MUE_RFE_CTL_MULTICAST_HASH;
1051 goto allmulti;
1052 }
1053 if (i < MUE_NUM_ADDR_FILTX) {
1054 /* Use perfect address table if possible. */
1055 pfiltbl[i][0] = MUE_ENADDR_HI(enm->enm_addrlo) |
1056 MUE_ADDR_FILTX_VALID;
1057 pfiltbl[i][1] = MUE_ENADDR_LO(enm->enm_addrlo);
1058 } else {
1059 /* Otherwise, use hash table. */
1060 rxfilt |= MUE_RFE_CTL_MULTICAST_HASH;
1061 h = (ether_crc32_be(enm->enm_addrlo,
1062 ETHER_ADDR_LEN) >> 23) & 0x1ff;
1063 hashtbl[h / 32] |= 1 << (h % 32);
1064 }
1065 i++;
1066 ETHER_NEXT_MULTI(step, enm);
1067 }
1068 ec->ec_flags &= ~ETHER_F_ALLMULTI;
1069 rxfilt |= MUE_RFE_CTL_PERFECT;
1070 if (rxfilt & MUE_RFE_CTL_MULTICAST_HASH)
1071 DPRINTF(un, "perfect filter and hash tables\n");
1072 else
1073 DPRINTF(un, "perfect filter\n");
1074 }
1075 ETHER_UNLOCK(ec);
1076
1077 for (i = 0; i < MUE_NUM_ADDR_FILTX; i++) {
1078 hireg = (un->un_flags & LAN7500) ?
1079 MUE_7500_ADDR_FILTX(i) : MUE_7800_ADDR_FILTX(i);
1080 loreg = hireg + 4;
1081 mue_csr_write(un, hireg, 0);
1082 mue_csr_write(un, loreg, pfiltbl[i][1]);
1083 mue_csr_write(un, hireg, pfiltbl[i][0]);
1084 }
1085
1086 mue_dataport_write(un, MUE_DP_SEL_VHF, MUE_DP_SEL_VHF_VLAN_LEN,
1087 MUE_DP_SEL_VHF_HASH_LEN, hashtbl);
1088
1089 mue_csr_write(un, reg, rxfilt);
1090 }
1091
1092 static void
mue_sethwcsum_locked(struct usbnet * un)1093 mue_sethwcsum_locked(struct usbnet *un)
1094 {
1095 struct ifnet * const ifp = usbnet_ifp(un);
1096 uint32_t reg, val;
1097
1098 KASSERT(IFNET_LOCKED(ifp));
1099
1100 reg = (un->un_flags & LAN7500) ? MUE_7500_RFE_CTL : MUE_7800_RFE_CTL;
1101 val = mue_csr_read(un, reg);
1102
1103 if (ifp->if_capenable & IFCAP_CSUM_IPv4_Rx) {
1104 DPRINTF(un, "RX IPv4 hwcsum enabled\n");
1105 val |= MUE_RFE_CTL_IP_COE;
1106 } else {
1107 DPRINTF(un, "RX IPv4 hwcsum disabled\n");
1108 val &= ~MUE_RFE_CTL_IP_COE;
1109 }
1110
1111 if (ifp->if_capenable &
1112 (IFCAP_CSUM_TCPv4_Rx | IFCAP_CSUM_UDPv4_Rx |
1113 IFCAP_CSUM_TCPv6_Rx | IFCAP_CSUM_UDPv6_Rx)) {
1114 DPRINTF(un, "RX L4 hwcsum enabled\n");
1115 val |= MUE_RFE_CTL_TCPUDP_COE;
1116 } else {
1117 DPRINTF(un, "RX L4 hwcsum disabled\n");
1118 val &= ~MUE_RFE_CTL_TCPUDP_COE;
1119 }
1120
1121 val &= ~MUE_RFE_CTL_VLAN_FILTER;
1122
1123 mue_csr_write(un, reg, val);
1124 }
1125
1126 static void
mue_setmtu_locked(struct usbnet * un)1127 mue_setmtu_locked(struct usbnet *un)
1128 {
1129 struct ifnet * const ifp = usbnet_ifp(un);
1130 uint32_t val;
1131
1132 KASSERT(IFNET_LOCKED(ifp));
1133
1134 /* Set the maximum frame size. */
1135 MUE_CLRBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
1136 val = mue_csr_read(un, MUE_MAC_RX);
1137 val &= ~MUE_MAC_RX_MAX_SIZE_MASK;
1138 val |= MUE_MAC_RX_MAX_LEN(MUE_FRAME_LEN(ifp->if_mtu));
1139 mue_csr_write(un, MUE_MAC_RX, val);
1140 MUE_SETBIT(un, MUE_MAC_RX, MUE_MAC_RX_RXEN);
1141 }
1142
1143 static void
mue_uno_rx_loop(struct usbnet * un,struct usbnet_chain * c,uint32_t total_len)1144 mue_uno_rx_loop(struct usbnet *un, struct usbnet_chain *c, uint32_t total_len)
1145 {
1146 struct ifnet * const ifp = usbnet_ifp(un);
1147 struct mue_rxbuf_hdr *hdrp;
1148 uint32_t rx_cmd_a;
1149 uint16_t pktlen;
1150 int csum;
1151 uint8_t *buf = c->unc_buf;
1152 bool v6;
1153
1154 KASSERTMSG(total_len <= un->un_rx_bufsz, "%u vs %u",
1155 total_len, un->un_rx_bufsz);
1156
1157 do {
1158 if (__predict_false(total_len < sizeof(*hdrp))) {
1159 MUE_PRINTF(un, "packet length %u too short\n", total_len);
1160 if_statinc(ifp, if_ierrors);
1161 return;
1162 }
1163
1164 hdrp = (struct mue_rxbuf_hdr *)buf;
1165 rx_cmd_a = le32toh(hdrp->rx_cmd_a);
1166
1167 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ERRORS)) {
1168 /*
1169 * We cannot use MUE_RX_CMD_A_RED bit here;
1170 * it is turned on in the cases of L3/L4
1171 * checksum errors which we handle below.
1172 */
1173 MUE_PRINTF(un, "rx_cmd_a: %#x\n", rx_cmd_a);
1174 if_statinc(ifp, if_ierrors);
1175 return;
1176 }
1177
1178 pktlen = (uint16_t)(rx_cmd_a & MUE_RX_CMD_A_LEN_MASK);
1179 if (un->un_flags & LAN7500)
1180 pktlen -= 2;
1181
1182 if (__predict_false(pktlen < ETHER_HDR_LEN + ETHER_CRC_LEN ||
1183 pktlen > MCLBYTES - ETHER_ALIGN || /* XXX */
1184 pktlen + sizeof(*hdrp) > total_len)) {
1185 MUE_PRINTF(un, "invalid packet length %d\n", pktlen);
1186 if_statinc(ifp, if_ierrors);
1187 return;
1188 }
1189
1190 if (__predict_false(rx_cmd_a & MUE_RX_CMD_A_ICSM)) {
1191 csum = 0;
1192 } else {
1193 v6 = rx_cmd_a & MUE_RX_CMD_A_IPV;
1194 switch (rx_cmd_a & MUE_RX_CMD_A_PID) {
1195 case MUE_RX_CMD_A_PID_TCP:
1196 csum = v6 ?
1197 M_CSUM_TCPv6 : M_CSUM_IPv4 | M_CSUM_TCPv4;
1198 break;
1199 case MUE_RX_CMD_A_PID_UDP:
1200 csum = v6 ?
1201 M_CSUM_UDPv6 : M_CSUM_IPv4 | M_CSUM_UDPv4;
1202 break;
1203 case MUE_RX_CMD_A_PID_IP:
1204 csum = v6 ? 0 : M_CSUM_IPv4;
1205 break;
1206 default:
1207 csum = 0;
1208 break;
1209 }
1210 csum &= ifp->if_csum_flags_rx;
1211 if (__predict_false((csum & M_CSUM_IPv4) &&
1212 (rx_cmd_a & MUE_RX_CMD_A_ICE)))
1213 csum |= M_CSUM_IPv4_BAD;
1214 if (__predict_false((csum & ~M_CSUM_IPv4) &&
1215 (rx_cmd_a & MUE_RX_CMD_A_TCE)))
1216 csum |= M_CSUM_TCP_UDP_BAD;
1217 }
1218
1219 usbnet_enqueue(un, buf + sizeof(*hdrp), pktlen, csum,
1220 0, M_HASFCS);
1221
1222 /* Attention: sizeof(hdr) = 10 */
1223 pktlen = roundup(pktlen + sizeof(*hdrp), 4);
1224 if (pktlen > total_len)
1225 pktlen = total_len;
1226 total_len -= pktlen;
1227 buf += pktlen;
1228 } while (total_len > 0);
1229 }
1230
1231 static int
mue_uno_init(struct ifnet * ifp)1232 mue_uno_init(struct ifnet *ifp)
1233 {
1234 struct usbnet * const un = ifp->if_softc;
1235
1236 mue_reset(un);
1237
1238 /* Set MAC address. */
1239 mue_set_macaddr(un);
1240
1241 /* TCP/UDP checksum offload engines. */
1242 mue_sethwcsum_locked(un);
1243
1244 /* Set MTU. */
1245 mue_setmtu_locked(un);
1246
1247 return 0;
1248 }
1249
1250 static int
mue_uno_ioctl(struct ifnet * ifp,u_long cmd,void * data)1251 mue_uno_ioctl(struct ifnet *ifp, u_long cmd, void *data)
1252 {
1253 struct usbnet * const un = ifp->if_softc;
1254
1255 switch (cmd) {
1256 case SIOCSIFCAP:
1257 mue_sethwcsum_locked(un);
1258 break;
1259 case SIOCSIFMTU:
1260 mue_setmtu_locked(un);
1261 break;
1262 default:
1263 break;
1264 }
1265
1266 return 0;
1267 }
1268
1269 static void
mue_reset(struct usbnet * un)1270 mue_reset(struct usbnet *un)
1271 {
1272 if (usbnet_isdying(un))
1273 return;
1274
1275 /* Wait a little while for the chip to get its brains in order. */
1276 usbd_delay_ms(un->un_udev, 1);
1277
1278 // mue_chip_init(un); /* XXX */
1279 }
1280
1281 static void
mue_uno_stop(struct ifnet * ifp,int disable)1282 mue_uno_stop(struct ifnet *ifp, int disable)
1283 {
1284 struct usbnet * const un = ifp->if_softc;
1285
1286 mue_reset(un);
1287 }
1288
1289 #ifdef _MODULE
1290 #include "ioconf.c"
1291 #endif
1292
1293 USBNET_MODULE(mue)
1294