1 /* $NetBSD: slide.c,v 1.29 2013/10/07 19:51:55 jakllsch Exp $ */
2
3 /*-
4 * Copyright (c) 2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: slide.c,v 1.29 2013/10/07 19:51:55 jakllsch Exp $");
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37
38 #include <dev/pci/pcivar.h>
39 #include <dev/pci/pcidevs.h>
40 #include <dev/pci/pciidereg.h>
41 #include <dev/pci/pciidevar.h>
42 #include <dev/pci/pciide_sl82c105_reg.h>
43
44 static void sl82c105_chip_map(struct pciide_softc*,
45 const struct pci_attach_args*);
46 static void sl82c105_setup_channel(struct ata_channel*);
47
48 static int slide_match(device_t, cfdata_t, void *);
49 static void slide_attach(device_t, device_t, void *);
50
51 CFATTACH_DECL_NEW(slide, sizeof(struct pciide_softc),
52 slide_match, slide_attach, pciide_detach, NULL);
53
54 static const struct pciide_product_desc pciide_symphony_products[] = {
55 { PCI_PRODUCT_SYMPHONY_82C105,
56 0,
57 "Symphony Labs 82C105 IDE controller",
58 sl82c105_chip_map,
59 },
60 { 0,
61 0,
62 NULL,
63 NULL,
64 }
65 };
66
67 static const struct pciide_product_desc pciide_winbond_products[] = {
68 { PCI_PRODUCT_WINBOND_W83C553F_1,
69 0,
70 "Winbond W83C553F IDE controller",
71 sl82c105_chip_map,
72 },
73 { 0,
74 0,
75 NULL,
76 NULL,
77 }
78 };
79
80 static int
slide_match(device_t parent,cfdata_t match,void * aux)81 slide_match(device_t parent, cfdata_t match, void *aux)
82 {
83 struct pci_attach_args *pa = aux;
84
85 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY) {
86 if (pciide_lookup_product(pa->pa_id, pciide_symphony_products))
87 return (2);
88 }
89 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND) {
90 if (pciide_lookup_product(pa->pa_id, pciide_winbond_products))
91 return (2);
92 }
93 return (0);
94 }
95
96 static void
slide_attach(device_t parent,device_t self,void * aux)97 slide_attach(device_t parent, device_t self, void *aux)
98 {
99 struct pci_attach_args *pa = aux;
100 struct pciide_softc *sc = device_private(self);
101 const struct pciide_product_desc *pp = NULL;
102
103 sc->sc_wdcdev.sc_atac.atac_dev = self;
104
105 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SYMPHONY)
106 pp = pciide_lookup_product(pa->pa_id, pciide_symphony_products);
107 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_WINBOND)
108 pp = pciide_lookup_product(pa->pa_id, pciide_winbond_products);
109 if (pp == NULL)
110 panic("slide_attach");
111 pciide_common_attach(sc, pa, pp);
112 }
113
114 static int
sl82c105_bugchk(const struct pci_attach_args * pa)115 sl82c105_bugchk(const struct pci_attach_args *pa)
116 {
117
118 if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_WINBOND ||
119 PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_WINBOND_W83C553F_0)
120 return (0);
121
122 if (PCI_REVISION(pa->pa_class) <= 0x05)
123 return (1);
124
125 return (0);
126 }
127
128 static void
sl82c105_chip_map(struct pciide_softc * sc,const struct pci_attach_args * pa)129 sl82c105_chip_map(struct pciide_softc *sc, const struct pci_attach_args *pa)
130 {
131 struct pciide_channel *cp;
132 pcireg_t interface, idecr;
133 int channel;
134
135 if (pciide_chipen(sc, pa) == 0)
136 return;
137
138 aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
139 "bus-master DMA support present");
140
141 /*
142 * Check to see if we're part of the Winbond 83c553 Southbridge.
143 * If so, we need to disable DMA on rev. <= 5 of the southbridge.
144 */
145 if (pci_find_device(NULL, sl82c105_bugchk)) {
146 aprint_verbose(" but disabled due to 83c553 rev. <= 0x05");
147 sc->sc_dma_ok = 0;
148 } else
149 pciide_mapreg_dma(sc, pa);
150 aprint_verbose("\n");
151
152 sc->sc_wdcdev.sc_atac.atac_cap = ATAC_CAP_DATA32 | ATAC_CAP_DATA16;
153 sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
154 if (sc->sc_dma_ok) {
155 sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DMA;
156 sc->sc_wdcdev.irqack = pciide_irqack;
157 sc->sc_wdcdev.sc_atac.atac_dma_cap = 2;
158 }
159 sc->sc_wdcdev.sc_atac.atac_set_modes = sl82c105_setup_channel;
160
161 sc->sc_wdcdev.sc_atac.atac_channels = sc->wdc_chanarray;
162 sc->sc_wdcdev.sc_atac.atac_nchannels = PCIIDE_NUM_CHANNELS;
163 sc->sc_wdcdev.wdc_maxdrives = 2;
164
165 idecr = pci_conf_read(sc->sc_pc, sc->sc_tag, SYMPH_IDECSR);
166
167 interface = PCI_INTERFACE(pa->pa_class);
168
169 wdc_allocate_regs(&sc->sc_wdcdev);
170
171 for (channel = 0; channel < sc->sc_wdcdev.sc_atac.atac_nchannels;
172 channel++) {
173 cp = &sc->pciide_channels[channel];
174 if (pciide_chansetup(sc, channel, interface) == 0)
175 continue;
176 if ((channel == 0 && (idecr & IDECR_P0EN) == 0) ||
177 (channel == 1 && (idecr & IDECR_P1EN) == 0)) {
178 aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
179 "%s channel ignored (disabled)\n", cp->name);
180 cp->ata_channel.ch_flags |= ATACH_DISABLED;
181 continue;
182 }
183 pciide_mapchan(pa, cp, interface, pciide_pci_intr);
184 }
185 }
186
187 static void
sl82c105_setup_channel(struct ata_channel * chp)188 sl82c105_setup_channel(struct ata_channel *chp)
189 {
190 struct ata_drive_datas *drvp;
191 struct pciide_channel *cp = CHAN_TO_PCHAN(chp);
192 struct pciide_softc *sc = CHAN_TO_PCIIDE(chp);
193 int pxdx_reg, drive, s;
194 pcireg_t pxdx;
195
196 /* Set up DMA if needed. */
197 pciide_channel_dma_setup(cp);
198
199 for (drive = 0; drive < 2; drive++) {
200 pxdx_reg = ((chp->ch_channel == 0) ? SYMPH_P0D0CR
201 : SYMPH_P1D0CR) +
202 (drive * 4);
203
204 pxdx = pci_conf_read(sc->sc_pc, sc->sc_tag, pxdx_reg);
205
206 pxdx &= ~(PxDx_CMD_ON_MASK|PxDx_CMD_OFF_MASK);
207 pxdx &= ~(PxDx_PWEN|PxDx_RDYEN|PxDx_RAEN);
208
209 drvp = &chp->ch_drive[drive];
210 /* If no drive, skip. */
211 if (drvp->drive_type == ATA_DRIVET_NONE) {
212 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
213 continue;
214 }
215
216 if (drvp->drive_flags & ATA_DRIVE_DMA) {
217 /*
218 * Timings will be used for both PIO and DMA,
219 * so adjust DMA mode if needed.
220 */
221 if (drvp->PIO_mode >= 3) {
222 if ((drvp->DMA_mode + 2) > drvp->PIO_mode)
223 drvp->DMA_mode = drvp->PIO_mode - 2;
224 if (drvp->DMA_mode < 1) {
225 /*
226 * Can't mix both PIO and DMA.
227 * Disable DMA.
228 */
229 s = splbio();
230 drvp->drive_flags &= ~ATA_DRIVE_DMA;
231 splx(s);
232 }
233 } else {
234 /*
235 * Can't mix both PIO and DMA. Disable
236 * DMA.
237 */
238 s = splbio();
239 drvp->drive_flags &= ~ATA_DRIVE_DMA;
240 splx(s);
241 }
242 }
243
244 if (drvp->drive_flags & ATA_DRIVE_DMA) {
245 /* Use multi-word DMA. */
246 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_on <<
247 PxDx_CMD_ON_SHIFT;
248 pxdx |= symph_mw_dma_times[drvp->DMA_mode].cmd_off;
249 } else {
250 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_on <<
251 PxDx_CMD_ON_SHIFT;
252 pxdx |= symph_pio_times[drvp->PIO_mode].cmd_off;
253 }
254
255 /* XXX PxDx_PWEN? PxDx_RDYEN? PxDx_RAEN? */
256
257 /* ...and set the mode for this drive. */
258 pci_conf_write(sc->sc_pc, sc->sc_tag, pxdx_reg, pxdx);
259 }
260 }
261