1 /* $NetBSD: chipsfb.c,v 1.31 2012/01/30 19:41:18 drochner Exp $ */
2
3 /*
4 * Copyright (c) 2006 Michael Lorenz
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 */
27
28 /*
29 * A console driver for Chips & Technologies 65550 graphics controllers
30 * tested on macppc only so far
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: chipsfb.c,v 1.31 2012/01/30 19:41:18 drochner Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40 #include <sys/kauth.h>
41
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/pcireg.h>
44 #include <dev/pci/pcidevs.h>
45 #include <dev/pci/pciio.h>
46 #include <dev/pci/wsdisplay_pci.h>
47
48
49 #include <dev/ic/ct65550reg.h>
50 #include <dev/ic/ct65550var.h>
51
52 #include "opt_wsemul.h"
53 #include "opt_chipsfb.h"
54
55 struct chipsfb_pci_softc {
56 struct chipsfb_softc sc_chips;
57 pci_chipset_tag_t sc_pc;
58 pcitag_t sc_pcitag;
59 };
60
61 static int chipsfb_pci_match(device_t, cfdata_t, void *);
62 static void chipsfb_pci_attach(device_t, device_t, void *);
63 static int chipsfb_pci_ioctl(void *, void *, u_long, void *, int,
64 struct lwp *);
65
66 CFATTACH_DECL_NEW(chipsfb_pci, sizeof(struct chipsfb_pci_softc),
67 chipsfb_pci_match, chipsfb_pci_attach, NULL, NULL);
68
69 static int
chipsfb_pci_match(device_t parent,cfdata_t match,void * aux)70 chipsfb_pci_match(device_t parent, cfdata_t match, void *aux)
71 {
72 const struct pci_attach_args *pa = (const struct pci_attach_args *)aux;
73
74 if (PCI_CLASS(pa->pa_class) != PCI_CLASS_DISPLAY ||
75 PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_DISPLAY_VGA)
76 return 0;
77 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
78 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65550))
79 return 100;
80 if ((PCI_VENDOR(pa->pa_id) == PCI_VENDOR_CHIPS) &&
81 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_CHIPS_65554))
82 return 100;
83 return 0;
84 }
85
86 static void
chipsfb_pci_attach(device_t parent,device_t self,void * aux)87 chipsfb_pci_attach(device_t parent, device_t self, void *aux)
88 {
89 struct chipsfb_pci_softc *scp = device_private(self);
90 struct chipsfb_softc *sc = &scp->sc_chips;
91 const struct pci_attach_args *pa = aux;
92 pcireg_t screg;
93
94 scp->sc_pc = pa->pa_pc;
95 scp->sc_pcitag = pa->pa_tag;
96 sc->sc_dev = self;
97
98 screg = pci_conf_read(scp->sc_pc, scp->sc_pcitag,
99 PCI_COMMAND_STATUS_REG);
100 screg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE;
101 pci_conf_write(scp->sc_pc, scp->sc_pcitag, PCI_COMMAND_STATUS_REG,
102 screg);
103
104 pci_aprint_devinfo(pa, NULL);
105
106 sc->sc_memt = pa->pa_memt;
107 sc->sc_iot = pa->pa_iot;
108 sc->sc_ioctl = chipsfb_pci_ioctl;
109 sc->sc_mmap = NULL;
110
111 /* the framebuffer */
112 sc->sc_fb = (pci_conf_read(scp->sc_pc, scp->sc_pcitag, PCI_BAR0) &
113 ~PCI_MAPREG_MEM_TYPE_MASK);
114 sc->sc_fbsize = 0x01000000; /* 16MB aperture */
115
116 if (bus_space_map(sc->sc_memt, sc->sc_fb, 0x400000,
117 BUS_SPACE_MAP_LINEAR, &sc->sc_fbh)) {
118 aprint_error_dev(sc->sc_dev,
119 "failed to map the frame buffer.\n");
120 }
121
122 if (bus_space_map(sc->sc_memt, sc->sc_fb + CT_OFF_BITBLT, 0x20000,
123 BUS_SPACE_MAP_LINEAR, &sc->sc_mmregh)) {
124 aprint_error_dev(sc->sc_dev,
125 "failed to map MMIO registers.\n");
126 }
127
128 /* IO-mapped registers */
129 if (bus_space_map(sc->sc_iot, 0x0, 0x400, 0, &sc->sc_ioregh) != 0) {
130 aprint_error_dev(sc->sc_dev, "failed to map IO registers.\n");
131 }
132
133 sc->memsize = chipsfb_probe_vram(sc);
134
135 chipsfb_do_attach(sc);
136 }
137
138 static int
chipsfb_pci_ioctl(void * v,void * vs,u_long cmd,void * data,int flag,struct lwp * l)139 chipsfb_pci_ioctl(void *v, void *vs, u_long cmd, void *data, int flag,
140 struct lwp *l)
141 {
142 struct vcons_data *vd = v;
143 struct chipsfb_softc *sc = vd->cookie;
144 struct chipsfb_pci_softc *scp = vd->cookie;
145
146 switch (cmd) {
147 /* PCI config read/write passthrough. */
148 case PCI_IOC_CFGREAD:
149 case PCI_IOC_CFGWRITE:
150 return pci_devioctl(scp->sc_pc, scp->sc_pcitag,
151 cmd, data, flag, l);
152
153 case WSDISPLAYIO_GET_BUSID:
154 return wsdisplayio_busid_pci(sc->sc_dev, scp->sc_pc,
155 scp->sc_pcitag, data);
156 }
157 return EPASSTHROUGH;
158 }
159