1 /* $NetBSD: alipm.c,v 1.13 2021/08/07 16:19:14 thorpej Exp $ */
2 /* $OpenBSD: alipm.c,v 1.13 2007/05/03 12:19:01 dlg Exp $ */
3
4 /*
5 * Copyright (c) 2005 Mark Kettenis
6 *
7 * Permission to use, copy, modify, and distribute this software for any
8 * purpose with or without fee is hereby granted, provided that the above
9 * copyright notice and this permission notice appear in all copies.
10 *
11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18 */
19
20 #include <sys/cdefs.h>
21 __KERNEL_RCSID(0, "$NetBSD: alipm.c,v 1.13 2021/08/07 16:19:14 thorpej Exp $");
22
23 #include <sys/param.h>
24 #include <sys/device.h>
25 #include <sys/kernel.h>
26 #include <sys/mutex.h>
27 #include <sys/proc.h>
28 #include <sys/systm.h>
29
30 #include <dev/i2c/i2cvar.h>
31
32 #include <dev/pci/pcidevs.h>
33 #include <dev/pci/pcireg.h>
34 #include <dev/pci/pcivar.h>
35
36 /*
37 * Acer Labs M7101 Power register definitions.
38 */
39
40 /* PCI configuration registers. */
41 #define ALIPM_CONF 0xd0 /* general configuration */
42 #define ALIPM_CONF_SMBEN 0x0400 /* enable SMBus */
43 #define ALIPM_BASE 0xe0 /* ACPI and SMBus base address */
44 #define ALIPM_SMB_HOSTC 0xf0 /* host configuration */
45 #define ALIPM_SMB_HOSTC_HSTEN 0x00000001 /* enable host controller */
46 #define ALIPM_SMB_HOSTC_CLOCK 0x00e00000 /* clock speed */
47 #define ALIPM_SMB_HOSTC_149K 0x00000000 /* 149 KHz clock */
48 #define ALIPM_SMB_HOSTC_74K 0x00200000 /* 74 KHz clock */
49 #define ALIPM_SMB_HOSTC_37K 0x00400000 /* 37 KHz clock */
50 #define ALIPM_SMB_HOSTC_223K 0x00800000 /* 223 KHz clock */
51 #define ALIPM_SMB_HOSTC_111K 0x00a00000 /* 111 KHz clock */
52 #define ALIPM_SMB_HOSTC_55K 0x00c00000 /* 55 KHz clock */
53
54 #define ALIPM_SMB_SIZE 32 /* SMBus I/O space size */
55
56 /* SMBus I/O registers */
57 #define ALIPM_SMB_HS 0x00 /* host status */
58 #define ALIPM_SMB_HS_IDLE 0x04
59 #define ALIPM_SMB_HS_BUSY 0x08 /* running a command */
60 #define ALIPM_SMB_HS_DONE 0x10 /* command completed */
61 #define ALIPM_SMB_HS_DEVERR 0x20 /* command error */
62 #define ALIPM_SMB_HS_BUSERR 0x40 /* transaction collision */
63 #define ALIPM_SMB_HS_FAILED 0x80 /* failed bus transaction */
64 #define ALIPM_SMB_HS_BITS \
65 "\020\003IDLE\004BUSY\005DONE\006DEVERR\007BUSERR\010FAILED"
66 #define ALIPM_SMB_HC 0x01 /* host control */
67 #define ALIPM_SMB_HC_KILL 0x04 /* kill command */
68 #define ALIPM_SMB_HC_RESET 0x08 /* reset bus */
69 #define ALIPM_SMB_HC_CMD_QUICK 0x00 /* QUICK command */
70 #define ALIPM_SMB_HC_CMD_BYTE 0x10 /* BYTE command */
71 #define ALIPM_SMB_HC_CMD_BDATA 0x20 /* BYTE DATA command */
72 #define ALIPM_SMB_HC_CMD_WDATA 0x30 /* WORD DATA command */
73 #define ALIPM_SMB_HC_CMD_BLOCK 0x40 /* BLOCK command */
74 #define ALIPM_SMB_START 0x02 /* start command */
75 #define ALIPM_SMB_TXSLVA 0x03 /* transmit slave address */
76 #define ALIPM_SMB_TXSLVA_READ (1 << 0) /* read direction */
77 #define ALIPM_SMB_TXSLVA_ADDR(x) (((x) & 0x7f) << 1) /* 7-bit address */
78 #define ALIPM_SMB_HD0 0x04 /* host data 0 */
79 #define ALIPM_SMB_HD1 0x05 /* host data 1 */
80 #define ALIPM_SMB_HBDB 0x06 /* host block data byte */
81 #define ALIPM_SMB_HCMD 0x07 /* host command */
82
83 /*
84 * Newer chips have a more standard, but different PCI configuration
85 * register layout.
86 */
87
88 #define ALIPM_SMB_BASE 0x14 /* SMBus base address */
89 #define ALIPM_SMB_HOSTX 0xe0 /* host configuration */
90
91 #ifdef ALIPM_DEBUG
92 #define DPRINTF(x) printf x
93 #else
94 #define DPRINTF(x)
95 #endif
96
97 #define ALIPM_DELAY 100
98 #define ALIPM_TIMEOUT 1
99
100 struct alipm_softc {
101 device_t sc_dev;
102
103 bus_space_tag_t sc_iot;
104 bus_space_handle_t sc_ioh;
105
106 struct i2c_controller sc_smb_tag;
107 };
108
109 static int alipm_match(device_t, cfdata_t, void *);
110 static void alipm_attach(device_t, device_t, void *);
111
112 int alipm_smb_acquire_bus(void *, int);
113 void alipm_smb_release_bus(void *, int);
114 int alipm_smb_exec(void *, i2c_op_t, i2c_addr_t, const void *,
115 size_t, void *, size_t, int);
116
117 CFATTACH_DECL_NEW(alipm, sizeof(struct alipm_softc),
118 alipm_match, alipm_attach, NULL, NULL);
119
120 static int
alipm_match(device_t parent,cfdata_t match,void * aux)121 alipm_match(device_t parent, cfdata_t match, void *aux)
122 {
123 struct pci_attach_args *pa = aux;
124
125 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_ALI &&
126 (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_ALI_M7101))
127 return (1);
128 return (0);
129 }
130
131 static void
alipm_attach(device_t parent,device_t self,void * aux)132 alipm_attach(device_t parent, device_t self, void *aux)
133 {
134 struct alipm_softc *sc = device_private(self);
135 struct pci_attach_args *pa = aux;
136 struct i2cbus_attach_args iba;
137 pcireg_t iobase, reg;
138 bus_size_t iosize = ALIPM_SMB_SIZE;
139
140 sc->sc_dev = self;
141
142 /* Old chips don't have the PCI 2.2 Capabilities List. */
143 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
144 if ((reg & PCI_STATUS_CAPLIST_SUPPORT) == 0) {
145 /* Map I/O space */
146 iobase = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_BASE);
147 sc->sc_iot = pa->pa_iot;
148 if (iobase == 0 ||
149 bus_space_map(sc->sc_iot, iobase >> 16,
150 iosize, 0, &sc->sc_ioh)) {
151 aprint_error_dev(sc->sc_dev, "can't map I/O space\n");
152 return;
153 }
154
155 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_CONF);
156 if ((reg & ALIPM_CONF_SMBEN) == 0) {
157 aprint_error_dev(sc->sc_dev, "SMBus disabled\n");
158 goto fail;
159 }
160
161 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTC);
162 if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) {
163 aprint_error_dev(sc->sc_dev, "SMBus host disabled\n");
164 goto fail;
165 }
166 } else {
167 /* Map I/O space */
168 if (pci_mapreg_map(pa, ALIPM_SMB_BASE, PCI_MAPREG_TYPE_IO, 0,
169 &sc->sc_iot, &sc->sc_ioh, NULL, &iosize)) {
170 aprint_error_dev(sc->sc_dev, "can't map I/O space\n");
171 return;
172 }
173
174 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, ALIPM_SMB_HOSTX);
175 if ((reg & ALIPM_SMB_HOSTC_HSTEN) == 0) {
176 aprint_error_dev(sc->sc_dev, "SMBus host disabled\n");
177 goto fail;
178 }
179 }
180
181 switch (reg & ALIPM_SMB_HOSTC_CLOCK) {
182 case ALIPM_SMB_HOSTC_149K:
183 aprint_normal(": 149KHz clock\n");
184 break;
185 case ALIPM_SMB_HOSTC_74K:
186 aprint_normal(": 74KHz clock\n");
187 break;
188 case ALIPM_SMB_HOSTC_37K:
189 aprint_normal(": 37KHz clock\n");
190 break;
191 case ALIPM_SMB_HOSTC_223K:
192 aprint_normal(": 223KHz clock\n");
193 break;
194 case ALIPM_SMB_HOSTC_111K:
195 aprint_normal(": 111KHz clock\n");
196 break;
197 case ALIPM_SMB_HOSTC_55K:
198 aprint_normal(": 55KHz clock\n");
199 break;
200 default:
201 aprint_normal(" unknown clock speed\n");
202 break;
203 }
204 aprint_naive("\n");
205
206 /* Attach I2C bus */
207 iic_tag_init(&sc->sc_smb_tag);
208 sc->sc_smb_tag.ic_cookie = sc;
209 sc->sc_smb_tag.ic_exec = alipm_smb_exec;
210
211 memset(&iba, 0, sizeof iba);
212 iba.iba_tag = &sc->sc_smb_tag;
213 config_found(sc->sc_dev, &iba, iicbus_print, CFARGS_NONE);
214
215 return;
216
217 fail:
218 bus_space_unmap(sc->sc_iot, sc->sc_ioh, iosize);
219 }
220
221 int
alipm_smb_exec(void * cookie,i2c_op_t op,i2c_addr_t addr,const void * cmdbuf,size_t cmdlen,void * buf,size_t len,int flags)222 alipm_smb_exec(void *cookie, i2c_op_t op, i2c_addr_t addr,
223 const void *cmdbuf, size_t cmdlen, void *buf, size_t len, int flags)
224 {
225 struct alipm_softc *sc = cookie;
226 u_int8_t *b;
227 u_int8_t ctl, st;
228 int retries, error = 0;
229
230 DPRINTF(("%s: exec op %d, addr 0x%x, cmdlen %d, len %d, "
231 "flags 0x%x\n", device_xname(sc->sc_dev), op, addr, cmdlen,
232 len, flags));
233
234 if (!I2C_OP_STOP_P(op) || cmdlen > 1 || len > 2 ||
235 (cmdlen == 0 && len > 1))
236 return (EOPNOTSUPP);
237
238 /* Clear status bits */
239 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS,
240 ALIPM_SMB_HS_DONE | ALIPM_SMB_HS_FAILED |
241 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR);
242 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
243 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
244
245 /* Wait until bus is idle */
246 for (retries = 1000; retries > 0; retries--) {
247 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
248 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
249 BUS_SPACE_BARRIER_READ);
250 if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED |
251 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR))
252 break;
253 DELAY(ALIPM_DELAY);
254 }
255 if (retries == 0) {
256 aprint_error_dev(sc->sc_dev, "timeout st 0x%x\n", st);
257 return (ETIMEDOUT);
258 }
259 if (st & (ALIPM_SMB_HS_FAILED |
260 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) {
261 aprint_error_dev(sc->sc_dev, "error st 0x%x\n", st);
262 return (EIO);
263 }
264
265 /* Set slave address and transfer direction. */
266 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_TXSLVA,
267 ALIPM_SMB_TXSLVA_ADDR(addr) |
268 (I2C_OP_READ_P(op) ? ALIPM_SMB_TXSLVA_READ : 0));
269
270 if (cmdlen > 0)
271 /* Set command byte */
272 bus_space_write_1(sc->sc_iot, sc->sc_ioh,
273 ALIPM_SMB_HCMD, ((const u_int8_t *)cmdbuf)[0]);
274
275 if (I2C_OP_WRITE_P(op)) {
276 /* Write data. */
277 b = buf;
278 if (cmdlen == 0 && len == 1)
279 bus_space_write_1(sc->sc_iot, sc->sc_ioh,
280 ALIPM_SMB_HCMD, b[0]);
281 else if (len > 0)
282 bus_space_write_1(sc->sc_iot, sc->sc_ioh,
283 ALIPM_SMB_HD0, b[0]);
284 if (len > 1)
285 bus_space_write_1(sc->sc_iot, sc->sc_ioh,
286 ALIPM_SMB_HD1, b[1]);
287 }
288
289 /* Set SMBus command */
290 if (cmdlen == 0) {
291 if (len == 0)
292 ctl = ALIPM_SMB_HC_CMD_QUICK;
293 else
294 ctl = ALIPM_SMB_HC_CMD_BYTE;
295 } else if (len == 1)
296 ctl = ALIPM_SMB_HC_CMD_BDATA;
297 else
298 ctl = ALIPM_SMB_HC_CMD_WDATA;
299 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC, ctl);
300
301 /* Start transaction */
302 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
303 BUS_SPACE_BARRIER_WRITE);
304 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_START, 0xff);
305 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
306 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
307
308 /* Poll for completion */
309 DELAY(ALIPM_DELAY);
310 for (retries = 1000; retries > 0; retries--) {
311 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
312 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
313 BUS_SPACE_BARRIER_READ);
314 if (st & (ALIPM_SMB_HS_IDLE | ALIPM_SMB_HS_FAILED |
315 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR))
316 break;
317 DELAY(ALIPM_DELAY);
318 }
319 if (retries == 0) {
320 aprint_error_dev(sc->sc_dev, "timeout st 0x%x, resetting\n",st);
321 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
322 ALIPM_SMB_HC_RESET);
323 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
324 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
325 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
326 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
327 BUS_SPACE_BARRIER_READ);
328 error = ETIMEDOUT;
329 goto done;
330 }
331
332 if ((st & ALIPM_SMB_HS_DONE) == 0) {
333 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HC,
334 ALIPM_SMB_HC_KILL);
335 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, ALIPM_SMB_SIZE,
336 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE);
337 st = bus_space_read_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS);
338 bus_space_barrier(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, 1,
339 BUS_SPACE_BARRIER_READ);
340 if ((st & ALIPM_SMB_HS_FAILED) == 0)
341 aprint_error_dev(sc->sc_dev, "error st 0x%x\n", st);
342 }
343
344 /* Check for errors */
345 if (st & (ALIPM_SMB_HS_FAILED |
346 ALIPM_SMB_HS_BUSERR | ALIPM_SMB_HS_DEVERR)) {
347 error = EIO;
348 goto done;
349 }
350
351 if (I2C_OP_READ_P(op)) {
352 /* Read data */
353 b = buf;
354 if (len > 0) {
355 b[0] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
356 ALIPM_SMB_HD0);
357 bus_space_barrier(sc->sc_iot, sc->sc_ioh,
358 ALIPM_SMB_HD0, 1, BUS_SPACE_BARRIER_READ);
359 }
360 if (len > 1) {
361 b[1] = bus_space_read_1(sc->sc_iot, sc->sc_ioh,
362 ALIPM_SMB_HD1);
363 bus_space_barrier(sc->sc_iot, sc->sc_ioh,
364 ALIPM_SMB_HD1, 1, BUS_SPACE_BARRIER_READ);
365 }
366 }
367
368 done:
369 /* Clear status bits */
370 bus_space_write_1(sc->sc_iot, sc->sc_ioh, ALIPM_SMB_HS, st);
371
372 return (error);
373 }
374