xref: /netbsd-src/sys/dev/marvell/mvxpbmvar.h (revision 2532bf9bb591889b7cb39da5957fc5be4f51b8a5)
1 /*	$NetBSD: mvxpbmvar.h,v 1.4 2022/03/13 17:50:55 andvar Exp $	*/
2 /*
3  * Copyright (c) 2015 Internet Initiative Japan Inc.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25  * POSSIBILITY OF SUCH DAMAGE.
26  */
27 #ifndef _MVXPBMVAR_H_
28 #define _MVXPBMVAR_H_
29 #include <dev/marvell/marvellvar.h>
30 
31 /*
32  * Max number of unit.
33  */
34 #define MVXPBM_UNIT_MAX		1
35 
36 /*
37  * Buffer alignment
38  */
39 #define MVXPBM_NUM_SLOTS	2048	/* minimum number of slots */
40 #define MVXPBM_PACKET_SIZE	2000	/* minimum packet size */
41 
42 #define MVXPBM_BUF_ALIGN	65536	/* Mbus window size granularity */
43 #define MVXPBM_BUF_MASK		(MVXPBM_BUF_ALIGN - 1)
44 #define MVXPBM_CHUNK_ALIGN	32	/* Cache line size */
45 #define MVXPBM_CHUNK_MASK	(MVXPBM_CHUNK_ALIGN - 1)
46 #define MVXPBM_DATA_ALIGN	32	/* Cache line size */
47 #define MVXPBM_DATA_MASK	(MVXPBM_DATA_ALIGN - 1)
48 #define MVXPBM_DATA_UNIT	8
49 
50 /*
51  * Packet Buffer Header
52  *
53  * this chunks may be managed by H/W Buffer Manger(BM) device,
54  * but there is no device driver yet.
55  *
56  *                            +----------------+ bm_buf
57  *                            |chunk header    | |
58  * +----------------+         |                | |chunk->buf_off
59  * |mbuf (M_EXT set)|<--------|struct mbuf *m  | V
60  * +----------------+         +----------------+ chunk->buf_va/buf_pa
61  * |   m_ext.ext_buf|-------->|packet buffer   | |
62  * +----------------+         |                | |chunk->buf_size
63  *                            |                | V
64  *                            +----------------+
65  *                            |chunk header    |
66  *                            |....            |
67  */
68 
69 struct mvxpbm_chunk {
70 	struct mbuf	*m;		/* back pointer to  mbuf header */
71 	void		*sc;		/* back pointer to softc */
72 	off_t		off;		/* offset of chunk */
73 	paddr_t		pa;		/* physical address of chunk */
74 
75 	off_t		buf_off;	/* offset of packet from sc_bm_buf */
76 	paddr_t		buf_pa;		/* physical address of packet */
77 	vaddr_t		buf_va;		/* virtual address of packet */
78 	size_t		buf_size;	/* size of buffer (exclude hdr) */
79 
80 	LIST_ENTRY(mvxpbm_chunk) link;
81 	/* followed by packet buffer */
82 };
83 
84 struct mvxpbm_softc {
85 	device_t	sc_dev;
86 	bus_dma_tag_t	sc_dmat;
87 	bus_space_tag_t sc_iot;
88 	kmutex_t	sc_mtx;
89 
90 	/* software emulated */
91 	int		sc_emul;
92 
93 	/* DMA MAP for entire buffer */
94 	bus_dmamap_t	sc_buf_map;
95 	char		*sc_buf;
96 	paddr_t		sc_buf_pa;
97 	size_t		sc_buf_size;
98 
99 	/* memory chunk properties */
100 	size_t		sc_slotsize;		/* size of bm_slots include header */
101 	uint32_t	sc_chunk_count;		/* number of chunks */
102 	size_t		sc_chunk_size;		/* size of packet buffer */
103 	size_t		sc_chunk_header_size;	/* size of header + padding */
104 	off_t		sc_chunk_packet_offset;	/* allocate m_leading_space */
105 
106 	/* for software based management */
107 	LIST_HEAD(__mvxpbm_freehead, mvxpbm_chunk) sc_free;
108 	LIST_HEAD(__mvxpbm_inusehead, mvxpbm_chunk) sc_inuse;
109 };
110 
111 #define BM_SYNC_ALL	0
112 
113 /* get mvxpbm device context */
114 struct mvxpbm_softc *mvxpbm_device(struct marvell_attach_args *);
115 
116 /* allocate new memory chunk */
117 struct mvxpbm_chunk *mvxpbm_alloc(struct mvxpbm_softc *);
118 
119 /* free memory chunk */
120 void mvxpbm_free_chunk(struct mvxpbm_chunk *);
121 
122 /* prepare mbuf header after Rx */
123 int mvxpbm_init_mbuf_hdr(struct mvxpbm_chunk *);
124 
125 /* sync DMA seguments */
126 void mvxpbm_dmamap_sync(struct mvxpbm_chunk *, size_t, int);
127 
128 /* lock */
129 void mvxpbm_lock(struct mvxpbm_softc *);
130 void mvxpbm_unlock(struct mvxpbm_softc *);
131 
132 /* get params */
133 const char *mvxpbm_xname(struct mvxpbm_softc *);
134 size_t mvxpbm_chunk_size(struct mvxpbm_softc *);
135 uint32_t mvxpbm_chunk_count(struct mvxpbm_softc *);
136 off_t mvxpbm_packet_offset(struct mvxpbm_softc *);
137 paddr_t mvxpbm_buf_pbase(struct mvxpbm_softc *);
138 size_t mvxpbm_buf_size(struct mvxpbm_softc *);
139 #endif /* _MVXPBMVAR_H_ */
140