1 /* $OpenBSD: rkanxdp.c,v 1.6 2024/01/16 23:37:50 jsg Exp $ */
2 /* $NetBSD: rk_anxdp.c,v 1.2 2020/01/04 12:08:32 jmcneill Exp $ */
3 /*-
4 * Copyright (c) 2019 Jonathan A. Kollasch <jakllsch@kollasch.net>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/param.h>
30 #include <sys/device.h>
31 #include <sys/systm.h>
32
33 #include <machine/bus.h>
34 #include <machine/fdt.h>
35
36 #include <dev/ofw/openfirm.h>
37 #include <dev/ofw/ofw_clock.h>
38 #include <dev/ofw/ofw_gpio.h>
39 #include <dev/ofw/ofw_misc.h>
40 #include <dev/ofw/ofw_pinctrl.h>
41 #include <dev/ofw/fdt.h>
42
43 #include <drm/drm_crtc_helper.h>
44 #include <drm/drm_atomic_helper.h>
45
46 #include <dev/ic/anxdp.h>
47
48 #define RK3399_GRF_SOC_CON20 0x6250
49 #define EDP_LCDC_SEL (1 << 5)
50
51 enum {
52 ANXDP_PORT_INPUT = 0,
53 ANXDP_PORT_OUTPUT = 1,
54 };
55
56 struct rkanxdp_softc {
57 struct anxdp_softc sc_base;
58
59 struct drm_encoder sc_encoder;
60 struct drm_display_mode sc_curmode;
61 struct regmap *sc_grf;
62
63 int sc_activated;
64
65 struct device_ports sc_ports;
66 };
67
68 #define to_rkanxdp_softc(x) container_of(x, struct rkanxdp_softc, sc_base)
69 #define to_rkanxdp_encoder(x) container_of(x, struct rkanxdp_softc, sc_encoder)
70
71 int rkanxdp_match(struct device *, void *, void *);
72 void rkanxdp_attach(struct device *, struct device *, void *);
73
74 void rkanxdp_select_input(struct rkanxdp_softc *, u_int);
75 void rkanxdp_encoder_enable(struct drm_encoder *);
76 void rkanxdp_encoder_dpms(struct drm_encoder *, int);
77
78 int rkanxdp_ep_activate(void *, struct endpoint *, void *);
79 void *rkanxdp_ep_get_cookie(void *, struct endpoint *);
80
81 const struct cfattach rkanxdp_ca = {
82 sizeof (struct rkanxdp_softc), rkanxdp_match, rkanxdp_attach
83 };
84
85 struct cfdriver rkanxdp_cd = {
86 NULL, "rkanxdp", DV_DULL
87 };
88
89 int
rkanxdp_match(struct device * parent,void * match,void * aux)90 rkanxdp_match(struct device *parent, void *match, void *aux)
91 {
92 struct fdt_attach_args *faa = aux;
93
94 return OF_is_compatible(faa->fa_node, "rockchip,rk3399-edp");
95 }
96
97 void
rkanxdp_attach(struct device * parent,struct device * self,void * aux)98 rkanxdp_attach(struct device *parent, struct device *self, void *aux)
99 {
100 struct rkanxdp_softc *sc = (struct rkanxdp_softc *)self;
101 struct fdt_attach_args *faa = aux;
102 uint32_t grf;
103
104 if (faa->fa_nreg < 1) {
105 printf(": no registers\n");
106 return;
107 }
108
109 pinctrl_byname(faa->fa_node, "default");
110
111 reset_deassert(faa->fa_node, "dp");
112
113 clock_enable(faa->fa_node, "pclk");
114 clock_enable(faa->fa_node, "dp");
115 clock_enable(faa->fa_node, "grf");
116
117 sc->sc_base.sc_iot = faa->fa_iot;
118 if (bus_space_map(sc->sc_base.sc_iot, faa->fa_reg[0].addr,
119 faa->fa_reg[0].size, 0, &sc->sc_base.sc_ioh)) {
120 printf(": can't map registers\n");
121 return;
122 }
123
124 grf = OF_getpropint(faa->fa_node, "rockchip,grf", 0);
125 sc->sc_grf = regmap_byphandle(grf);
126 if (sc->sc_grf == NULL) {
127 printf(": can't get grf\n");
128 return;
129 }
130
131 printf(": eDP TX\n");
132
133 sc->sc_base.sc_flags |= ANXDP_FLAG_ROCKCHIP;
134
135 if (anxdp_attach(&sc->sc_base) != 0) {
136 printf("%s: failed to attach driver\n",
137 sc->sc_base.sc_dev.dv_xname);
138 return;
139 }
140
141 sc->sc_ports.dp_node = faa->fa_node;
142 sc->sc_ports.dp_cookie = sc;
143 sc->sc_ports.dp_ep_activate = rkanxdp_ep_activate;
144 sc->sc_ports.dp_ep_get_cookie = rkanxdp_ep_get_cookie;
145 device_ports_register(&sc->sc_ports, EP_DRM_ENCODER);
146 }
147
148 void
rkanxdp_select_input(struct rkanxdp_softc * sc,u_int crtc_index)149 rkanxdp_select_input(struct rkanxdp_softc *sc, u_int crtc_index)
150 {
151 uint32_t write_mask = EDP_LCDC_SEL << 16;
152 uint32_t write_val = crtc_index == 0 ? EDP_LCDC_SEL : 0;
153
154 regmap_write_4(sc->sc_grf, RK3399_GRF_SOC_CON20, write_mask | write_val);
155 }
156
157 void
rkanxdp_encoder_enable(struct drm_encoder * encoder)158 rkanxdp_encoder_enable(struct drm_encoder *encoder)
159 {
160 struct rkanxdp_softc *sc = to_rkanxdp_encoder(encoder);
161 u_int crtc_index = drm_crtc_index(encoder->crtc);
162
163 rkanxdp_select_input(sc, crtc_index);
164 }
165
166 void
rkanxdp_encoder_dpms(struct drm_encoder * encoder,int mode)167 rkanxdp_encoder_dpms(struct drm_encoder *encoder, int mode)
168 {
169 struct rkanxdp_softc *sc = to_rkanxdp_encoder(encoder);
170
171 anxdp_dpms(&sc->sc_base, mode);
172 }
173
174 struct drm_encoder_funcs rkanxdp_encoder_funcs = {
175 .destroy = drm_encoder_cleanup,
176 };
177
178 struct drm_encoder_helper_funcs rkanxdp_encoder_helper_funcs = {
179 .enable = rkanxdp_encoder_enable,
180 .dpms = rkanxdp_encoder_dpms,
181 };
182
183 int
rkanxdp_ep_activate(void * cookie,struct endpoint * ep,void * arg)184 rkanxdp_ep_activate(void *cookie, struct endpoint *ep, void *arg)
185 {
186 struct rkanxdp_softc *sc = cookie;
187 struct drm_crtc *crtc = NULL;
188 struct endpoint *rep;
189 int error;
190
191 if (sc->sc_activated)
192 return 0;
193
194 if (ep->ep_port->dp_reg != ANXDP_PORT_INPUT)
195 return EINVAL;
196
197 rep = endpoint_remote(ep);
198 if (rep && rep->ep_type == EP_DRM_CRTC)
199 crtc = endpoint_get_cookie(rep);
200 if (crtc == NULL)
201 return EINVAL;
202
203 sc->sc_encoder.possible_crtcs = 0x3; /* XXX */
204 drm_encoder_init(crtc->dev, &sc->sc_encoder, &rkanxdp_encoder_funcs,
205 DRM_MODE_ENCODER_TMDS, NULL);
206 drm_encoder_helper_add(&sc->sc_encoder, &rkanxdp_encoder_helper_funcs);
207
208 ep = endpoint_byreg(&sc->sc_ports, ANXDP_PORT_OUTPUT, 0);
209 if (ep) {
210 rep = endpoint_remote(ep);
211 if (rep && rep->ep_type == EP_DRM_PANEL)
212 sc->sc_base.sc_panel = endpoint_get_cookie(rep);
213 }
214
215 sc->sc_base.sc_connector.base.connector_type = DRM_MODE_CONNECTOR_eDP;
216 error = anxdp_bind(&sc->sc_base, &sc->sc_encoder);
217 if (error != 0)
218 return error;
219
220 sc->sc_activated = 1;
221 return 0;
222 }
223
224 void *
rkanxdp_ep_get_cookie(void * cookie,struct endpoint * ep)225 rkanxdp_ep_get_cookie(void *cookie, struct endpoint *ep)
226 {
227 struct rkanxdp_softc *sc = cookie;
228 return &sc->sc_encoder;
229 }
230