1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
3 *
4 * Copyright 2016 Michal Meloun <mmel@FreeBSD.org>
5 * Copyright (c) 2020 Oskar Holmlund <oskar.holmlund@ohdata.se>
6 * Copyright (c) 2024 Jari Sihvola <jsihv@gmx.com>
7 */
8
9 /* Clocks for JH7110 AON group. PLL driver must be attached before this. */
10
11 #include <sys/param.h>
12 #include <sys/systm.h>
13 #include <sys/bus.h>
14 #include <sys/kernel.h>
15 #include <sys/module.h>
16 #include <sys/mutex.h>
17 #include <sys/resource.h>
18 #include <sys/rman.h>
19 #include <machine/bus.h>
20
21 #include <dev/fdt/simplebus.h>
22 #include <dev/hwreset/hwreset.h>
23 #include <dev/ofw/ofw_bus.h>
24 #include <dev/ofw/ofw_bus_subr.h>
25
26 #include <dev/clk/clk.h>
27 #include <dev/clk/starfive/jh7110_clk.h>
28
29 #include <dt-bindings/clock/starfive,jh7110-crg.h>
30
31 #include "clkdev_if.h"
32 #include "hwreset_if.h"
33
34 static struct ofw_compat_data compat_data[] = {
35 { "starfive,jh7110-aoncrg", 1 },
36 { NULL, 0 }
37 };
38
39 static struct resource_spec res_spec[] = {
40 { SYS_RES_MEMORY, 0, RF_ACTIVE | RF_SHAREABLE },
41 RESOURCE_SPEC_END
42 };
43
44 /* parents */
45 static const char *gmac0_axi_p[] = { "stg_axiahb" };
46 static const char *gmac0_ahb_p[] = { "stg_axiahb" };
47 static const char *gmac0_tx_inv_p[] = { "gmac0_tx" };
48 static const char *gmac0_tx_p[] = { "gmac0_gtxclk", "gmac0_rmii_rtx" };
49 static const char *gmac0_rmii_rtx_p[] = { "gmac0_rmii_refin" };
50
51 /* AON clocks */
52 static const struct jh7110_clk_def aon_clks[] = {
53 JH7110_GATE(JH7110_AONCLK_GMAC0_AXI, "gmac0_axi", gmac0_axi_p),
54 JH7110_GATE(JH7110_AONCLK_GMAC0_AHB, "gmac0_ahb", gmac0_ahb_p),
55 JH7110_GATEMUX(JH7110_AONCLK_GMAC0_TX, "gmac0_tx", gmac0_tx_p),
56 JH7110_INV(JH7110_AONCLK_GMAC0_TX_INV, "gmac0_tx_inv", gmac0_tx_inv_p),
57 JH7110_DIV(JH7110_AONCLK_GMAC0_RMII_RTX, "gmac0_rmii_rtx",
58 gmac0_rmii_rtx_p, 30),
59 };
60
61 static int
jh7110_clk_aon_probe(device_t dev)62 jh7110_clk_aon_probe(device_t dev)
63 {
64 if (!ofw_bus_status_okay(dev))
65 return (ENXIO);
66
67 if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
68 return (ENXIO);
69
70 device_set_desc(dev, "StarFive JH7110 AON clock generator");
71
72 return (BUS_PROBE_DEFAULT);
73 }
74
75 static int
jh7110_clk_aon_attach(device_t dev)76 jh7110_clk_aon_attach(device_t dev)
77 {
78 struct jh7110_clkgen_softc *sc;
79 int err;
80
81 sc = device_get_softc(dev);
82
83 sc->reset_status_offset = AONCRG_RESET_STATUS;
84 sc->reset_selector_offset = AONCRG_RESET_SELECTOR;
85
86 mtx_init(&sc->mtx, device_get_nameunit(dev), NULL, MTX_DEF);
87
88 err = bus_alloc_resources(dev, res_spec, &sc->mem_res);
89 if (err != 0) {
90 device_printf(dev, "Couldn't allocate resources, error %d\n",
91 err);
92 return (ENXIO);
93 }
94
95 sc->clkdom = clkdom_create(dev);
96 if (sc->clkdom == NULL) {
97 device_printf(dev, "Couldn't create clkdom, error %d\n", err);
98 return (ENXIO);
99 }
100
101 for (int i = 0; i < nitems(aon_clks); i++) {
102 err = jh7110_clk_register(sc->clkdom, &aon_clks[i]);
103 if (err != 0) {
104 device_printf(dev,
105 "Couldn't register clk %s, error %d\n",
106 aon_clks[i].clkdef.name, err);
107 return (ENXIO);
108 }
109 }
110
111 if (clkdom_finit(sc->clkdom) != 0)
112 panic("Cannot finalize clkdom initialization\n");
113
114 if (bootverbose)
115 clkdom_dump(sc->clkdom);
116
117 hwreset_register_ofw_provider(dev);
118
119 return (0);
120 }
121
122 static void
jh7110_clk_aon_device_lock(device_t dev)123 jh7110_clk_aon_device_lock(device_t dev)
124 {
125 struct jh7110_clkgen_softc *sc;
126
127 sc = device_get_softc(dev);
128 mtx_lock(&sc->mtx);
129 }
130
131 static void
jh7110_clk_aon_device_unlock(device_t dev)132 jh7110_clk_aon_device_unlock(device_t dev)
133 {
134 struct jh7110_clkgen_softc *sc;
135
136 sc = device_get_softc(dev);
137 mtx_unlock(&sc->mtx);
138 }
139
140 static int
jh7110_clk_aon_detach(device_t dev)141 jh7110_clk_aon_detach(device_t dev)
142 {
143 /* Detach not supported */
144 return (EBUSY);
145 }
146
147 static device_method_t jh7110_clk_aon_methods[] = {
148 /* Device interface */
149 DEVMETHOD(device_probe, jh7110_clk_aon_probe),
150 DEVMETHOD(device_attach, jh7110_clk_aon_attach),
151 DEVMETHOD(device_detach, jh7110_clk_aon_detach),
152
153 /* clkdev interface */
154 DEVMETHOD(clkdev_device_lock, jh7110_clk_aon_device_lock),
155 DEVMETHOD(clkdev_device_unlock, jh7110_clk_aon_device_unlock),
156
157 /* Reset interface */
158 DEVMETHOD(hwreset_assert, jh7110_reset_assert),
159 DEVMETHOD(hwreset_is_asserted, jh7110_reset_is_asserted),
160
161 DEVMETHOD_END
162 };
163
164 DEFINE_CLASS_0(jh7110_aon, jh7110_aon_driver, jh7110_clk_aon_methods,
165 sizeof(struct jh7110_clkgen_softc));
166 EARLY_DRIVER_MODULE(jh7110_aon, simplebus, jh7110_aon_driver, 0, 0,
167 BUS_PASS_BUS + BUS_PASS_ORDER_LATE);
168 MODULE_VERSION(jh7110_aon, 1);
169