xref: /netbsd-src/sys/dev/cardbus/if_malo_cardbus.c (revision 93c9f12875816c13f2d215d5f46ef97fdaeb8a3e)
1 /*	$NetBSD: if_malo_cardbus.c,v 1.1 2018/12/14 21:49:22 jakllsch Exp $ */
2 /*	$OpenBSD: if_malo_cardbus.c,v 1.12 2013/12/06 21:03:02 deraadt Exp $ */
3 
4 /*
5  * Copyright (c) 2006 Claudio Jeker <claudio@openbsd.org>
6  *
7  * Permission to use, copy, modify, and distribute this software for any
8  * purpose with or without fee is hereby granted, provided that the above
9  * copyright notice and this permission notice appear in all copies.
10  *
11  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
12  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
13  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
14  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
15  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
16  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
17  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
18  */
19 
20 #include <sys/cdefs.h>
21 __KERNEL_RCSID(0, "$NetBSD: if_malo_cardbus.c,v 1.1 2018/12/14 21:49:22 jakllsch Exp $");
22 
23 #include <sys/param.h>
24 #include <sys/mbuf.h>
25 #include <sys/socket.h>
26 #include <sys/systm.h>
27 
28 #include <net/if.h>
29 #include <net/if_dl.h>
30 #include <net/if_media.h>
31 #include <net/if_ether.h>
32 
33 #include <netinet/in.h>
34 
35 #include <net80211/ieee80211_var.h>
36 #include <net80211/ieee80211_radiotap.h>
37 
38 #include <dev/pci/pcireg.h>
39 #include <dev/pci/pcivar.h>
40 #include <dev/pci/pcidevs.h>
41 
42 #include <dev/cardbus/cardbusvar.h>
43 
44 #include <dev/ic/malovar.h>
45 
46 struct malo_cardbus_softc {
47 	struct malo_softc	sc_malo;
48 
49 	/* cardbus specific goo */
50 	cardbus_devfunc_t	sc_ct;
51 	pcitag_t		sc_tag;
52 	void			*sc_ih;
53 	bus_size_t		sc_mapsize1;
54 	bus_size_t		sc_mapsize2;
55 	pcireg_t		sc_bar1_val;
56 	pcireg_t		sc_bar2_val;
57 };
58 
59 int	malo_cardbus_match(device_t, cfdata_t, void *);
60 void	malo_cardbus_attach(device_t, device_t, void *);
61 int	malo_cardbus_detach(device_t, int);
62 
63 CFATTACH_DECL_NEW(malo_cardbus, sizeof (struct malo_cardbus_softc),
64     malo_cardbus_match, malo_cardbus_attach, malo_cardbus_detach, NULL);
65 
66 void	malo_cardbus_setup(struct malo_cardbus_softc *csc);
67 int	malo_cardbus_enable(struct malo_softc *sc);
68 void	malo_cardbus_disable(struct malo_softc *sc);
69 
70 int
malo_cardbus_match(device_t parent,cfdata_t match,void * aux)71 malo_cardbus_match(device_t parent, cfdata_t match, void *aux)
72 {
73 	struct cardbus_attach_args *ca = aux;
74 
75 	if (PCI_VENDOR(ca->ca_id) == PCI_VENDOR_MARVELL) {
76 		switch (PCI_PRODUCT(ca->ca_id)) {
77 			case PCI_PRODUCT_MARVELL_88W8310:
78 			case PCI_PRODUCT_MARVELL_88W8335_1:
79 			case PCI_PRODUCT_MARVELL_88W8335_2:
80 				return 1;
81 			default:
82 				return 0;
83 		}
84 	}
85 
86 	return 0;
87 }
88 
89 void
malo_cardbus_attach(struct device * parent,struct device * self,void * aux)90 malo_cardbus_attach(struct device *parent, struct device *self, void *aux)
91 {
92 	struct malo_cardbus_softc *csc = device_private(self);
93 	struct malo_softc *sc = &csc->sc_malo;
94 	struct cardbus_attach_args *ca = aux;
95 	cardbus_devfunc_t ct = ca->ca_ct;
96 	char devinfo[256];
97 	bus_addr_t base;
98 	int error;
99 
100 	pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo));
101 	aprint_normal(": %s\n", devinfo);
102 
103 	sc->sc_dev = self;
104 	sc->sc_dmat = ca->ca_dmat;
105 	csc->sc_ct = ct;
106 	csc->sc_tag = ca->ca_tag;
107 
108 	/* power management hooks */
109 	sc->sc_enable = malo_cardbus_enable;
110 	sc->sc_disable = malo_cardbus_disable;
111 
112 	/* map control/status registers */
113 	error = Cardbus_mapreg_map(ct, PCI_BAR0,
114 	    PCI_MAPREG_TYPE_MEM, 0, &sc->sc_mem1_bt, &sc->sc_mem1_bh,
115 	    &base, &csc->sc_mapsize1);
116 	if (error != 0) {
117 		aprint_error(": can't map mem1 space\n");
118 		return;
119 	}
120 	csc->sc_bar1_val = base | PCI_MAPREG_TYPE_MEM;
121 
122 	error = Cardbus_mapreg_map(ct, PCI_BAR1,
123 	    PCI_MAPREG_TYPE_MEM, 0, &sc->sc_mem2_bt, &sc->sc_mem2_bh,
124 	    &base, &csc->sc_mapsize2);
125 	if (error != 0) {
126 		aprint_error(": can't map mem2 space\n");
127 		Cardbus_mapreg_unmap(ct, PCI_BAR0, sc->sc_mem1_bt,
128 		    sc->sc_mem1_bh, csc->sc_mapsize1);
129 		return;
130 	}
131 	csc->sc_bar2_val = base | PCI_MAPREG_TYPE_MEM;
132 
133 	/* set up the PCI configuration registers */
134 	malo_cardbus_setup(csc);
135 
136 	error = malo_attach(sc);
137 #if notyet
138 	if (error != 0)
139 		malo_cardbus_detach(sc->sc_dev, 0);
140 #endif
141 
142 	Cardbus_function_disable(ct);
143 }
144 
145 int
malo_cardbus_detach(struct device * self,int flags)146 malo_cardbus_detach(struct device *self, int flags)
147 {
148 	struct malo_cardbus_softc *csc = device_private(self);
149 	struct malo_softc *sc = &csc->sc_malo;
150 	cardbus_devfunc_t ct = csc->sc_ct;
151 	int error;
152 
153 	error = malo_detach(sc);
154 	if (error != 0)
155 		return error;
156 
157 	/* unhook the interrupt handler */
158 	if (csc->sc_ih != NULL) {
159 		Cardbus_intr_disestablish(ct, csc->sc_ih);
160 		csc->sc_ih = NULL;
161 	}
162 
163 	/* release bus space and close window */
164 	Cardbus_mapreg_unmap(ct, PCI_BAR0, sc->sc_mem1_bt,
165 	    sc->sc_mem1_bh, csc->sc_mapsize1);
166 	Cardbus_mapreg_unmap(ct, PCI_BAR1, sc->sc_mem2_bt,
167 	    sc->sc_mem2_bh, csc->sc_mapsize2);
168 
169 	return 0;
170 }
171 
172 void
malo_cardbus_setup(struct malo_cardbus_softc * csc)173 malo_cardbus_setup(struct malo_cardbus_softc *csc)
174 {
175 	cardbus_devfunc_t ct = csc->sc_ct;
176 	cardbus_chipset_tag_t cc = ct->ct_cc;
177 	cardbus_function_tag_t cf = ct->ct_cf;
178 	pcireg_t reg;
179 
180 	/* program the BAR */
181 	Cardbus_conf_write(ct, csc->sc_tag, PCI_BAR0, csc->sc_bar1_val);
182 	Cardbus_conf_write(ct, csc->sc_tag, PCI_BAR1, csc->sc_bar2_val);
183 
184 	/* make sure the right access type is on the cardbus bridge */
185 	(*cf->cardbus_ctrl)(cc, CARDBUS_MEM_ENABLE);
186 	(*cf->cardbus_ctrl)(cc, CARDBUS_BM_ENABLE);
187 
188 	/* enable the appropriate bits in the PCI CSR */
189 	reg = Cardbus_conf_read(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG);
190 	reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
191 	Cardbus_conf_write(ct, csc->sc_tag, PCI_COMMAND_STATUS_REG, reg);
192 }
193 
194 int
malo_cardbus_enable(struct malo_softc * sc)195 malo_cardbus_enable(struct malo_softc *sc)
196 {
197 	struct malo_cardbus_softc *csc = (struct malo_cardbus_softc *)sc;
198 	cardbus_devfunc_t ct = csc->sc_ct;
199 
200 	/* power on the socket */
201 	Cardbus_function_enable(ct);
202 
203 	/* setup the PCI configuration registers */
204 	malo_cardbus_setup(csc);
205 
206 	/* map and establish the interrupt handler */
207 	csc->sc_ih = Cardbus_intr_establish(ct, IPL_NET,
208 	    malo_intr, sc);
209 	if (csc->sc_ih == NULL) {
210 		aprint_error_dev(sc->sc_dev,
211 		    "could not establish interrupt\n");
212 		Cardbus_function_disable(ct);
213 		return 1;
214 	}
215 
216 	return 0;
217 }
218 
219 void
malo_cardbus_disable(struct malo_softc * sc)220 malo_cardbus_disable(struct malo_softc *sc)
221 {
222 	struct malo_cardbus_softc *csc = (struct malo_cardbus_softc *)sc;
223 	cardbus_devfunc_t ct = csc->sc_ct;
224 
225 	/* unhook the interrupt handler */
226 	Cardbus_intr_disestablish(ct, csc->sc_ih);
227 	csc->sc_ih = NULL;
228 
229 	/* power down the socket */
230 	Cardbus_function_disable(ct);
231 }
232