1 /* $NetBSD: sdhc_acpi.c,v 1.22 2024/08/17 07:00:35 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 2016 Kimihiro Nonaka <nonaka@NetBSD.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: sdhc_acpi.c,v 1.22 2024/08/17 07:00:35 skrll Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/device.h> 33 #include <sys/systm.h> 34 #include <sys/kmem.h> 35 36 #include <dev/acpi/acpireg.h> 37 #include <dev/acpi/acpivar.h> 38 #include <dev/acpi/acpi_intr.h> 39 40 #include <dev/sdmmc/sdhcreg.h> 41 #include <dev/sdmmc/sdhcvar.h> 42 #include <dev/sdmmc/sdmmcvar.h> 43 44 /* Freescale ESDHC */ 45 #define SDHC_ESDHC_FLAGS \ 46 (SDHC_FLAG_HAVE_DVS|SDHC_FLAG_NO_PWR0|SDHC_FLAG_32BIT_ACCESS|SDHC_FLAG_ENHANCED) 47 48 /* Rockchip eMMC device-specific method (_DSM) - 434addb0-8ff3-49d5-a724-95844b79ad1f */ 49 static UINT8 sdhc_acpi_rockchip_dsm_uuid[ACPI_UUID_LENGTH] = { 50 0xb0, 0xdd, 0x4a, 0x43, 0xf3, 0x8f, 0xd5, 0x49, 51 0xa7, 0x24, 0x95, 0x84, 0x4b, 0x79, 0xad, 0x1f 52 }; 53 #define ROCKCHIP_DSM_REV 0 54 #define ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK 1 55 56 #define _COMPONENT ACPI_RESOURCE_COMPONENT 57 ACPI_MODULE_NAME ("sdhc_acpi") 58 59 static int sdhc_acpi_match(device_t, cfdata_t, void *); 60 static void sdhc_acpi_attach(device_t, device_t, void *); 61 static int sdhc_acpi_detach(device_t, int); 62 static bool sdhc_acpi_resume(device_t, const pmf_qual_t *); 63 64 struct sdhc_acpi_softc { 65 struct sdhc_softc sc; 66 bus_space_tag_t sc_memt; 67 bus_space_handle_t sc_memh; 68 bus_size_t sc_memsize; 69 void *sc_ih; 70 ACPI_HANDLE sc_handle; 71 72 ACPI_HANDLE sc_crs, sc_srs; 73 ACPI_BUFFER sc_crs_buffer; 74 }; 75 76 CFATTACH_DECL_NEW(sdhc_acpi, sizeof(struct sdhc_acpi_softc), 77 sdhc_acpi_match, sdhc_acpi_attach, sdhc_acpi_detach, NULL); 78 79 static void sdhc_acpi_intel_emmc_hw_reset(struct sdhc_softc *, 80 struct sdhc_host *); 81 82 static int sdhc_acpi_rockchip_bus_clock(struct sdhc_softc *, 83 int); 84 85 static const struct sdhc_acpi_slot { 86 const char *hid; 87 const char *uid; 88 int type; 89 #define SLOT_TYPE_SD 0 /* SD or SDIO */ 90 #define SLOT_TYPE_EMMC 1 /* eMMC */ 91 uint32_t flags; 92 } sdhc_acpi_slot_map[] = { 93 { .hid = "80865ACA", .type = SLOT_TYPE_SD }, 94 { .hid = "80865ACC", .type = SLOT_TYPE_EMMC }, 95 { .hid = "80865AD0", .type = SLOT_TYPE_SD }, 96 { .hid = "80860F14", .uid = "1", .type = SLOT_TYPE_EMMC }, 97 { .hid = "80860F14", .uid = "3", .type = SLOT_TYPE_SD }, 98 { .hid = "80860F16", .type = SLOT_TYPE_SD }, 99 { .hid = "INT33BB", .uid = "2", .type = SLOT_TYPE_SD }, 100 { .hid = "INT33BB", .uid = "3", .type = SLOT_TYPE_SD }, 101 { .hid = "INT33C6", .type = SLOT_TYPE_SD }, 102 { .hid = "INT3436", .type = SLOT_TYPE_SD }, 103 { .hid = "INT344D", .type = SLOT_TYPE_SD }, 104 { .hid = "NXP0003", .uid = "0", .type = SLOT_TYPE_SD, 105 .flags = SDHC_ESDHC_FLAGS }, 106 { .hid = "NXP0003", .uid = "1", .type = SLOT_TYPE_EMMC, 107 .flags = SDHC_ESDHC_FLAGS }, 108 { .hid = "RKCP0D40", .type = SLOT_TYPE_SD, 109 .flags = SDHC_FLAG_32BIT_ACCESS | 110 SDHC_FLAG_8BIT_MODE | 111 SDHC_FLAG_SINGLE_POWER_WRITE }, 112 113 /* Generic IDs last */ 114 { .hid = "PNP0D40", .type = SLOT_TYPE_SD }, 115 { .hid = "PNP0FFF", .uid = "3", .type = SLOT_TYPE_SD }, 116 }; 117 118 static const struct sdhc_acpi_slot * 119 sdhc_acpi_find_slot(ACPI_DEVICE_INFO *ad) 120 { 121 const struct sdhc_acpi_slot *slot; 122 const char *hid, *uid; 123 size_t i; 124 125 hid = ad->HardwareId.String; 126 uid = ad->UniqueId.String; 127 128 if (!(ad->Valid & ACPI_VALID_HID) || hid == NULL) 129 return NULL; 130 131 for (i = 0; i < __arraycount(sdhc_acpi_slot_map); i++) { 132 slot = &sdhc_acpi_slot_map[i]; 133 const char * const slot_id[] = { slot->hid, NULL }; 134 if (acpi_match_hid(ad, slot_id)) { 135 if (slot->uid == NULL || 136 ((ad->Valid & ACPI_VALID_UID) != 0 && 137 uid != NULL && 138 strcmp(uid, slot->uid) == 0)) 139 return slot; 140 } 141 } 142 return NULL; 143 } 144 145 static int 146 sdhc_acpi_match(device_t parent, cfdata_t match, void *opaque) 147 { 148 struct acpi_attach_args *aa = opaque; 149 150 if (aa->aa_node->ad_type != ACPI_TYPE_DEVICE) 151 return 0; 152 153 return sdhc_acpi_find_slot(aa->aa_node->ad_devinfo) != NULL; 154 } 155 156 static void 157 sdhc_acpi_attach(device_t parent, device_t self, void *opaque) 158 { 159 struct sdhc_acpi_softc *sc = device_private(self); 160 struct acpi_attach_args *aa = opaque; 161 const struct sdhc_acpi_slot *slot; 162 struct acpi_resources res; 163 struct acpi_mem *mem; 164 struct acpi_irq *irq; 165 ACPI_STATUS rv; 166 ACPI_INTEGER clock_freq; 167 ACPI_INTEGER caps, caps_mask; 168 ACPI_INTEGER funcs; 169 bool non_removable; 170 171 sc->sc.sc_dev = self; 172 sc->sc.sc_dmat = aa->aa_dmat; 173 sc->sc.sc_host = NULL; 174 sc->sc_memt = aa->aa_memt; 175 sc->sc_handle = aa->aa_node->ad_handle; 176 177 slot = sdhc_acpi_find_slot(aa->aa_node->ad_devinfo); 178 if (slot->type == SLOT_TYPE_EMMC) 179 sc->sc.sc_vendor_hw_reset = sdhc_acpi_intel_emmc_hw_reset; 180 181 rv = acpi_dsm_query(sc->sc_handle, sdhc_acpi_rockchip_dsm_uuid, 182 ROCKCHIP_DSM_REV, &funcs); 183 if (ACPI_SUCCESS(rv) && 184 ISSET(funcs, __BIT(ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK))) { 185 sc->sc.sc_vendor_bus_clock = sdhc_acpi_rockchip_bus_clock; 186 } 187 188 rv = acpi_resource_parse(self, aa->aa_node->ad_handle, "_CRS", 189 &res, &acpi_resource_parse_ops_default); 190 if (ACPI_FAILURE(rv)) 191 return; 192 193 AcpiGetHandle(aa->aa_node->ad_handle, "_CRS", &sc->sc_crs); 194 AcpiGetHandle(aa->aa_node->ad_handle, "_SRS", &sc->sc_srs); 195 if (sc->sc_crs && sc->sc_srs) { 196 /* XXX Why need this? */ 197 sc->sc_crs_buffer.Pointer = NULL; 198 sc->sc_crs_buffer.Length = ACPI_ALLOCATE_LOCAL_BUFFER; 199 rv = AcpiGetCurrentResources(sc->sc_crs, &sc->sc_crs_buffer); 200 if (ACPI_FAILURE(rv)) 201 sc->sc_crs = sc->sc_srs = NULL; 202 } 203 204 mem = acpi_res_mem(&res, 0); 205 irq = acpi_res_irq(&res, 0); 206 if (mem == NULL || irq == NULL) { 207 aprint_error_dev(self, "incomplete resources\n"); 208 goto cleanup; 209 } 210 if (mem->ar_length == 0) { 211 aprint_error_dev(self, "zero length memory resource\n"); 212 goto cleanup; 213 } 214 sc->sc_memsize = mem->ar_length; 215 216 if (bus_space_map(sc->sc_memt, mem->ar_base, sc->sc_memsize, 0, 217 &sc->sc_memh)) { 218 aprint_error_dev(self, "couldn't map registers\n"); 219 goto cleanup; 220 } 221 222 sc->sc_ih = acpi_intr_establish(self, 223 (uint64_t)(uintptr_t)aa->aa_node->ad_handle, 224 IPL_BIO, false, sdhc_intr, &sc->sc, device_xname(self)); 225 if (sc->sc_ih == NULL) { 226 aprint_error_dev(self, 227 "couldn't establish interrupt handler\n"); 228 goto unmap; 229 } 230 231 sc->sc.sc_host = kmem_zalloc(sizeof(struct sdhc_host *), KM_SLEEP); 232 233 sc->sc.sc_flags |= slot->flags; 234 235 /* Enable DMA transfer */ 236 sc->sc.sc_flags |= SDHC_FLAG_USE_DMA; 237 238 rv = acpi_dsd_bool(aa->aa_node->ad_handle, "non-removable", 239 &non_removable); 240 if (ACPI_SUCCESS(rv) && non_removable) 241 sc->sc.sc_flags |= SDHC_FLAG_NON_REMOVABLE; 242 243 /* Read clock frequency from device properties */ 244 rv = acpi_dsd_integer(aa->aa_node->ad_handle, "clock-frequency", 245 &clock_freq); 246 if (ACPI_SUCCESS(rv)) { 247 sc->sc.sc_clkbase = clock_freq / 1000; 248 sc->sc.sc_flags |= SDHC_FLAG_NO_CLKBASE; 249 } 250 251 /* Capability overrides */ 252 caps = caps_mask = 0; 253 acpi_dsd_integer(aa->aa_node->ad_handle, "sdhci-caps-mask", &caps_mask); 254 acpi_dsd_integer(aa->aa_node->ad_handle, "sdhci-caps", &caps); 255 if (caps || caps_mask) { 256 sc->sc.sc_caps = bus_space_read_4(sc->sc_memt, sc->sc_memh, 257 SDHC_CAPABILITIES); 258 sc->sc.sc_caps &= ~(caps_mask & 0xffffffff); 259 sc->sc.sc_caps |= (caps & 0xffffffff); 260 sc->sc.sc_caps2 = bus_space_read_4(sc->sc_memt, 261 sc->sc_memh, SDHC_CAPABILITIES2); 262 sc->sc.sc_caps2 &= ~(caps_mask >> 32); 263 sc->sc.sc_caps2 |= (caps >> 32); 264 sc->sc.sc_flags |= SDHC_FLAG_HOSTCAPS; 265 } 266 267 if (sdhc_host_found(&sc->sc, sc->sc_memt, sc->sc_memh, 268 sc->sc_memsize) != 0) { 269 aprint_error_dev(self, "couldn't initialize host\n"); 270 goto fail; 271 } 272 273 if (!pmf_device_register1(self, sdhc_suspend, sdhc_acpi_resume, 274 sdhc_shutdown)) { 275 aprint_error_dev(self, "couldn't establish powerhook\n"); 276 } 277 278 acpi_resource_cleanup(&res); 279 return; 280 281 fail: 282 if (sc->sc.sc_host != NULL) 283 kmem_free(sc->sc.sc_host, sizeof(struct sdhc_host *)); 284 sc->sc.sc_host = NULL; 285 if (sc->sc_ih != NULL) 286 acpi_intr_disestablish(sc->sc_ih); 287 sc->sc_ih = NULL; 288 unmap: 289 bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_memsize); 290 sc->sc_memsize = 0; 291 cleanup: 292 if (sc->sc_crs_buffer.Pointer) 293 ACPI_FREE(sc->sc_crs_buffer.Pointer); 294 sc->sc_crs_buffer.Pointer = NULL; 295 acpi_resource_cleanup(&res); 296 } 297 298 static int 299 sdhc_acpi_detach(device_t self, int flags) 300 { 301 struct sdhc_acpi_softc *sc = device_private(self); 302 int rv; 303 304 pmf_device_deregister(self); 305 306 rv = sdhc_detach(&sc->sc, flags); 307 if (rv) 308 return rv; 309 310 if (sc->sc_ih != NULL) 311 acpi_intr_disestablish(sc->sc_ih); 312 313 if (sc->sc.sc_host != NULL) 314 kmem_free(sc->sc.sc_host, sizeof(struct sdhc_host *)); 315 316 if (sc->sc_memsize > 0) 317 bus_space_unmap(sc->sc_memt, sc->sc_memh, sc->sc_memsize); 318 319 if (sc->sc_crs_buffer.Pointer) 320 ACPI_FREE(sc->sc_crs_buffer.Pointer); 321 322 return 0; 323 } 324 325 static bool 326 sdhc_acpi_resume(device_t self, const pmf_qual_t *qual) 327 { 328 struct sdhc_acpi_softc *sc = device_private(self); 329 ACPI_STATUS rv; 330 331 if (sc->sc_crs && sc->sc_srs) { 332 rv = AcpiSetCurrentResources(sc->sc_srs, &sc->sc_crs_buffer); 333 if (ACPI_FAILURE(rv)) 334 printf("%s: _SRS failed: %s\n", 335 device_xname(self), AcpiFormatException(rv)); 336 } 337 338 return sdhc_resume(self, qual); 339 } 340 341 static void 342 sdhc_acpi_intel_emmc_hw_reset(struct sdhc_softc *sc, struct sdhc_host *hp) 343 { 344 kmutex_t *plock = sdhc_host_lock(hp); 345 uint8_t reg; 346 347 mutex_enter(plock); 348 349 reg = sdhc_host_read_1(hp, SDHC_POWER_CTL); 350 reg |= 0x10; 351 sdhc_host_write_1(hp, SDHC_POWER_CTL, reg); 352 353 sdmmc_delay(10); 354 355 reg &= ~0x10; 356 sdhc_host_write_1(hp, SDHC_POWER_CTL, reg); 357 358 sdmmc_delay(1000); 359 360 mutex_exit(plock); 361 } 362 363 static int 364 sdhc_acpi_rockchip_bus_clock(struct sdhc_softc *sc, int freq) 365 { 366 struct sdhc_acpi_softc *asc = (struct sdhc_acpi_softc *)sc; 367 ACPI_STATUS rv; 368 ACPI_OBJECT targetfreq; 369 ACPI_OBJECT arg3; 370 ACPI_INTEGER actfreq; 371 372 targetfreq.Integer.Type = ACPI_TYPE_INTEGER; 373 targetfreq.Integer.Value = freq * 1000; 374 arg3.Package.Type = ACPI_TYPE_PACKAGE; 375 arg3.Package.Count = 1; 376 arg3.Package.Elements = &targetfreq; 377 378 rv = acpi_dsm_integer(asc->sc_handle, sdhc_acpi_rockchip_dsm_uuid, 379 ROCKCHIP_DSM_REV, ROCKCHIP_DSM_FUNC_SET_CARD_CLOCK, &arg3, 380 &actfreq); 381 if (ACPI_FAILURE(rv)) { 382 aprint_error_dev(sc->sc_dev, 383 "eMMC Set Card Clock DSM failed: %s\n", 384 AcpiFormatException(rv)); 385 return ENXIO; 386 } 387 388 aprint_debug_dev(sc->sc_dev, 389 "eMMC Set Card Clock DSM returned %" PRIu64 " Hz\n", actfreq); 390 if (actfreq == 0 && freq != 0) { 391 return EINVAL; 392 } 393 394 return 0; 395 } 396