1 /* SPDX-License-Identifier: BSD-3-Clause 2 * Copyright(c) 2018 Intel Corporation 3 */ 4 5 #ifndef _COMP_PERF_OPS_ 6 #define _COMP_PERF_OPS_ 7 8 #include <rte_dev.h> 9 10 #define MAX_LIST 32 11 #define MIN_COMPRESSED_BUF_SIZE 8 12 #define EXPANSE_RATIO 1.1 13 #define MAX_MBUF_DATA_SIZE (UINT16_MAX - RTE_PKTMBUF_HEADROOM) 14 #define MAX_SEG_SIZE ((int)(MAX_MBUF_DATA_SIZE / EXPANSE_RATIO)) 15 16 extern const char *comp_perf_test_type_strs[]; 17 18 /* Cleanup state machine */ 19 enum cleanup_st { 20 ST_CLEAR = 0, 21 ST_TEST_DATA, 22 ST_COMPDEV, 23 ST_INPUT_DATA, 24 ST_MEMORY_ALLOC, 25 ST_DURING_TEST 26 }; 27 28 enum cperf_test_type { 29 CPERF_TEST_TYPE_THROUGHPUT, 30 CPERF_TEST_TYPE_VERIFY, 31 CPERF_TEST_TYPE_PMDCC 32 }; 33 34 enum comp_operation { 35 COMPRESS = (1 << 0), 36 DECOMPRESS = (1 << 1), 37 COMPRESS_DECOMPRESS = (COMPRESS | DECOMPRESS), 38 }; 39 40 struct range_list { 41 uint8_t min; 42 uint8_t max; 43 uint8_t inc; 44 uint8_t count; 45 uint8_t list[MAX_LIST]; 46 }; 47 48 struct comp_test_data { 49 char driver_name[RTE_DEV_NAME_MAX_LEN]; 50 char input_file[PATH_MAX]; 51 enum cperf_test_type test; 52 53 uint8_t *input_data; 54 size_t input_data_sz; 55 uint16_t nb_qps; 56 uint16_t seg_sz; 57 uint16_t out_seg_sz; 58 uint16_t burst_sz; 59 uint32_t pool_sz; 60 uint32_t num_iter; 61 uint16_t max_sgl_segs; 62 uint32_t total_segs; 63 64 uint8_t lz4_flags; 65 enum rte_comp_huffman huffman_enc; 66 enum comp_operation test_op; 67 enum rte_comp_algorithm test_algo; 68 69 int window_sz; 70 struct range_list level_lst; 71 uint8_t level; 72 int use_external_mbufs; 73 74 double ratio; 75 enum cleanup_st cleanup; 76 int perf_comp_force_stop; 77 78 uint32_t cyclecount_delay; 79 }; 80 81 int 82 comp_perf_options_parse(struct comp_test_data *test_data, int argc, 83 char **argv); 84 85 void 86 comp_perf_options_default(struct comp_test_data *test_data); 87 88 int 89 comp_perf_options_check(struct comp_test_data *test_data); 90 91 #endif 92