xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/clk/clk_11_0_0_offset.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: clk_11_0_0_offset.h,v 1.2 2021/12/18 23:45:09 riastradh Exp $	*/
2 
3 /*
4  * Copyright (C) 2019  Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included
14  * in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 #ifndef _clk_11_0_0_OFFSET_HEADER
24 #define _clk_11_0_0_OFFSET_HEADER
25 
26 
27 // addressBlock: clk_clk3_0_SmuClkDec
28 // base address: 0x5c800
29 #define mmCLK3_0_CLK3_CLK_PLL_REQ                                                                      0x000e
30 #define mmCLK3_0_CLK3_CLK_PLL_REQ_BASE_IDX                                                             3
31 #define mmCLK3_0_CLK3_CLK2_DFS_CNTL                                                                    0x0054
32 #define mmCLK3_0_CLK3_CLK2_DFS_CNTL_BASE_IDX                                                           3
33 
34 
35 #endif
36