1//===--- BuiltinsPPC.def - PowerPC Builtin function database ----*- C++ -*-===// 2// 3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4// See https://llvm.org/LICENSE.txt for license information. 5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6// 7//===----------------------------------------------------------------------===// 8// 9// This file defines the PowerPC-specific builtin function database. Users of 10// this file must define the BUILTIN macro or the CUSTOM_BUILTIN macro to 11// make use of this information. The latter is used for builtins requiring 12// custom code generation and checking. 13// 14//===----------------------------------------------------------------------===// 15 16// FIXME: this needs to be the full list supported by GCC. Right now, I'm just 17// adding stuff on demand. 18 19// The format of this database matches clang/Basic/Builtins.def except for the 20// MMA builtins that are using their own format documented below. 21 22#if defined(BUILTIN) && !defined(CUSTOM_BUILTIN) 23# define CUSTOM_BUILTIN(ID, INTR, TYPES, ACCUMULATE) \ 24 BUILTIN(__builtin_##ID, "i.", "t") 25#elif defined(CUSTOM_BUILTIN) && !defined(BUILTIN) 26# define BUILTIN(ID, TYPES, ATTRS) 27#endif 28 29#define UNALIASED_CUSTOM_BUILTIN(ID, TYPES, ACCUMULATE) \ 30 CUSTOM_BUILTIN(ID, ID, TYPES, ACCUMULATE) 31 32BUILTIN(__builtin_ppc_get_timebase, "ULLi", "n") 33 34// This is just a placeholder, the types and attributes are wrong. 35BUILTIN(__builtin_altivec_vaddcuw, "V4UiV4UiV4Ui", "") 36 37BUILTIN(__builtin_altivec_vaddsbs, "V16ScV16ScV16Sc", "") 38BUILTIN(__builtin_altivec_vaddubs, "V16UcV16UcV16Uc", "") 39BUILTIN(__builtin_altivec_vaddshs, "V8SsV8SsV8Ss", "") 40BUILTIN(__builtin_altivec_vadduhs, "V8UsV8UsV8Us", "") 41BUILTIN(__builtin_altivec_vaddsws, "V4SiV4SiV4Si", "") 42BUILTIN(__builtin_altivec_vadduws, "V4UiV4UiV4Ui", "") 43BUILTIN(__builtin_altivec_vaddeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") 44BUILTIN(__builtin_altivec_vaddcuq, "V1ULLLiV1ULLLiV1ULLLi","") 45BUILTIN(__builtin_altivec_vaddecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") 46BUILTIN(__builtin_altivec_vadduqm, "V1ULLLiV16UcV16Uc","") 47 48BUILTIN(__builtin_altivec_vsubsbs, "V16ScV16ScV16Sc", "") 49BUILTIN(__builtin_altivec_vsububs, "V16UcV16UcV16Uc", "") 50BUILTIN(__builtin_altivec_vsubshs, "V8SsV8SsV8Ss", "") 51BUILTIN(__builtin_altivec_vsubuhs, "V8UsV8UsV8Us", "") 52BUILTIN(__builtin_altivec_vsubsws, "V4SiV4SiV4Si", "") 53BUILTIN(__builtin_altivec_vsubuws, "V4UiV4UiV4Ui", "") 54BUILTIN(__builtin_altivec_vsubeuqm, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") 55BUILTIN(__builtin_altivec_vsubcuq, "V1ULLLiV1ULLLiV1ULLLi","") 56BUILTIN(__builtin_altivec_vsubecuq, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi","") 57BUILTIN(__builtin_altivec_vsubuqm, "V1ULLLiV16UcV16Uc","") 58 59BUILTIN(__builtin_altivec_vavgsb, "V16ScV16ScV16Sc", "") 60BUILTIN(__builtin_altivec_vavgub, "V16UcV16UcV16Uc", "") 61BUILTIN(__builtin_altivec_vavgsh, "V8SsV8SsV8Ss", "") 62BUILTIN(__builtin_altivec_vavguh, "V8UsV8UsV8Us", "") 63BUILTIN(__builtin_altivec_vavgsw, "V4SiV4SiV4Si", "") 64BUILTIN(__builtin_altivec_vavguw, "V4UiV4UiV4Ui", "") 65 66BUILTIN(__builtin_altivec_vrfip, "V4fV4f", "") 67 68BUILTIN(__builtin_altivec_vcfsx, "V4fV4SiIi", "") 69BUILTIN(__builtin_altivec_vcfux, "V4fV4UiIi", "") 70BUILTIN(__builtin_altivec_vctsxs, "V4SiV4fIi", "") 71BUILTIN(__builtin_altivec_vctuxs, "V4UiV4fIi", "") 72 73BUILTIN(__builtin_altivec_dss, "vUIi", "") 74BUILTIN(__builtin_altivec_dssall, "v", "") 75BUILTIN(__builtin_altivec_dst, "vvC*iUIi", "") 76BUILTIN(__builtin_altivec_dstt, "vvC*iUIi", "") 77BUILTIN(__builtin_altivec_dstst, "vvC*iUIi", "") 78BUILTIN(__builtin_altivec_dststt, "vvC*iUIi", "") 79 80BUILTIN(__builtin_altivec_vexptefp, "V4fV4f", "") 81 82BUILTIN(__builtin_altivec_vrfim, "V4fV4f", "") 83 84BUILTIN(__builtin_altivec_lvx, "V4iivC*", "") 85BUILTIN(__builtin_altivec_lvxl, "V4iivC*", "") 86BUILTIN(__builtin_altivec_lvebx, "V16civC*", "") 87BUILTIN(__builtin_altivec_lvehx, "V8sivC*", "") 88BUILTIN(__builtin_altivec_lvewx, "V4iivC*", "") 89 90BUILTIN(__builtin_altivec_vlogefp, "V4fV4f", "") 91 92BUILTIN(__builtin_altivec_lvsl, "V16cUcvC*", "") 93BUILTIN(__builtin_altivec_lvsr, "V16cUcvC*", "") 94 95BUILTIN(__builtin_altivec_vmaddfp, "V4fV4fV4fV4f", "") 96BUILTIN(__builtin_altivec_vmhaddshs, "V8sV8sV8sV8s", "") 97BUILTIN(__builtin_altivec_vmhraddshs, "V8sV8sV8sV8s", "") 98 99BUILTIN(__builtin_altivec_vmsumubm, "V4UiV16UcV16UcV4Ui", "") 100BUILTIN(__builtin_altivec_vmsummbm, "V4SiV16ScV16UcV4Si", "") 101BUILTIN(__builtin_altivec_vmsumuhm, "V4UiV8UsV8UsV4Ui", "") 102BUILTIN(__builtin_altivec_vmsumshm, "V4SiV8SsV8SsV4Si", "") 103BUILTIN(__builtin_altivec_vmsumuhs, "V4UiV8UsV8UsV4Ui", "") 104BUILTIN(__builtin_altivec_vmsumshs, "V4SiV8SsV8SsV4Si", "") 105 106BUILTIN(__builtin_altivec_vmuleub, "V8UsV16UcV16Uc", "") 107BUILTIN(__builtin_altivec_vmulesb, "V8SsV16ScV16Sc", "") 108BUILTIN(__builtin_altivec_vmuleuh, "V4UiV8UsV8Us", "") 109BUILTIN(__builtin_altivec_vmulesh, "V4SiV8SsV8Ss", "") 110BUILTIN(__builtin_altivec_vmuleuw, "V2ULLiV4UiV4Ui", "") 111BUILTIN(__builtin_altivec_vmulesw, "V2SLLiV4SiV4Si", "") 112BUILTIN(__builtin_altivec_vmuloub, "V8UsV16UcV16Uc", "") 113BUILTIN(__builtin_altivec_vmulosb, "V8SsV16ScV16Sc", "") 114BUILTIN(__builtin_altivec_vmulouh, "V4UiV8UsV8Us", "") 115BUILTIN(__builtin_altivec_vmulosh, "V4SiV8SsV8Ss", "") 116BUILTIN(__builtin_altivec_vmulouw, "V2ULLiV4UiV4Ui", "") 117BUILTIN(__builtin_altivec_vmulosw, "V2SLLiV4SiV4Si", "") 118BUILTIN(__builtin_altivec_vmuleud, "V1ULLLiV2ULLiV2ULLi", "") 119BUILTIN(__builtin_altivec_vmulesd, "V1SLLLiV2SLLiV2SLLi", "") 120BUILTIN(__builtin_altivec_vmuloud, "V1ULLLiV2ULLiV2ULLi", "") 121BUILTIN(__builtin_altivec_vmulosd, "V1SLLLiV2SLLiV2SLLi", "") 122BUILTIN(__builtin_altivec_vmsumcud, "V1ULLLiV2ULLiV2ULLiV1ULLLi", "") 123 124BUILTIN(__builtin_altivec_vnmsubfp, "V4fV4fV4fV4f", "") 125 126BUILTIN(__builtin_altivec_vpkpx, "V8sV4UiV4Ui", "") 127BUILTIN(__builtin_altivec_vpkuhus, "V16UcV8UsV8Us", "") 128BUILTIN(__builtin_altivec_vpkshss, "V16ScV8SsV8Ss", "") 129BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "") 130BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "") 131BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "") 132BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "") 133BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "") 134BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "") 135BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "") 136BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "") 137 138BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "") 139 140BUILTIN(__builtin_altivec_stvx, "vV4iiv*", "") 141BUILTIN(__builtin_altivec_stvxl, "vV4iiv*", "") 142BUILTIN(__builtin_altivec_stvebx, "vV16civ*", "") 143BUILTIN(__builtin_altivec_stvehx, "vV8siv*", "") 144BUILTIN(__builtin_altivec_stvewx, "vV4iiv*", "") 145 146BUILTIN(__builtin_altivec_vcmpbfp, "V4iV4fV4f", "") 147 148BUILTIN(__builtin_altivec_vcmpgefp, "V4iV4fV4f", "") 149 150BUILTIN(__builtin_altivec_vcmpequb, "V16cV16cV16c", "") 151BUILTIN(__builtin_altivec_vcmpequh, "V8sV8sV8s", "") 152BUILTIN(__builtin_altivec_vcmpequw, "V4iV4iV4i", "") 153BUILTIN(__builtin_altivec_vcmpequd, "V2LLiV2LLiV2LLi", "") 154BUILTIN(__builtin_altivec_vcmpeqfp, "V4iV4fV4f", "") 155 156BUILTIN(__builtin_altivec_vcmpneb, "V16cV16cV16c", "") 157BUILTIN(__builtin_altivec_vcmpneh, "V8sV8sV8s", "") 158BUILTIN(__builtin_altivec_vcmpnew, "V4iV4iV4i", "") 159 160BUILTIN(__builtin_altivec_vcmpnezb, "V16cV16cV16c", "") 161BUILTIN(__builtin_altivec_vcmpnezh, "V8sV8sV8s", "") 162BUILTIN(__builtin_altivec_vcmpnezw, "V4iV4iV4i", "") 163 164BUILTIN(__builtin_altivec_vcmpgtsb, "V16cV16ScV16Sc", "") 165BUILTIN(__builtin_altivec_vcmpgtub, "V16cV16UcV16Uc", "") 166BUILTIN(__builtin_altivec_vcmpgtsh, "V8sV8SsV8Ss", "") 167BUILTIN(__builtin_altivec_vcmpgtuh, "V8sV8UsV8Us", "") 168BUILTIN(__builtin_altivec_vcmpgtsw, "V4iV4SiV4Si", "") 169BUILTIN(__builtin_altivec_vcmpgtuw, "V4iV4UiV4Ui", "") 170BUILTIN(__builtin_altivec_vcmpgtsd, "V2LLiV2LLiV2LLi", "") 171BUILTIN(__builtin_altivec_vcmpgtud, "V2LLiV2ULLiV2ULLi", "") 172BUILTIN(__builtin_altivec_vcmpgtfp, "V4iV4fV4f", "") 173 174// P10 Vector compare builtins. 175BUILTIN(__builtin_altivec_vcmpequq, "V1LLLiV1ULLLiV1ULLLi", "") 176BUILTIN(__builtin_altivec_vcmpgtsq, "V1LLLiV1SLLLiV1SLLLi", "") 177BUILTIN(__builtin_altivec_vcmpgtuq, "V1LLLiV1ULLLiV1ULLLi", "") 178BUILTIN(__builtin_altivec_vcmpequq_p, "iiV1ULLLiV1LLLi", "") 179BUILTIN(__builtin_altivec_vcmpgtsq_p, "iiV1SLLLiV1SLLLi", "") 180BUILTIN(__builtin_altivec_vcmpgtuq_p, "iiV1ULLLiV1ULLLi", "") 181 182BUILTIN(__builtin_altivec_vmaxsb, "V16ScV16ScV16Sc", "") 183BUILTIN(__builtin_altivec_vmaxub, "V16UcV16UcV16Uc", "") 184BUILTIN(__builtin_altivec_vmaxsh, "V8SsV8SsV8Ss", "") 185BUILTIN(__builtin_altivec_vmaxuh, "V8UsV8UsV8Us", "") 186BUILTIN(__builtin_altivec_vmaxsw, "V4SiV4SiV4Si", "") 187BUILTIN(__builtin_altivec_vmaxuw, "V4UiV4UiV4Ui", "") 188BUILTIN(__builtin_altivec_vmaxsd, "V2LLiV2LLiV2LLi", "") 189BUILTIN(__builtin_altivec_vmaxud, "V2ULLiV2ULLiV2ULLi", "") 190BUILTIN(__builtin_altivec_vmaxfp, "V4fV4fV4f", "") 191 192BUILTIN(__builtin_altivec_mfvscr, "V8Us", "") 193 194BUILTIN(__builtin_altivec_vminsb, "V16ScV16ScV16Sc", "") 195BUILTIN(__builtin_altivec_vminub, "V16UcV16UcV16Uc", "") 196BUILTIN(__builtin_altivec_vminsh, "V8SsV8SsV8Ss", "") 197BUILTIN(__builtin_altivec_vminuh, "V8UsV8UsV8Us", "") 198BUILTIN(__builtin_altivec_vminsw, "V4SiV4SiV4Si", "") 199BUILTIN(__builtin_altivec_vminuw, "V4UiV4UiV4Ui", "") 200BUILTIN(__builtin_altivec_vminsd, "V2LLiV2LLiV2LLi", "") 201BUILTIN(__builtin_altivec_vminud, "V2ULLiV2ULLiV2ULLi", "") 202BUILTIN(__builtin_altivec_vminfp, "V4fV4fV4f", "") 203 204BUILTIN(__builtin_altivec_mtvscr, "vV4i", "") 205 206BUILTIN(__builtin_altivec_vrefp, "V4fV4f", "") 207 208BUILTIN(__builtin_altivec_vrlb, "V16cV16cV16Uc", "") 209BUILTIN(__builtin_altivec_vrlh, "V8sV8sV8Us", "") 210BUILTIN(__builtin_altivec_vrlw, "V4iV4iV4Ui", "") 211BUILTIN(__builtin_altivec_vrld, "V2LLiV2LLiV2ULLi", "") 212 213BUILTIN(__builtin_altivec_vsel_4si, "V4iV4iV4iV4Ui", "") 214 215BUILTIN(__builtin_altivec_vsl, "V4iV4iV4i", "") 216BUILTIN(__builtin_altivec_vslo, "V4iV4iV4i", "") 217 218BUILTIN(__builtin_altivec_vsrab, "V16cV16cV16Uc", "") 219BUILTIN(__builtin_altivec_vsrah, "V8sV8sV8Us", "") 220BUILTIN(__builtin_altivec_vsraw, "V4iV4iV4Ui", "") 221 222BUILTIN(__builtin_altivec_vsr, "V4iV4iV4i", "") 223BUILTIN(__builtin_altivec_vsro, "V4iV4iV4i", "") 224 225BUILTIN(__builtin_altivec_vrfin, "V4fV4f", "") 226 227BUILTIN(__builtin_altivec_vrsqrtefp, "V4fV4f", "") 228 229BUILTIN(__builtin_altivec_vsubcuw, "V4UiV4UiV4Ui", "") 230 231BUILTIN(__builtin_altivec_vsum4sbs, "V4SiV16ScV4Si", "") 232BUILTIN(__builtin_altivec_vsum4ubs, "V4UiV16UcV4Ui", "") 233BUILTIN(__builtin_altivec_vsum4shs, "V4SiV8SsV4Si", "") 234 235BUILTIN(__builtin_altivec_vsum2sws, "V4SiV4SiV4Si", "") 236 237BUILTIN(__builtin_altivec_vsumsws, "V4SiV4SiV4Si", "") 238 239BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "") 240 241BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "") 242BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "") 243BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "") 244BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "") 245 246BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "") 247BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "") 248BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "") 249BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "") 250 251BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "") 252 253BUILTIN(__builtin_altivec_vcmpgefp_p, "iiV4fV4f", "") 254 255BUILTIN(__builtin_altivec_vcmpequb_p, "iiV16cV16c", "") 256BUILTIN(__builtin_altivec_vcmpequh_p, "iiV8sV8s", "") 257BUILTIN(__builtin_altivec_vcmpequw_p, "iiV4iV4i", "") 258BUILTIN(__builtin_altivec_vcmpequd_p, "iiV2LLiV2LLi", "") 259BUILTIN(__builtin_altivec_vcmpeqfp_p, "iiV4fV4f", "") 260 261BUILTIN(__builtin_altivec_vcmpneb_p, "iiV16cV16c", "") 262BUILTIN(__builtin_altivec_vcmpneh_p, "iiV8sV8s", "") 263BUILTIN(__builtin_altivec_vcmpnew_p, "iiV4iV4i", "") 264BUILTIN(__builtin_altivec_vcmpned_p, "iiV2LLiV2LLi", "") 265 266BUILTIN(__builtin_altivec_vcmpgtsb_p, "iiV16ScV16Sc", "") 267BUILTIN(__builtin_altivec_vcmpgtub_p, "iiV16UcV16Uc", "") 268BUILTIN(__builtin_altivec_vcmpgtsh_p, "iiV8SsV8Ss", "") 269BUILTIN(__builtin_altivec_vcmpgtuh_p, "iiV8UsV8Us", "") 270BUILTIN(__builtin_altivec_vcmpgtsw_p, "iiV4SiV4Si", "") 271BUILTIN(__builtin_altivec_vcmpgtuw_p, "iiV4UiV4Ui", "") 272BUILTIN(__builtin_altivec_vcmpgtsd_p, "iiV2LLiV2LLi", "") 273BUILTIN(__builtin_altivec_vcmpgtud_p, "iiV2ULLiV2ULLi", "") 274BUILTIN(__builtin_altivec_vcmpgtfp_p, "iiV4fV4f", "") 275 276BUILTIN(__builtin_altivec_vgbbd, "V16UcV16Uc", "") 277BUILTIN(__builtin_altivec_vbpermq, "V2ULLiV16UcV16Uc", "") 278 279// P8 Crypto built-ins. 280BUILTIN(__builtin_altivec_crypto_vsbox, "V2ULLiV2ULLi", "") 281BUILTIN(__builtin_altivec_crypto_vpermxor, "V16UcV16UcV16UcV16Uc", "") 282BUILTIN(__builtin_altivec_crypto_vshasigmaw, "V4UiV4UiIiIi", "") 283BUILTIN(__builtin_altivec_crypto_vshasigmad, "V2ULLiV2ULLiIiIi", "") 284BUILTIN(__builtin_altivec_crypto_vcipher, "V2ULLiV2ULLiV2ULLi", "") 285BUILTIN(__builtin_altivec_crypto_vcipherlast, "V2ULLiV2ULLiV2ULLi", "") 286BUILTIN(__builtin_altivec_crypto_vncipher, "V2ULLiV2ULLiV2ULLi", "") 287BUILTIN(__builtin_altivec_crypto_vncipherlast, "V2ULLiV2ULLiV2ULLi", "") 288BUILTIN(__builtin_altivec_crypto_vpmsumb, "V16UcV16UcV16Uc", "") 289BUILTIN(__builtin_altivec_crypto_vpmsumh, "V8UsV8UsV8Us", "") 290BUILTIN(__builtin_altivec_crypto_vpmsumw, "V4UiV4UiV4Ui", "") 291BUILTIN(__builtin_altivec_crypto_vpmsumd, "V2ULLiV2ULLiV2ULLi", "") 292 293BUILTIN(__builtin_altivec_vclzb, "V16UcV16Uc", "") 294BUILTIN(__builtin_altivec_vclzh, "V8UsV8Us", "") 295BUILTIN(__builtin_altivec_vclzw, "V4UiV4Ui", "") 296BUILTIN(__builtin_altivec_vclzd, "V2ULLiV2ULLi", "") 297BUILTIN(__builtin_altivec_vctzb, "V16UcV16Uc", "") 298BUILTIN(__builtin_altivec_vctzh, "V8UsV8Us", "") 299BUILTIN(__builtin_altivec_vctzw, "V4UiV4Ui", "") 300BUILTIN(__builtin_altivec_vctzd, "V2ULLiV2ULLi", "") 301 302BUILTIN(__builtin_altivec_vclzlsbb, "SiV16Uc", "") 303BUILTIN(__builtin_altivec_vctzlsbb, "SiV16Uc", "") 304BUILTIN(__builtin_altivec_vprtybw, "V4UiV4Ui", "") 305BUILTIN(__builtin_altivec_vprtybd, "V2ULLiV2ULLi", "") 306BUILTIN(__builtin_altivec_vprtybq, "V1ULLLiV1ULLLi", "") 307 308// Vector population count built-ins 309BUILTIN(__builtin_altivec_vpopcntb, "V16UcV16Uc", "") 310BUILTIN(__builtin_altivec_vpopcnth, "V8UsV8Us", "") 311BUILTIN(__builtin_altivec_vpopcntw, "V4UiV4Ui", "") 312BUILTIN(__builtin_altivec_vpopcntd, "V2ULLiV2ULLi", "") 313 314// Absolute difference built-ins 315BUILTIN(__builtin_altivec_vabsdub, "V16UcV16UcV16Uc", "") 316BUILTIN(__builtin_altivec_vabsduh, "V8UsV8UsV8Us", "") 317BUILTIN(__builtin_altivec_vabsduw, "V4UiV4UiV4Ui", "") 318 319// P9 Shift built-ins. 320BUILTIN(__builtin_altivec_vslv, "V16UcV16UcV16Uc", "") 321BUILTIN(__builtin_altivec_vsrv, "V16UcV16UcV16Uc", "") 322 323// P9 Vector rotate built-ins 324BUILTIN(__builtin_altivec_vrlwmi, "V4UiV4UiV4UiV4Ui", "") 325BUILTIN(__builtin_altivec_vrldmi, "V2ULLiV2ULLiV2ULLiV2ULLi", "") 326BUILTIN(__builtin_altivec_vrlwnm, "V4UiV4UiV4Ui", "") 327BUILTIN(__builtin_altivec_vrldnm, "V2ULLiV2ULLiV2ULLi", "") 328 329// P9 Vector extend sign builtins. 330BUILTIN(__builtin_altivec_vextsb2w, "V4SiV16Sc", "") 331BUILTIN(__builtin_altivec_vextsb2d, "V2SLLiV16Sc", "") 332BUILTIN(__builtin_altivec_vextsh2w, "V4SiV8Ss", "") 333BUILTIN(__builtin_altivec_vextsh2d, "V2SLLiV8Ss", "") 334BUILTIN(__builtin_altivec_vextsw2d, "V2SLLiV4Si", "") 335 336// P10 Vector extend sign builtins. 337BUILTIN(__builtin_altivec_vextsd2q, "V1SLLLiV2SLLi", "") 338 339// P10 Vector Extract with Mask built-ins. 340BUILTIN(__builtin_altivec_vextractbm, "UiV16Uc", "") 341BUILTIN(__builtin_altivec_vextracthm, "UiV8Us", "") 342BUILTIN(__builtin_altivec_vextractwm, "UiV4Ui", "") 343BUILTIN(__builtin_altivec_vextractdm, "UiV2ULLi", "") 344BUILTIN(__builtin_altivec_vextractqm, "UiV1ULLLi", "") 345 346// P10 Vector Divide Extended built-ins. 347BUILTIN(__builtin_altivec_vdivesw, "V4SiV4SiV4Si", "") 348BUILTIN(__builtin_altivec_vdiveuw, "V4UiV4UiV4Ui", "") 349BUILTIN(__builtin_altivec_vdivesd, "V2LLiV2LLiV2LLi", "") 350BUILTIN(__builtin_altivec_vdiveud, "V2ULLiV2ULLiV2ULLi", "") 351BUILTIN(__builtin_altivec_vdivesq, "V1SLLLiV1SLLLiV1SLLLi", "") 352BUILTIN(__builtin_altivec_vdiveuq, "V1ULLLiV1ULLLiV1ULLLi", "") 353 354// P10 Vector Multiply High built-ins. 355BUILTIN(__builtin_altivec_vmulhsw, "V4SiV4SiV4Si", "") 356BUILTIN(__builtin_altivec_vmulhuw, "V4UiV4UiV4Ui", "") 357BUILTIN(__builtin_altivec_vmulhsd, "V2LLiV2LLiV2LLi", "") 358BUILTIN(__builtin_altivec_vmulhud, "V2ULLiV2ULLiV2ULLi", "") 359 360// P10 Vector Expand with Mask built-ins. 361BUILTIN(__builtin_altivec_vexpandbm, "V16UcV16Uc", "") 362BUILTIN(__builtin_altivec_vexpandhm, "V8UsV8Us", "") 363BUILTIN(__builtin_altivec_vexpandwm, "V4UiV4Ui", "") 364BUILTIN(__builtin_altivec_vexpanddm, "V2ULLiV2ULLi", "") 365BUILTIN(__builtin_altivec_vexpandqm, "V1ULLLiV1ULLLi", "") 366 367// P10 Vector Count with Mask built-ins. 368BUILTIN(__builtin_altivec_vcntmbb, "ULLiV16UcUi", "") 369BUILTIN(__builtin_altivec_vcntmbh, "ULLiV8UsUi", "") 370BUILTIN(__builtin_altivec_vcntmbw, "ULLiV4UiUi", "") 371BUILTIN(__builtin_altivec_vcntmbd, "ULLiV2ULLiUi", "") 372 373// P10 Move to VSR with Mask built-ins. 374BUILTIN(__builtin_altivec_mtvsrbm, "V16UcULLi", "") 375BUILTIN(__builtin_altivec_mtvsrhm, "V8UsULLi", "") 376BUILTIN(__builtin_altivec_mtvsrwm, "V4UiULLi", "") 377BUILTIN(__builtin_altivec_mtvsrdm, "V2ULLiULLi", "") 378BUILTIN(__builtin_altivec_mtvsrqm, "V1ULLLiULLi", "") 379 380// P10 Vector Parallel Bits built-ins. 381BUILTIN(__builtin_altivec_vpdepd, "V2ULLiV2ULLiV2ULLi", "") 382BUILTIN(__builtin_altivec_vpextd, "V2ULLiV2ULLiV2ULLi", "") 383 384// P10 Vector String Isolate Built-ins. 385BUILTIN(__builtin_altivec_vstribr, "V16cV16c", "") 386BUILTIN(__builtin_altivec_vstribl, "V16cV16c", "") 387BUILTIN(__builtin_altivec_vstrihr, "V8sV8s", "") 388BUILTIN(__builtin_altivec_vstrihl, "V8sV8s", "") 389BUILTIN(__builtin_altivec_vstribr_p, "iiV16c", "") 390BUILTIN(__builtin_altivec_vstribl_p, "iiV16c", "") 391BUILTIN(__builtin_altivec_vstrihr_p, "iiV8s", "") 392BUILTIN(__builtin_altivec_vstrihl_p, "iiV8s", "") 393 394// P10 Vector Centrifuge built-in. 395BUILTIN(__builtin_altivec_vcfuged, "V2ULLiV2ULLiV2ULLi", "") 396 397// P10 Vector Gather Every N-th Bit built-in. 398BUILTIN(__builtin_altivec_vgnb, "ULLiV1ULLLiIi", "") 399 400// P10 Vector Clear Bytes built-ins. 401BUILTIN(__builtin_altivec_vclrlb, "V16cV16cUi", "") 402BUILTIN(__builtin_altivec_vclrrb, "V16cV16cUi", "") 403 404// P10 Vector Count Leading / Trailing Zeroes under bit Mask built-ins. 405BUILTIN(__builtin_altivec_vclzdm, "V2ULLiV2ULLiV2ULLi", "") 406BUILTIN(__builtin_altivec_vctzdm, "V2ULLiV2ULLiV2ULLi", "") 407 408// P10 Vector Shift built-ins. 409BUILTIN(__builtin_altivec_vsldbi, "V16UcV16UcV16UcIi", "") 410BUILTIN(__builtin_altivec_vsrdbi, "V16UcV16UcV16UcIi", "") 411 412// P10 Vector Insert built-ins. 413BUILTIN(__builtin_altivec_vinsblx, "V16UcV16UcUiUi", "") 414BUILTIN(__builtin_altivec_vinsbrx, "V16UcV16UcUiUi", "") 415BUILTIN(__builtin_altivec_vinshlx, "V8UsV8UsUiUi", "") 416BUILTIN(__builtin_altivec_vinshrx, "V8UsV8UsUiUi", "") 417BUILTIN(__builtin_altivec_vinswlx, "V4UiV4UiUiUi", "") 418BUILTIN(__builtin_altivec_vinswrx, "V4UiV4UiUiUi", "") 419BUILTIN(__builtin_altivec_vinsdlx, "V2ULLiV2ULLiULLiULLi", "") 420BUILTIN(__builtin_altivec_vinsdrx, "V2ULLiV2ULLiULLiULLi", "") 421BUILTIN(__builtin_altivec_vinsbvlx, "V16UcV16UcUiV16Uc", "") 422BUILTIN(__builtin_altivec_vinsbvrx, "V16UcV16UcUiV16Uc", "") 423BUILTIN(__builtin_altivec_vinshvlx, "V8UsV8UsUiV8Us", "") 424BUILTIN(__builtin_altivec_vinshvrx, "V8UsV8UsUiV8Us", "") 425BUILTIN(__builtin_altivec_vinswvlx, "V4UiV4UiUiV4Ui", "") 426BUILTIN(__builtin_altivec_vinswvrx, "V4UiV4UiUiV4Ui", "") 427BUILTIN(__builtin_altivec_vec_replace_elt, "V4UiV4UiUiIi", "t") 428BUILTIN(__builtin_altivec_vec_replace_unaligned, "V4UiV4UiUiIi", "t") 429 430// P10 Vector Extract built-ins. 431BUILTIN(__builtin_altivec_vextdubvlx, "V2ULLiV16UcV16UcUi", "") 432BUILTIN(__builtin_altivec_vextdubvrx, "V2ULLiV16UcV16UcUi", "") 433BUILTIN(__builtin_altivec_vextduhvlx, "V2ULLiV8UsV8UsUi", "") 434BUILTIN(__builtin_altivec_vextduhvrx, "V2ULLiV8UsV8UsUi", "") 435BUILTIN(__builtin_altivec_vextduwvlx, "V2ULLiV4UiV4UiUi", "") 436BUILTIN(__builtin_altivec_vextduwvrx, "V2ULLiV4UiV4UiUi", "") 437BUILTIN(__builtin_altivec_vextddvlx, "V2ULLiV2ULLiV2ULLiUi", "") 438BUILTIN(__builtin_altivec_vextddvrx, "V2ULLiV2ULLiV2ULLiUi", "") 439 440// P10 Vector rotate built-ins. 441BUILTIN(__builtin_altivec_vrlqmi, "V1ULLLiV1ULLLiV1ULLLiV1ULLLi", "") 442BUILTIN(__builtin_altivec_vrlqnm, "V1ULLLiV1ULLLiV1ULLLi", "") 443 444// VSX built-ins. 445 446BUILTIN(__builtin_vsx_lxvd2x, "V2divC*", "") 447BUILTIN(__builtin_vsx_lxvw4x, "V4iivC*", "") 448BUILTIN(__builtin_vsx_lxvd2x_be, "V2dSLLivC*", "") 449BUILTIN(__builtin_vsx_lxvw4x_be, "V4iSLLivC*", "") 450 451BUILTIN(__builtin_vsx_stxvd2x, "vV2div*", "") 452BUILTIN(__builtin_vsx_stxvw4x, "vV4iiv*", "") 453BUILTIN(__builtin_vsx_stxvd2x_be, "vV2dSLLivC*", "") 454BUILTIN(__builtin_vsx_stxvw4x_be, "vV4iSLLivC*", "") 455 456BUILTIN(__builtin_vsx_lxvl, "V4ivC*ULLi", "") 457BUILTIN(__builtin_vsx_lxvll, "V4ivC*ULLi", "") 458BUILTIN(__builtin_vsx_stxvl, "vV4iv*ULLi", "") 459BUILTIN(__builtin_vsx_stxvll, "vV4iv*ULLi", "") 460 461BUILTIN(__builtin_vsx_xvmaxdp, "V2dV2dV2d", "") 462BUILTIN(__builtin_vsx_xvmaxsp, "V4fV4fV4f", "") 463BUILTIN(__builtin_vsx_xsmaxdp, "ddd", "") 464 465BUILTIN(__builtin_vsx_xvmindp, "V2dV2dV2d", "") 466BUILTIN(__builtin_vsx_xvminsp, "V4fV4fV4f", "") 467BUILTIN(__builtin_vsx_xsmindp, "ddd", "") 468 469BUILTIN(__builtin_vsx_xvdivdp, "V2dV2dV2d", "") 470BUILTIN(__builtin_vsx_xvdivsp, "V4fV4fV4f", "") 471 472BUILTIN(__builtin_vsx_xvrdpip, "V2dV2d", "") 473BUILTIN(__builtin_vsx_xvrspip, "V4fV4f", "") 474 475BUILTIN(__builtin_vsx_xvcmpeqdp, "V2ULLiV2dV2d", "") 476BUILTIN(__builtin_vsx_xvcmpeqsp, "V4UiV4fV4f", "") 477 478BUILTIN(__builtin_vsx_xvcmpeqdp_p, "iiV2dV2d", "") 479BUILTIN(__builtin_vsx_xvcmpeqsp_p, "iiV4fV4f", "") 480 481BUILTIN(__builtin_vsx_xvcmpgedp, "V2ULLiV2dV2d", "") 482BUILTIN(__builtin_vsx_xvcmpgesp, "V4UiV4fV4f", "") 483 484BUILTIN(__builtin_vsx_xvcmpgedp_p, "iiV2dV2d", "") 485BUILTIN(__builtin_vsx_xvcmpgesp_p, "iiV4fV4f", "") 486 487BUILTIN(__builtin_vsx_xvcmpgtdp, "V2ULLiV2dV2d", "") 488BUILTIN(__builtin_vsx_xvcmpgtsp, "V4UiV4fV4f", "") 489 490BUILTIN(__builtin_vsx_xvcmpgtdp_p, "iiV2dV2d", "") 491BUILTIN(__builtin_vsx_xvcmpgtsp_p, "iiV4fV4f", "") 492 493BUILTIN(__builtin_vsx_xvrdpim, "V2dV2d", "") 494BUILTIN(__builtin_vsx_xvrspim, "V4fV4f", "") 495 496BUILTIN(__builtin_vsx_xvrdpi, "V2dV2d", "") 497BUILTIN(__builtin_vsx_xvrspi, "V4fV4f", "") 498 499BUILTIN(__builtin_vsx_xvrdpic, "V2dV2d", "") 500BUILTIN(__builtin_vsx_xvrspic, "V4fV4f", "") 501 502BUILTIN(__builtin_vsx_xvrdpiz, "V2dV2d", "") 503BUILTIN(__builtin_vsx_xvrspiz, "V4fV4f", "") 504 505BUILTIN(__builtin_vsx_xvmaddadp, "V2dV2dV2dV2d", "") 506BUILTIN(__builtin_vsx_xvmaddasp, "V4fV4fV4fV4f", "") 507 508BUILTIN(__builtin_vsx_xvmsubadp, "V2dV2dV2dV2d", "") 509BUILTIN(__builtin_vsx_xvmsubasp, "V4fV4fV4fV4f", "") 510 511BUILTIN(__builtin_vsx_xvmuldp, "V2dV2dV2d", "") 512BUILTIN(__builtin_vsx_xvmulsp, "V4fV4fV4f", "") 513 514BUILTIN(__builtin_vsx_xvnmaddadp, "V2dV2dV2dV2d", "") 515BUILTIN(__builtin_vsx_xvnmaddasp, "V4fV4fV4fV4f", "") 516 517BUILTIN(__builtin_vsx_xvnmsubadp, "V2dV2dV2dV2d", "") 518BUILTIN(__builtin_vsx_xvnmsubasp, "V4fV4fV4fV4f", "") 519 520BUILTIN(__builtin_vsx_xvredp, "V2dV2d", "") 521BUILTIN(__builtin_vsx_xvresp, "V4fV4f", "") 522 523BUILTIN(__builtin_vsx_xvrsqrtedp, "V2dV2d", "") 524BUILTIN(__builtin_vsx_xvrsqrtesp, "V4fV4f", "") 525 526BUILTIN(__builtin_vsx_xvsqrtdp, "V2dV2d", "") 527BUILTIN(__builtin_vsx_xvsqrtsp, "V4fV4f", "") 528 529BUILTIN(__builtin_vsx_xxleqv, "V4UiV4UiV4Ui", "") 530 531BUILTIN(__builtin_vsx_xvcpsgndp, "V2dV2dV2d", "") 532BUILTIN(__builtin_vsx_xvcpsgnsp, "V4fV4fV4f", "") 533 534BUILTIN(__builtin_vsx_xvabssp, "V4fV4f", "") 535BUILTIN(__builtin_vsx_xvabsdp, "V2dV2d", "") 536 537BUILTIN(__builtin_vsx_xxgenpcvbm, "V16UcV16Uci", "") 538BUILTIN(__builtin_vsx_xxgenpcvhm, "V8UsV8Usi", "") 539BUILTIN(__builtin_vsx_xxgenpcvwm, "V4UiV4Uii", "") 540BUILTIN(__builtin_vsx_xxgenpcvdm, "V2ULLiV2ULLii", "") 541 542// vector Insert/Extract exponent/significand builtins 543BUILTIN(__builtin_vsx_xviexpdp, "V2dV2ULLiV2ULLi", "") 544BUILTIN(__builtin_vsx_xviexpsp, "V4fV4UiV4Ui", "") 545BUILTIN(__builtin_vsx_xvxexpdp, "V2ULLiV2d", "") 546BUILTIN(__builtin_vsx_xvxexpsp, "V4UiV4f", "") 547BUILTIN(__builtin_vsx_xvxsigdp, "V2ULLiV2d", "") 548BUILTIN(__builtin_vsx_xvxsigsp, "V4UiV4f", "") 549 550// Conversion builtins 551BUILTIN(__builtin_vsx_xvcvdpsxws, "V4SiV2d", "") 552BUILTIN(__builtin_vsx_xvcvdpuxws, "V4UiV2d", "") 553BUILTIN(__builtin_vsx_xvcvspsxds, "V2SLLiV4f", "") 554BUILTIN(__builtin_vsx_xvcvspuxds, "V2ULLiV4f", "") 555BUILTIN(__builtin_vsx_xvcvsxwdp, "V2dV4Si", "") 556BUILTIN(__builtin_vsx_xvcvuxwdp, "V2dV4Ui", "") 557BUILTIN(__builtin_vsx_xvcvspdp, "V2dV4f", "") 558BUILTIN(__builtin_vsx_xvcvsxdsp, "V4fV2SLLi", "") 559BUILTIN(__builtin_vsx_xvcvuxdsp, "V4fV2ULLi", "") 560BUILTIN(__builtin_vsx_xvcvdpsp, "V4fV2d", "") 561 562BUILTIN(__builtin_vsx_xvcvsphp, "V4fV4f", "") 563BUILTIN(__builtin_vsx_xvcvhpsp, "V4fV8Us", "") 564 565BUILTIN(__builtin_vsx_xvcvspbf16, "V16UcV16Uc", "") 566BUILTIN(__builtin_vsx_xvcvbf16spn, "V16UcV16Uc", "") 567 568// Vector Test Data Class builtins 569BUILTIN(__builtin_vsx_xvtstdcdp, "V2ULLiV2dIi", "") 570BUILTIN(__builtin_vsx_xvtstdcsp, "V4UiV4fIi", "") 571 572BUILTIN(__builtin_vsx_insertword, "V16UcV4UiV16UcIi", "") 573BUILTIN(__builtin_vsx_extractuword, "V2ULLiV16UcIi", "") 574 575BUILTIN(__builtin_vsx_xxpermdi, "v.", "t") 576BUILTIN(__builtin_vsx_xxsldwi, "v.", "t") 577 578BUILTIN(__builtin_vsx_xxeval, "V2ULLiV2ULLiV2ULLiV2ULLiIi", "") 579 580BUILTIN(__builtin_vsx_xvtlsbb, "iV16UcUi", "") 581 582BUILTIN(__builtin_vsx_xvtdivdp, "iV2dV2d", "") 583BUILTIN(__builtin_vsx_xvtdivsp, "iV4fV4f", "") 584BUILTIN(__builtin_vsx_xvtsqrtdp, "iV2d", "") 585BUILTIN(__builtin_vsx_xvtsqrtsp, "iV4f", "") 586 587// P10 Vector Permute Extended built-in. 588BUILTIN(__builtin_vsx_xxpermx, "V16UcV16UcV16UcV16UcIi", "") 589 590// P10 Vector Blend built-ins. 591BUILTIN(__builtin_vsx_xxblendvb, "V16UcV16UcV16UcV16Uc", "") 592BUILTIN(__builtin_vsx_xxblendvh, "V8UsV8UsV8UsV8Us", "") 593BUILTIN(__builtin_vsx_xxblendvw, "V4UiV4UiV4UiV4Ui", "") 594BUILTIN(__builtin_vsx_xxblendvd, "V2ULLiV2ULLiV2ULLiV2ULLi", "") 595 596// Float 128 built-ins 597BUILTIN(__builtin_sqrtf128_round_to_odd, "LLdLLd", "") 598BUILTIN(__builtin_addf128_round_to_odd, "LLdLLdLLd", "") 599BUILTIN(__builtin_subf128_round_to_odd, "LLdLLdLLd", "") 600BUILTIN(__builtin_mulf128_round_to_odd, "LLdLLdLLd", "") 601BUILTIN(__builtin_divf128_round_to_odd, "LLdLLdLLd", "") 602BUILTIN(__builtin_fmaf128_round_to_odd, "LLdLLdLLdLLd", "") 603BUILTIN(__builtin_truncf128_round_to_odd, "dLLd", "") 604BUILTIN(__builtin_vsx_scalar_extract_expq, "ULLiLLd", "") 605BUILTIN(__builtin_vsx_scalar_insert_exp_qp, "LLdLLdULLi", "") 606 607// Fastmath by default builtins 608BUILTIN(__builtin_ppc_rsqrtf, "V4fV4f", "") 609BUILTIN(__builtin_ppc_rsqrtd, "V2dV2d", "") 610BUILTIN(__builtin_ppc_recipdivf, "V4fV4fV4f", "") 611BUILTIN(__builtin_ppc_recipdivd, "V2dV2dV2d", "") 612 613// HTM builtins 614BUILTIN(__builtin_tbegin, "UiUIi", "") 615BUILTIN(__builtin_tend, "UiUIi", "") 616 617BUILTIN(__builtin_tabort, "UiUi", "") 618BUILTIN(__builtin_tabortdc, "UiUiUiUi", "") 619BUILTIN(__builtin_tabortdci, "UiUiUii", "") 620BUILTIN(__builtin_tabortwc, "UiUiUiUi", "") 621BUILTIN(__builtin_tabortwci, "UiUiUii", "") 622 623BUILTIN(__builtin_tcheck, "Ui", "") 624BUILTIN(__builtin_treclaim, "UiUi", "") 625BUILTIN(__builtin_trechkpt, "Ui", "") 626BUILTIN(__builtin_tsr, "UiUi", "") 627 628BUILTIN(__builtin_tendall, "Ui", "") 629BUILTIN(__builtin_tresume, "Ui", "") 630BUILTIN(__builtin_tsuspend, "Ui", "") 631 632BUILTIN(__builtin_get_texasr, "LUi", "c") 633BUILTIN(__builtin_get_texasru, "LUi", "c") 634BUILTIN(__builtin_get_tfhar, "LUi", "c") 635BUILTIN(__builtin_get_tfiar, "LUi", "c") 636 637BUILTIN(__builtin_set_texasr, "vLUi", "c") 638BUILTIN(__builtin_set_texasru, "vLUi", "c") 639BUILTIN(__builtin_set_tfhar, "vLUi", "c") 640BUILTIN(__builtin_set_tfiar, "vLUi", "c") 641 642BUILTIN(__builtin_ttest, "LUi", "") 643 644// Scalar built-ins 645BUILTIN(__builtin_divwe, "SiSiSi", "") 646BUILTIN(__builtin_divweu, "UiUiUi", "") 647BUILTIN(__builtin_divde, "SLLiSLLiSLLi", "") 648BUILTIN(__builtin_divdeu, "ULLiULLiULLi", "") 649BUILTIN(__builtin_bpermd, "SLLiSLLiSLLi", "") 650BUILTIN(__builtin_pdepd, "ULLiULLiULLi", "") 651BUILTIN(__builtin_pextd, "ULLiULLiULLi", "") 652BUILTIN(__builtin_cfuged, "ULLiULLiULLi", "") 653BUILTIN(__builtin_cntlzdm, "ULLiULLiULLi", "") 654BUILTIN(__builtin_cnttzdm, "ULLiULLiULLi", "") 655 656// Generate random number 657BUILTIN(__builtin_darn, "LLi", "") 658BUILTIN(__builtin_darn_raw, "LLi", "") 659BUILTIN(__builtin_darn_32, "i", "") 660 661// Vector int128 (un)pack 662BUILTIN(__builtin_unpack_vector_int128, "ULLiV1LLLii", "") 663BUILTIN(__builtin_pack_vector_int128, "V1LLLiULLiULLi", "") 664 665// Set the floating point rounding mode 666BUILTIN(__builtin_setrnd, "di", "") 667 668// Get content from current FPSCR 669BUILTIN(__builtin_readflm, "d", "") 670 671// Set content of FPSCR, and return its content before update 672BUILTIN(__builtin_setflm, "dd", "") 673 674// Cache built-ins 675BUILTIN(__builtin_dcbf, "vvC*", "") 676 677// Built-ins requiring custom code generation. 678// Because these built-ins rely on target-dependent types and to avoid pervasive 679// change, they are type checked manually in Sema using custom type descriptors. 680// The first argument of the CUSTOM_BUILTIN macro is the name of the built-in 681// with its prefix, the second argument is the name of the intrinsic this 682// built-in generates, the third argument specifies the type of the function 683// (result value, then each argument) as follows: 684// i -> Unsigned integer followed by the greatest possible value for that 685// argument or 0 if no constraint on the value. 686// (e.g. i15 for a 4-bits value) 687// V -> Vector type used with MMA built-ins (vector unsigned char) 688// W -> PPC Vector type followed by the size of the vector type. 689// (e.g. W512 for __vector_quad) 690// any other descriptor -> Fall back to generic type descriptor decoding. 691// The 'C' suffix can be used as a suffix to specify the const type. 692// The '*' suffix can be used as a suffix to specify a pointer to a type. 693// The fourth argument is set to true if the built-in accumulates its result into 694// its given accumulator. 695 696// Provided builtins with _mma_ prefix for compatibility. 697CUSTOM_BUILTIN(mma_lxvp, vsx_lxvp, "W256SLLiW256C*", false) 698CUSTOM_BUILTIN(mma_stxvp, vsx_stxvp, "vW256SLLiW256C*", false) 699CUSTOM_BUILTIN(mma_assemble_pair, vsx_assemble_pair, "vW256*VV", false) 700CUSTOM_BUILTIN(mma_disassemble_pair, vsx_disassemble_pair, "vv*W256*", false) 701 702// UNALIASED_CUSTOM_BUILTIN macro is used for built-ins that have 703// the same name as that of the intrinsic they generate, i.e. the 704// ID and INTR are the same. 705// This avoids repeating the ID and INTR in the macro expression. 706 707UNALIASED_CUSTOM_BUILTIN(vsx_lxvp, "W256SLLiW256C*", false) 708UNALIASED_CUSTOM_BUILTIN(vsx_stxvp, "vW256SLLiW256C*", false) 709UNALIASED_CUSTOM_BUILTIN(vsx_assemble_pair, "vW256*VV", false) 710UNALIASED_CUSTOM_BUILTIN(vsx_disassemble_pair, "vv*W256*", false) 711 712UNALIASED_CUSTOM_BUILTIN(mma_assemble_acc, "vW512*VVVV", false) 713UNALIASED_CUSTOM_BUILTIN(mma_disassemble_acc, "vv*W512*", false) 714UNALIASED_CUSTOM_BUILTIN(mma_xxmtacc, "vW512*", true) 715UNALIASED_CUSTOM_BUILTIN(mma_xxmfacc, "vW512*", true) 716UNALIASED_CUSTOM_BUILTIN(mma_xxsetaccz, "vW512*", false) 717UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8, "vW512*VV", false) 718UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4, "vW512*VV", false) 719UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2, "vW512*VV", false) 720UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2s, "vW512*VV", false) 721UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2, "vW512*VV", false) 722UNALIASED_CUSTOM_BUILTIN(mma_xvf32ger, "vW512*VV", false) 723UNALIASED_CUSTOM_BUILTIN(mma_xvf64ger, "vW512*W256V", false) 724UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8, "vW512*VVi15i15i255", false) 725UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4, "vW512*VVi15i15i15", false) 726UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2, "vW512*VVi15i15i3", false) 727UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2s, "vW512*VVi15i15i3", false) 728UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2, "vW512*VVi15i15i3", false) 729UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32ger, "vW512*VVi15i15", false) 730UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64ger, "vW512*W256Vi15i3", false) 731UNALIASED_CUSTOM_BUILTIN(mma_xvi4ger8pp, "vW512*VV", true) 732UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4pp, "vW512*VV", true) 733UNALIASED_CUSTOM_BUILTIN(mma_xvi8ger4spp, "vW512*VV", true) 734UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2pp, "vW512*VV", true) 735UNALIASED_CUSTOM_BUILTIN(mma_xvi16ger2spp, "vW512*VV", true) 736UNALIASED_CUSTOM_BUILTIN(mma_pmxvi4ger8pp, "vW512*VVi15i15i255", true) 737UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4pp, "vW512*VVi15i15i15", true) 738UNALIASED_CUSTOM_BUILTIN(mma_pmxvi8ger4spp, "vW512*VVi15i15i15", true) 739UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2pp, "vW512*VVi15i15i3", true) 740UNALIASED_CUSTOM_BUILTIN(mma_pmxvi16ger2spp, "vW512*VVi15i15i3", true) 741UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pp, "vW512*VV", true) 742UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2pn, "vW512*VV", true) 743UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2np, "vW512*VV", true) 744UNALIASED_CUSTOM_BUILTIN(mma_xvf16ger2nn, "vW512*VV", true) 745UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pp, "vW512*VVi15i15i3", true) 746UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2pn, "vW512*VVi15i15i3", true) 747UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2np, "vW512*VVi15i15i3", true) 748UNALIASED_CUSTOM_BUILTIN(mma_pmxvf16ger2nn, "vW512*VVi15i15i3", true) 749UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpp, "vW512*VV", true) 750UNALIASED_CUSTOM_BUILTIN(mma_xvf32gerpn, "vW512*VV", true) 751UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernp, "vW512*VV", true) 752UNALIASED_CUSTOM_BUILTIN(mma_xvf32gernn, "vW512*VV", true) 753UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpp, "vW512*VVi15i15", true) 754UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gerpn, "vW512*VVi15i15", true) 755UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernp, "vW512*VVi15i15", true) 756UNALIASED_CUSTOM_BUILTIN(mma_pmxvf32gernn, "vW512*VVi15i15", true) 757UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpp, "vW512*W256V", true) 758UNALIASED_CUSTOM_BUILTIN(mma_xvf64gerpn, "vW512*W256V", true) 759UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernp, "vW512*W256V", true) 760UNALIASED_CUSTOM_BUILTIN(mma_xvf64gernn, "vW512*W256V", true) 761UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpp, "vW512*W256Vi15i3", true) 762UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gerpn, "vW512*W256Vi15i3", true) 763UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernp, "vW512*W256Vi15i3", true) 764UNALIASED_CUSTOM_BUILTIN(mma_pmxvf64gernn, "vW512*W256Vi15i3", true) 765UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2, "vW512*VV", false) 766UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2, "vW512*VVi15i15i3", false) 767UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pp, "vW512*VV", true) 768UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2pn, "vW512*VV", true) 769UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2np, "vW512*VV", true) 770UNALIASED_CUSTOM_BUILTIN(mma_xvbf16ger2nn, "vW512*VV", true) 771UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pp, "vW512*VVi15i15i3", true) 772UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2pn, "vW512*VVi15i15i3", true) 773UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2np, "vW512*VVi15i15i3", true) 774UNALIASED_CUSTOM_BUILTIN(mma_pmxvbf16ger2nn, "vW512*VVi15i15i3", true) 775 776// FIXME: Obviously incomplete. 777 778#undef BUILTIN 779#undef CUSTOM_BUILTIN 780#undef UNALIASED_CUSTOM_BUILTIN 781