1/* $NetBSD: bus_space_a2x.S,v 1.4 2013/10/28 22:50:25 matt Exp $ */ 2 3/*- 4 * Copyright (c) 2012 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Nick Hudson 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#include <arm/asm.h> 33#include <arm/locore.h> 34#include <arm/byte_swap.h> 35 36RCSID("$NetBSD: bus_space_a2x.S,v 1.4 2013/10/28 22:50:25 matt Exp $") 37 38/* 39 * bus_space_read_[124](void *cookie, bus_space_handle_t handle, 40 * bus_size_t offset); 41 */ 42 43ENTRY_NP(a2x_bs_r_1) 44 ldrb r0, [r1, r2, lsl #1] 45 RET 46END(a2x_bs_r_1) 47 48#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0 49ENTRY_NP(a2x_bs_r_2) 50 lsls r2, r2, #1 51 ldrh r0, [r1, r2] 52 RET 53END(a2x_bs_r_2) 54 55ENTRY_NP(a2x_bs_r_2_swap) 56 lsls r2, r2, #1 57 ldrh r0, [r1, r2] 58 BSWAP16(r0, r0, r1) 59 RET 60END(a2x_bs_r_2_swap) 61#endif 62 63ENTRY_NP(a2x_bs_r_4) 64 ldr r0, [r1, r2, lsl #1] 65 RET 66END(a2x_bs_r_4) 67 68ENTRY_NP(a2x_bs_r_4_swap) 69 ldr r0, [r1, r2, lsl #1] 70 BSWAP32(r0, r0, r1) 71 RET 72END(a2x_bs_r_4_swap) 73 74/* 75 * bus_space_read_multi_[124](void *cookie, bus_space_handle_t handle, 76 * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count); 77 */ 78 79ENTRY_NP(a2x_bs_rm_1) 80 lsls r2, r2, #1 81 b generic_bs_rm_1 82END(a2x_bs_rm_1) 83 84#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0 85ENTRY_NP(a2x_bs_rm_2) 86 lsls r2, r2, #1 87 b generic_armv4_bs_rm_2 88END(a2x_bs_rm_2) 89 90ENTRY_NP(a2x_bs_rm_2_swap) 91 lsls r2, r2, #1 92 b generic_armv4_bs_rm_2_swap 93END(a2x_bs_rm_2_swap) 94#endif 95 96ENTRY_NP(a2x_bs_rm_4) 97 lsls r2, r2, #1 98 b generic_bs_rm_4 99END(a2x_bs_rm_4) 100 101ENTRY_NP(a2x_bs_rm_4_swap) 102 lsls r2, r2, #1 103 b generic_bs_rm_4_swap 104END(a2x_bs_rm_4_swap) 105 106/* 107 * bus_space_write_[124](void *cookie, bus_space_handle_t handle, 108 * bus_size_t offset, uint{8,16,32}_t value); 109 */ 110ENTRY_NP(a2x_bs_w_1) 111 strb r3, [r1, r2, lsl #1] 112 RET 113END(a2x_bs_w_1) 114 115#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0 116ENTRY_NP(a2x_bs_w_2_swap) 117 BSWAP16(r3, r3, r0) 118ENTRY_NP(a2x_bs_w_2) 119 lsls r2, r2, #1 120 strh r3, [r1, r2] 121 RET 122END(a2x_bs_w_2) 123END(a2x_bs_w_2_swap) 124#endif 125 126ENTRY_NP(a2x_bs_w_4_swap) 127 BSWAP32(r3, r3, r0) 128ENTRY_NP(a2x_bs_w_4) 129 str r3, [r1, r2, lsl #1] 130 RET 131END(a2x_bs_w_4) 132END(a2x_bs_w_4_swap) 133 134/* 135 * bus_space_write_multi_[124](void *cookie, bus_space_handle_t handle, 136 * bus_size_t offset, uint{8,16,32}_t *data, bus_size_t count); 137 */ 138 139ENTRY_NP(a2x_bs_wm_1) 140 lsls r2, r2, #1 141 b generic_bs_wm_1 142END(a2x_bs_wm_1) 143 144#if (ARM_ARCH_4 + ARM_ARCH_5 + ARM_ARCH_6 + ARM_ARCH_7) > 0 145ENTRY_NP(a2x_bs_wm_2) 146 lsls r2, r2, #1 147 b generic_armv4_bs_wm_2 148END(a2x_bs_wm_2) 149 150ENTRY_NP(a2x_bs_wm_2_swap) 151 lsls r2, r2, #1 152 b generic_armv4_bs_wm_2_swap 153END(a2x_bs_wm_2_swap) 154#endif 155 156ENTRY_NP(a2x_bs_wm_4) 157 lsls r2, r2, #1 158 b generic_bs_wm_4 159END(a2x_bs_wm_4) 160 161ENTRY_NP(a2x_bs_wm_4_swap) 162 lsls r2, r2, #1 163 b generic_bs_wm_4_swap 164END(a2x_bs_wm_4_swap) 165