xref: /netbsd-src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-common.dtsi (revision 1ce045a60612350fd846130edeaa0fec7f488e0b) 
1// SPDX-License-Identifier: GPL-2.0
2
3/* This include file covers the common peripherals and configuration between
4 * bcm2835, bcm2836 and bcm2837 implementations.
5 */
6
7/ {
8	interrupt-parent = <&intc>;
9
10	soc {
11		dma: dma@7e007000 {
12			compatible = "brcm,bcm2835-dma";
13			reg = <0x7e007000 0xf00>;
14			interrupts = <1 16>,
15				     <1 17>,
16				     <1 18>,
17				     <1 19>,
18				     <1 20>,
19				     <1 21>,
20				     <1 22>,
21				     <1 23>,
22				     <1 24>,
23				     <1 25>,
24				     <1 26>,
25				     /* dma channel 11-14 share one irq */
26				     <1 27>,
27				     <1 27>,
28				     <1 27>,
29				     <1 27>,
30				     /* unused shared irq for all channels */
31				     <1 28>;
32			interrupt-names = "dma0",
33					  "dma1",
34					  "dma2",
35					  "dma3",
36					  "dma4",
37					  "dma5",
38					  "dma6",
39					  "dma7",
40					  "dma8",
41					  "dma9",
42					  "dma10",
43					  "dma11",
44					  "dma12",
45					  "dma13",
46					  "dma14",
47					  "dma-shared-all";
48			#dma-cells = <1>;
49			brcm,dma-channel-mask = <0x7f35>;
50		};
51
52		intc: interrupt-controller@7e00b200 {
53			compatible = "brcm,bcm2835-armctrl-ic";
54			reg = <0x7e00b200 0x200>;
55			interrupt-controller;
56			#interrupt-cells = <2>;
57		};
58
59		pm: watchdog@7e100000 {
60			compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
61			#power-domain-cells = <1>;
62			#reset-cells = <1>;
63			reg = <0x7e100000 0x114>,
64			      <0x7e00a000 0x24>;
65			clocks = <&clocks BCM2835_CLOCK_V3D>,
66				 <&clocks BCM2835_CLOCK_PERI_IMAGE>,
67				 <&clocks BCM2835_CLOCK_H264>,
68				 <&clocks BCM2835_CLOCK_ISP>;
69			clock-names = "v3d", "peri_image", "h264", "isp";
70			system-power-controller;
71		};
72
73		rng@7e104000 {
74			compatible = "brcm,bcm2835-rng";
75			reg = <0x7e104000 0x10>;
76			interrupts = <2 29>;
77		};
78
79		pixelvalve@7e206000 {
80			compatible = "brcm,bcm2835-pixelvalve0";
81			reg = <0x7e206000 0x100>;
82			interrupts = <2 13>; /* pwa0 */
83			status = "disabled";
84		};
85
86		pixelvalve@7e207000 {
87			compatible = "brcm,bcm2835-pixelvalve1";
88			reg = <0x7e207000 0x100>;
89			interrupts = <2 14>; /* pwa1 */
90			status = "disabled";
91		};
92
93		thermal: thermal@7e212000 {
94			compatible = "brcm,bcm2835-thermal";
95			reg = <0x7e212000 0x8>;
96			clocks = <&clocks BCM2835_CLOCK_TSENS>;
97			#thermal-sensor-cells = <0>;
98			status = "disabled";
99		};
100
101		i2c2: i2c@7e805000 {
102			compatible = "brcm,bcm2835-i2c";
103			reg = <0x7e805000 0x1000>;
104			interrupts = <2 21>;
105			clocks = <&clocks BCM2835_CLOCK_VPU>;
106			#address-cells = <1>;
107			#size-cells = <0>;
108			status = "okay";
109		};
110
111		vec: vec@7e806000 {
112			compatible = "brcm,bcm2835-vec";
113			reg = <0x7e806000 0x1000>;
114			clocks = <&clocks BCM2835_CLOCK_VEC>;
115			interrupts = <2 27>;
116			status = "disabled";
117		};
118
119		pixelvalve@7e807000 {
120			compatible = "brcm,bcm2835-pixelvalve2";
121			reg = <0x7e807000 0x100>;
122			interrupts = <2 10>; /* pixelvalve */
123			status = "disabled";
124		};
125
126		hdmi: hdmi@7e902000 {
127			compatible = "brcm,bcm2835-hdmi";
128			reg = <0x7e902000 0x600>,
129			      <0x7e808000 0x100>;
130			interrupts = <2 8>, <2 9>;
131			ddc = <&i2c2>;
132			clocks = <&clocks BCM2835_PLLH_PIX>,
133				 <&clocks BCM2835_CLOCK_HSM>;
134			clock-names = "pixel", "hdmi";
135			dmas = <&dma 17>;
136			dma-names = "audio-rx";
137			status = "disabled";
138		};
139
140		v3d: v3d@7ec00000 {
141			compatible = "brcm,bcm2835-v3d";
142			reg = <0x7ec00000 0x1000>;
143			interrupts = <1 10>;
144			power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
145			status = "disabled";
146		};
147
148		vc4: gpu {
149			compatible = "brcm,bcm2835-vc4";
150		};
151
152		fb: fb {
153			compatible = "brcm,bcm2835-fb";
154			status = "ok";
155		};
156	};
157};
158
159&cpu_thermal {
160	thermal-sensors = <&thermal>;
161};
162
163&gpio {
164	i2c_slave_gpio18: i2c_slave_gpio18 {
165		brcm,pins = <18 19 20 21>;
166		brcm,function = <BCM2835_FSEL_ALT3>;
167	};
168
169	jtag_gpio4: jtag_gpio4 {
170		brcm,pins = <4 5 6 12 13>;
171		brcm,function = <BCM2835_FSEL_ALT5>;
172	};
173
174	pwm0_gpio12: pwm0_gpio12 {
175		brcm,pins = <12>;
176		brcm,function = <BCM2835_FSEL_ALT0>;
177	};
178	pwm0_gpio18: pwm0_gpio18 {
179		brcm,pins = <18>;
180		brcm,function = <BCM2835_FSEL_ALT5>;
181	};
182	pwm0_gpio40: pwm0_gpio40 {
183		brcm,pins = <40>;
184		brcm,function = <BCM2835_FSEL_ALT0>;
185	};
186	pwm1_gpio13: pwm1_gpio13 {
187		brcm,pins = <13>;
188		brcm,function = <BCM2835_FSEL_ALT0>;
189	};
190	pwm1_gpio19: pwm1_gpio19 {
191		brcm,pins = <19>;
192		brcm,function = <BCM2835_FSEL_ALT5>;
193	};
194	pwm1_gpio41: pwm1_gpio41 {
195		brcm,pins = <41>;
196		brcm,function = <BCM2835_FSEL_ALT0>;
197	};
198	pwm1_gpio45: pwm1_gpio45 {
199		brcm,pins = <45>;
200		brcm,function = <BCM2835_FSEL_ALT0>;
201	};
202};
203
204&i2s {
205	dmas = <&dma 2>, <&dma 3>;
206	dma-names = "tx", "rx";
207};
208
209&sdhost {
210	dmas = <&dma 13>;
211	dma-names = "rx-tx";
212};
213
214&spi {
215	dmas = <&dma 6>, <&dma 7>;
216	dma-names = "tx", "rx";
217};
218