1 /* $NetBSD: au_timer.c,v 1.11 2011/07/01 18:39:29 dyoung Exp $ */
2
3 /*
4 * Copyright 2002 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 #include <sys/cdefs.h>
39 __KERNEL_RCSID(0, "$NetBSD: au_timer.c,v 1.11 2011/07/01 18:39:29 dyoung Exp $");
40
41 #include <sys/param.h>
42 #include <sys/kernel.h>
43 #include <sys/lwp.h>
44 #include <sys/systm.h>
45
46 #include <sys/bus.h>
47 #include <mips/locore.h>
48
49 #include <mips/alchemy/include/aureg.h>
50 #include <mips/alchemy/include/auvar.h>
51
52 /*
53 * Set a programmable clock register.
54 * If "wait" is non-zero, wait for that bit to become 0 in the
55 * counter control register before and after writing to the
56 * specified clock register.
57 */
58 #define SET_PC_REG(reg, wait, val) \
59 do { \
60 if (wait) \
61 while (bus_space_read_4(st, sh, PC_COUNTER_CONTROL) \
62 & (wait)) \
63 /* nothing */; \
64 bus_space_write_4(st, sh, (reg), (val)); \
65 if (wait) \
66 while (bus_space_read_4(st, sh, (reg)) & (wait)) \
67 /* nothing */; \
68 } while (0)
69
70 void
au_cal_timers(bus_space_tag_t st,bus_space_handle_t sh)71 au_cal_timers(bus_space_tag_t st, bus_space_handle_t sh)
72 {
73 struct cpu_info * const ci = curcpu();
74 uint32_t ctrdiff[4], startctr, endctr;
75 uint32_t ctl, ctr, octr;
76 int i;
77
78 /* Enable the programmable counter 1. */
79 ctl = bus_space_read_4(st, sh, PC_COUNTER_CONTROL);
80 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1))
81 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl | CC_EO | CC_EN1);
82
83 /* Initialize for 16Hz. */
84 SET_PC_REG(PC_TRIM1, CC_T1S, PC_RATE / 16 - 1);
85
86 /* Run the loop an extra time to prime the cache. */
87 for (i = 0; i < 4; i++) {
88 /* Reset the counter. */
89 SET_PC_REG(PC_COUNTER_WRITE1, CC_C1S, 0);
90
91 /* Wait for 1/16th of a second. */
92 //startctr = mips3_cp0_count_read();
93
94 /* Wait for the PC to tick over. */
95 ctr = bus_space_read_4(st, sh, PC_COUNTER_READ_1);
96 do {
97 octr = bus_space_read_4(st, sh, PC_COUNTER_READ_1);
98 } while (ctr == octr);
99
100 startctr = mips3_cp0_count_read();
101 do {
102 ctr = bus_space_read_4(st, sh, PC_COUNTER_READ_1);
103 } while (ctr == octr); // while (ctr <= octr + 1);
104 endctr = mips3_cp0_count_read();
105 ctrdiff[i] = endctr - startctr;
106 }
107
108 /* Disable the counter (if it wasn't enabled already). */
109 if ((ctl & (CC_EO | CC_EN1)) != (CC_EO | CC_EN1))
110 SET_PC_REG(PC_COUNTER_CONTROL, 0, ctl);
111
112 /* Compute the number of cycles per second. */
113 ci->ci_cpu_freq = ((ctrdiff[2] + ctrdiff[3]) / 2) * 16;
114 ci->ci_cctr_freq = ci->ci_cpu_freq;
115
116 /* Compute the number of ticks for hz. */
117 ci->ci_cycles_per_hz = (ci->ci_cpu_freq + hz / 2) / hz;
118
119 /* Compute the delay divisor. */
120 ci->ci_divisor_delay = (ci->ci_cpu_freq + 500000) / 1000000;
121
122 /*
123 * Get correct cpu frequency if the CPU runs at twice the
124 * external/cp0-count frequency.
125 */
126 if (mips_options.mips_cpu_flags & CPU_MIPS_DOUBLE_COUNT)
127 ci->ci_cpu_freq *= 2;
128
129 #ifdef DEBUG
130 printf("Timer calibration: %lu cycles/sec [(%u, %u) * 16]\n",
131 ci->ci_cpu_freq, ctrdiff[2], ctrdiff[3]);
132 #endif
133 }
134