xref: /netbsd-src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/thm/thm_11_0_2_offset.h (revision 41ec02673d281bbb3d38e6c78504ce6e30c228c1)
1 /*	$NetBSD: thm_11_0_2_offset.h,v 1.2 2021/12/18 23:45:24 riastradh Exp $	*/
2 
3 /*
4  * Copyright (C) 2018  Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included
14  * in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef _thm_11_0_2_OFFSET_HEADER
25 #define _thm_11_0_2_OFFSET_HEADER
26 
27 
28 #define mmCG_MULT_THERMAL_STATUS                                                                       0x005f
29 #define mmCG_MULT_THERMAL_STATUS_BASE_IDX                                                              0
30 
31 #define mmCG_FDO_CTRL0                                                                                 0x0067
32 #define mmCG_FDO_CTRL0_BASE_IDX                                                                        0
33 
34 #define mmCG_FDO_CTRL1                                                                                 0x0068
35 #define mmCG_FDO_CTRL1_BASE_IDX                                                                        0
36 
37 #define mmCG_FDO_CTRL2                                                                                 0x0069
38 #define mmCG_FDO_CTRL2_BASE_IDX                                                                        0
39 
40 #define mmCG_TACH_CTRL                                                                                 0x006a
41 #define mmCG_TACH_CTRL_BASE_IDX                                                                        0
42 
43 #define mmTHM_THERMAL_INT_ENA                                                                          0x000a
44 #define mmTHM_THERMAL_INT_ENA_BASE_IDX                                                                 0
45 #define mmTHM_THERMAL_INT_CTRL                                                                         0x000b
46 #define mmTHM_THERMAL_INT_CTRL_BASE_IDX                                                                0
47 
48 #define mmTHM_TCON_THERM_TRIP                                                                          0x0002
49 #define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0
50 
51 #define mmTHM_BACO_CNTL                                                                                0x0081
52 #define mmTHM_BACO_CNTL_BASE_IDX                                                                       0
53 
54 #endif
55