xref: /netbsd-src/sys/arch/hpc/stand/hpcboot/arm/arm_pxa2x0_asm.asm (revision 1e72df6a037fdd3c6d3014a2679ffff7daab84ca) 
1;	$NetBSD: arm_pxa2x0_asm.asm,v 1.2 2019/12/15 16:48:25 tsutsui Exp $
2;
3; Copyright (c) 2001 The NetBSD Foundation, Inc.
4; All rights reserved.
5;
6; This code is derived from software contributed to The NetBSD Foundation
7; by UCHIYAMA Yasushi.
8;
9; Redistribution and use in source and binary forms, with or without
10; modification, are permitted provided that the following conditions
11; are met:
12; 1. Redistributions of source code must retain the above copyright
13;    notice, this list of conditions and the following disclaimer.
14; 2. Redistributions in binary form must reproduce the above copyright
15;    notice, this list of conditions and the following disclaimer in the
16;    documentation and/or other materials provided with the distribution.
17;
18; THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19; ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20; TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21; PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22; BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23; CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24; SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25; INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26; CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27; ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28; POSSIBILITY OF SUCH DAMAGE.
29;
30
31	AREA	|.text|, CODE, PIC
32
33;
34;armasm.exe $(InputPath)
35;arm.obj
36;
37	; FlatJump_pxa2x0 (kaddr_t bootinfo, kaddr_t pvec, kaddr_t stack
38	;		kaddr_t jump)
39	;	bootinfo	boot information block address.
40	;	pvec		page vector of kernel.
41	;	stack		physical address of stack
42	;	jump		physical address of boot function
43	EXPORT	|FlatJump_pxa2x0|
44|FlatJump_pxa2x0| PROC
45	; disable interrupt
46	mrs	r4, cpsr
47	orr	r4, r4, #0xc0
48	msr	cpsr, r4
49	; Invalidate I/D-cache.
50	mcr	p15, 0, r4, c7, c7, 0
51	mov	r4, r4
52	sub	pc, pc, #4
53	; disable MMU, I/D-Cache, Writebuffer.
54	; interrupt vector address is 0xffff0000
55	; 32bit exception handler/address range.
56	ldr	r4, [pc, #20]
57	; Disable WB/Cache/MMU
58	mcr	p15, 0, r4, c1, c0, 0
59	; Invalidate TLB entries.
60	mcr	p15, 0, r4, c8, c7, 0
61	mov	r4, r4			; wait for it to complete
62	sub	pc, pc, #4		; branch to next insn
63	mov	pc, r3
64	; NOTREACHED
65	mov	pc, lr
66	DCD	0x00002030
67	ENDP  ; |FlatJump_pxa2x0|
68;
69;	UART test
70;
71	; boot_func (uint32_t mapaddr, uint32_t bootinfo, uint32_t flags)
72	;
73	EXPORT	|boot_func_pxa2x0|
74|boot_func_pxa2x0| PROC
75	nop				; cop15 hazard
76	nop				; cop15 hazard
77	nop				; cop15 hazard
78	mov	sp, r2			; set bootloader stack
79	bl	boot_pxa2x0
80	nop	; NOTREACHED
81	nop
82	ENDP  ; |boot_func_pxa2x0|
83
84	EXPORT	|boot_pxa2x0|
85|boot_pxa2x0| PROC
86	mov	r4, r0
87	mov	r5, r1
88
89;
90;	UART test code
91;
92;	; print boot_info address (r0) and page_vector start address (r1).
93;	mov	r0, #'I'
94;	bl	btputc
95;	mov	r0, r4
96;	bl	hexdump
97;	mov	r0, #'P'
98;	bl	btputc
99;	mov	r0, r5
100;	bl	hexdump
101
102	mov	r7, r4
103	mov	r2, r5		; start
104|page_loop|
105	mvn	r0, #0		; ~0
106	cmp	r2, r0
107	beq	|page_end|	; if (next == ~0) goto page_end
108
109	mov	r1, r2		; p = next
110	ldr	r2, [r1]	; next
111	ldr	r3, [r1, #4]	; src
112	ldr	r4, [r1, #8]	; dst
113	ldr	r5, [r1, #12]	; sz
114
115	bic	r4, r4, #0xff000000
116	orr	r4, r4, #0xa0000000
117
118	cmp	r3, r0
119	add	r6, r4, r5	; end address
120	bne	|page_memcpy4|	; if (src != ~0) goto page_memcpy4
121
122	mov	r0, #0
123|page_memset|			; memset (dst, 0, sz) uncached.
124	str	r0, [r4], #4
125	cmp	r4, r6
126	blt	|page_memset|
127	b	|page_loop|
128
129|page_memcpy4|			; memcpy (dst, src, sz) uncached.
130	ldr	r0, [r3], #4
131	ldr	r5, [r3], #4
132	str	r0, [r4], #4
133	cmp	r4, r6
134	strlt	r5, [r4], #4
135	cmplt	r4, r6
136	blt	|page_memcpy4|
137
138	b	|page_loop|
139|page_end|
140	;
141	; jump to kernel
142	;
143;	mov	r0, #'E'
144;	bl	btputc
145;	ldr	r0, [r7]
146;	bl	hexdump
147
148	; set stack pointer
149	mov	r5, #4096
150	add	r6, r6, #8192
151	sub	r5, r5, #1
152	bic	sp, r6, r5
153
154	; set bootargs
155	ldr	r4, [r7]
156	ldr	r0, [r7, #4]
157	ldr	r1, [r7, #8]
158	ldr	r2, [r7, #12]
159	bic	r4, r4, #0xff000000
160	orr	r4, r4, #0xa0000000
161	mov	pc, r4
162	; NOTREACHED
163
164|infinite_loop|
165	nop
166	nop
167	nop
168	nop
169	nop
170	b	|infinite_loop|
171	ENDP  ; |boot|
172
173|btputc| PROC
174	adr	r1, |$UARTTXBSY|
175	ldr	r1, [r1]
176|btputc_busy|
177	ldr	r2, [r1]
178	ands	r2, r2, #0x20
179	beq	|btputc_busy|
180	adr	r1, |$UARTTXADR|
181	ldr	r1, [r1]
182	str	r0, [r1]
183	adr	r1, |$UARTINTR|
184	ldr	r1, [r1]
185	mov	pc, lr
186	ENDP	;|btputc|
187
188|hexdump| PROC
189	stmfd	sp!, {r4-r5, lr}
190	mov	r4, r0
191	mov	r0, #0x30
192	bl	btputc
193	mov	r0, #0x78
194	bl	btputc
195	mov	r0, r4
196	;	Transmit register address
197	adr	r1, |$UARTTXADR|
198	ldr	r1, [r1]
199	;	Transmit busy register address
200	adr	r2, |$UARTTXBSY|
201	ldr	r2, [r2]
202	mov	r5, #8
203|hex_loop|
204	mov	r3, r0, LSR #28
205	cmp	r3, #9
206	addgt	r3, r3, #0x41 - 10
207	addle	r3, r3, #0x30
208|hex_busyloop|
209	ldr	r4, [r2]
210	ands	r4, r4, #0x20
211	beq	|hex_busyloop|
212	str	r3, [r1]
213	adr	r4, |$UARTINTR|
214	ldr	r4, [r4]
215	mov	r0, r0, LSL #4
216	subs	r5, r5, #1
217	bne	|hex_loop|
218	mov	r0, #0x0d
219	bl	btputc
220	mov	r0, #0x0a
221	bl	btputc
222	ldmfd	sp!, {r4-r5, pc}
223	ENDP	;|hexdump|
224
225	; FFUART
226|$UARTTXADR|
227	DCD	0x40100000
228|$UARTTXBSY|
229	DCD	0x40100014
230|$UARTINTR|
231	DCD	0x40100008
232
233	EXPORT	|boot_func_end_pxa2x0| [ DATA ]
234|boot_func_end_pxa2x0|	DCD	0x0
235
236	END
237