1/* $OpenBSD: hvcall.S,v 1.13 2024/04/08 20:00:27 miod Exp $ */ 2 3/* 4 * Copyright (c) 2008 Mark Kettenis 5 * 6 * Permission to use, copy, modify, and distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19#include "assym.h" 20#include <machine/asm.h> 21 22#define FAST_TRAP 0x80 23#define MMU_MAP_ADDR 0x83 24#define MMU_UNMAP_ADDR 0x84 25#define CORE_TRAP 0xff 26 27#define MACH_EXIT 0x00 28#define MACH_DESC 0x01 29#define MACH_SIR 0x02 30#define MACH_SET_WATCHDOG 0x05 31 32#define CPU_START 0x10 33#define CPU_STOP 0x11 34#define CPU_YIELD 0x12 35#define CPU_QCONF 0x14 36#define CPU_QINFO 0x15 37#define CPU_MYID 0x16 38#define CPU_STATE 0x17 39#define CPU_SET_RTBA 0x18 40#define CPU_GET_RTBA 0x19 41 42#define MMU_TSB_CTX0 0x20 43#define MMU_TSB_CTXNON0 0x21 44#define MMU_DEMAP_PAGE 0x22 45#define MMU_DEMAP_CTX 0x23 46#define MMU_DEMAP_ALL 0x24 47#define MMU_MAP_PERM_ADDR 0x25 48#define MMU_FAULT_AREA_CONF 0x26 49#define MMU_ENABLE 0x27 50#define MMU_UNMAP_PERM_ADDR 0x28 51#define MMU_TSB_CTX0_INFO 0x29 52#define MMU_TSB_CTXNON0_INFO 0x2a 53#define MMU_FAULT_AREA_INFO 0x2b 54 55#define MEM_SCRUB 0x30 56#define MEM_SYNC 0x31 57 58#define CPU_MONDO_SEND 0x42 59 60#define TOD_GET 0x50 61#define TOD_SET 0x51 62 63#define CONS_GETCHAR 0x60 64#define CONS_PUTCHAR 0x61 65 66#define SOFT_STATE_SET 0x70 67#define SOFT_STATE_GET 0x71 68 69#define INTR_DEVINO2SYSINO 0xa0 70#define INTR_GETENABLED 0xa1 71#define INTR_SETENABLED 0xa2 72#define INTR_GETSTATE 0xa3 73#define INTR_SETSTATE 0xa4 74#define INTR_GETTARGET 0xa5 75#define INTR_SETTARGET 0xa6 76 77#define VINTR_GETCOOKIE 0xa7 78#define VINTR_SETCOOKIE 0xa8 79#define VINTR_GETENABLED 0xa9 80#define VINTR_SETENABLED 0xaa 81#define VINTR_GETSTATE 0xab 82#define VINTR_SETSTATE 0xac 83#define VINTR_GETTARGET 0xad 84#define VINTR_SETTARGET 0xae 85 86#define PCI_IOMMU_MAP 0xb0 87#define PCI_IOMMU_DEMAP 0xb1 88#define PCI_IOMMU_GETMAP 0xb2 89#define PCI_IOMMU_GETBYPASS 0xb3 90#define PCI_CONFIG_GET 0xb4 91#define PCI_CONFIG_PUT 0xb5 92 93#define PCI_MSIQ_CONF 0xc0 94#define PCI_MSIQ_INFO 0xc1 95#define PCI_MSIQ_GETVALID 0xc2 96#define PCI_MSIQ_SETVALID 0xc3 97#define PCI_MSIQ_GETSTATE 0xc4 98#define PCI_MSIQ_SETSTATE 0xc5 99#define PCI_MSIQ_GETHEAD 0xc6 100#define PCI_MSIQ_SETHEAD 0xc7 101#define PCI_MSIQ_GETTAIL 0xc8 102#define PCI_MSI_GETVALID 0xc9 103#define PCI_MSI_SETVALID 0xca 104#define PCI_MSI_GETMSIQ 0xcb 105#define PCI_MSI_SETMSIQ 0xcc 106#define PCI_MSI_GETSTATE 0xcd 107#define PCI_MSI_SETSTATE 0xce 108#define PCI_MSG_GETMSIQ 0xd0 109#define PCI_MSG_SETMSIQ 0xd1 110#define PCI_MSG_GETSTATE 0xd2 111#define PCI_MSG_SETSTATE 0xd3 112 113#define LDC_TX_QCONF 0xe0 114#define LDC_TX_QINFO 0xe1 115#define LDC_TX_GET_STATE 0xe2 116#define LDC_TX_SET_QTAIL 0xe3 117#define LDC_RX_QCONF 0xe4 118#define LDC_RX_QINFO 0xe5 119#define LDC_RX_GET_STATE 0xe6 120#define LDC_RX_SET_QHEAD 0xe7 121 122#define LDC_SET_MAP_TABLE 0xea 123#define LDC_GET_MAP_TABLE 0xeb 124#define LDC_COPY 0xec 125 126#define LDC_MAPIN 0xed 127#define LDC_UNMAP 0xee 128#define LDC_REVOKE 0xef 129 130#define PCI_IOV_ROOT_CONFIGURED 0xf8 131#define PCI_REAL_CONFIG_GET 0xf9 132#define PCI_REAL_CONFIG_PUT 0xfa 133#define PCI_ERROR_SEND 0xff 134 135#define RNG_GET_DIAG_CONTROL 0x130 136#define RNG_CTL_READ 0x131 137#define RNG_CTL_WRITE 0x132 138#define RNG_DATA_READ_DIAG 0x133 139#define RNG_DATA_READ 0x134 140 141#define MACH_PRI 0x170 142 143#define API_SET_VERSION 0x00 144#define API_PUTCHAR 0x01 145#define API_EXIT 0x02 146#define API_GET_VERSION 0x03 147 148 149ENTRY(hv_api_putchar) 150 mov API_PUTCHAR, %o5 151 ta CORE_TRAP 152 retl 153 nop 154 155ENTRY(hv_api_get_version) 156 mov %o2, %o4 157 mov %o1, %o3 158 mov API_GET_VERSION, %o5 159 ta CORE_TRAP 160 stx %o1, [%o3] 161 retl 162 stx %o2, [%o4] 163 164ENTRY(hv_mach_desc) 165 mov %o1, %o2 166 ldx [%o2], %o1 167 mov MACH_DESC, %o5 168 ta FAST_TRAP 169 retl 170 stx %o1, [%o2] 171 172ENTRY(hv_mach_pri) 173 mov %o1, %o2 174 ldx [%o2], %o1 175 mov MACH_PRI, %o5 176 ta FAST_TRAP 177 retl 178 stx %o1, [%o2] 179 180ENTRY(hv_cpu_yield) 181 mov CPU_YIELD, %o5 182 ta FAST_TRAP 183 retl 184 nop 185 186ENTRY(hv_cpu_qconf) 187 mov CPU_QCONF, %o5 188 ta FAST_TRAP 189 retl 190 nop 191 192ENTRY(hv_cpu_mondo_send) 193 mov CPU_MONDO_SEND, %o5 194 ta FAST_TRAP 195 retl 196 nop 197 198ENTRY(hv_cpu_myid) 199 mov %o0, %o2 200 mov CPU_MYID, %o5 201 ta FAST_TRAP 202 retl 203 stx %o1, [%o2] 204 205ENTRY(hv_mmu_tsb_ctx0) 206 mov MMU_TSB_CTX0, %o5 207 ta FAST_TRAP 208 retl 209 nop 210 211ENTRY(hv_mmu_tsb_ctxnon0) 212 mov MMU_TSB_CTXNON0, %o5 213 ta FAST_TRAP 214 retl 215 nop 216 217ENTRY(hv_mmu_demap_page) 218 mov %o2, %o4 219 mov %o1, %o3 220 mov %o0, %o2 221 clr %o1 222 clr %o0 223 mov MMU_DEMAP_PAGE, %o5 224 ta FAST_TRAP 225 retl 226 nop 227 228ENTRY(hv_mmu_demap_ctx) 229 mov %o1, %o3 230 mov %o0, %o2 231 clr %o1 232 clr %o0 233 mov MMU_DEMAP_CTX, %o5 234 ta FAST_TRAP 235 retl 236 nop 237 238ENTRY(hv_mmu_map_perm_addr) 239 mov %o2, %o3 240 mov %o1, %o2 241 clr %o1 242 mov MMU_MAP_PERM_ADDR, %o5 243 ta FAST_TRAP 244 retl 245 nop 246 247ENTRY(hv_mmu_unmap_perm_addr) 248 mov %o1, %o2 249 clr %o1 250 mov MMU_UNMAP_PERM_ADDR, %o5 251 ta FAST_TRAP 252 retl 253 nop 254 255ENTRY(hv_mmu_map_addr) 256 ta MMU_MAP_ADDR 257 retl 258 nop 259 260ENTRY(hv_mmu_unmap_addr) 261 ta MMU_UNMAP_ADDR 262 retl 263 nop 264 265ENTRY(hv_mem_scrub) 266 mov MEM_SCRUB, %o5 267 ta FAST_TRAP 268 retl 269 nop 270 271ENTRY(hv_mem_sync) 272 mov MEM_SYNC, %o5 273 ta FAST_TRAP 274 retl 275 nop 276 277ENTRY(hv_tod_get) 278 mov %o0, %o2 279 mov TOD_GET, %o5 280 ta FAST_TRAP 281 retl 282 stx %o1, [%o2] 283 284ENTRY(hv_tod_set) 285 mov TOD_SET, %o5 286 ta FAST_TRAP 287 retl 288 nop 289 290ENTRY(hv_cons_getchar) 291 mov %o0, %o2 292 mov CONS_GETCHAR, %o5 293 ta FAST_TRAP 294 retl 295 stx %o1, [%o2] 296 297ENTRY(hv_cons_putchar) 298 mov CONS_PUTCHAR, %o5 299 ta FAST_TRAP 300 retl 301 nop 302 303ENTRY(hv_soft_state_set) 304 mov SOFT_STATE_SET, %o5 305 ta FAST_TRAP 306 retl 307 nop 308 309ENTRY(hv_intr_devino_to_sysino) 310 mov INTR_DEVINO2SYSINO, %o5 311 ta FAST_TRAP 312 retl 313 stx %o1, [%o2] 314 315ENTRY(hv_intr_getenabled) 316 mov %o1, %o2 317 mov INTR_GETENABLED, %o5 318 ta FAST_TRAP 319 retl 320 stx %o1, [%o2] 321 322ENTRY(hv_intr_setenabled) 323 mov INTR_SETENABLED, %o5 324 ta FAST_TRAP 325 retl 326 nop 327 328ENTRY(hv_intr_getstate) 329 mov %o1, %o2 330 mov INTR_GETSTATE, %o5 331 ta FAST_TRAP 332 retl 333 stx %o1, [%o2] 334 335ENTRY(hv_intr_setstate) 336 mov INTR_SETSTATE, %o5 337 ta FAST_TRAP 338 retl 339 nop 340 341ENTRY(hv_intr_gettarget) 342 mov %o1, %o2 343 mov INTR_GETTARGET, %o5 344 ta FAST_TRAP 345 retl 346 stx %o1, [%o2] 347 348ENTRY(hv_intr_settarget) 349 mov INTR_SETTARGET, %o5 350 ta FAST_TRAP 351 retl 352 nop 353 354ENTRY(hv_vintr_getcookie) 355 mov VINTR_GETCOOKIE, %o5 356 ta FAST_TRAP 357 retl 358 stx %o1, [%o2] 359 360ENTRY(hv_vintr_setcookie) 361 mov VINTR_SETCOOKIE, %o5 362 ta FAST_TRAP 363 retl 364 nop 365 366ENTRY(hv_vintr_getenabled) 367 mov VINTR_GETENABLED, %o5 368 ta FAST_TRAP 369 retl 370 stx %o1, [%o2] 371 372ENTRY(hv_vintr_setenabled) 373 mov VINTR_SETENABLED, %o5 374 ta FAST_TRAP 375 retl 376 nop 377 378ENTRY(hv_vintr_getstate) 379 mov VINTR_GETSTATE, %o5 380 ta FAST_TRAP 381 retl 382 stx %o1, [%o2] 383 384ENTRY(hv_vintr_setstate) 385 mov VINTR_SETSTATE, %o5 386 ta FAST_TRAP 387 retl 388 nop 389 390ENTRY(hv_vintr_gettarget) 391 mov VINTR_GETTARGET, %o5 392 ta FAST_TRAP 393 retl 394 stx %o1, [%o2] 395 396ENTRY(hv_vintr_settarget) 397 mov VINTR_SETTARGET, %o5 398 ta FAST_TRAP 399 retl 400 nop 401 402ENTRY(hv_pci_iommu_map) 403 mov %o5, %g5 404 mov PCI_IOMMU_MAP, %o5 405 ta FAST_TRAP 406 retl 407 stx %o1, [%g5] 408 409ENTRY(hv_pci_iommu_demap) 410 mov PCI_IOMMU_DEMAP, %o5 411 ta FAST_TRAP 412 retl 413 stx %o1, [%o3] 414 415ENTRY(hv_pci_iommu_getmap) 416 mov %o2, %o4 417 mov PCI_IOMMU_GETMAP, %o5 418 ta FAST_TRAP 419 stx %o1, [%o4] 420 retl 421 stx %o2, [%o3] 422 423ENTRY(hv_pci_iommu_getbypass) 424 mov PCI_IOMMU_GETBYPASS, %o5 425 ta FAST_TRAP 426 retl 427 stx %o1, [%o3] 428 429ENTRY(hv_pci_config_get) 430 mov %o5, %g5 431 mov PCI_CONFIG_GET, %o5 432 ta FAST_TRAP 433 stx %o1, [%o4] 434 retl 435 stx %o2, [%g5] 436 437ENTRY(hv_pci_config_put) 438 mov %o5, %g5 439 mov PCI_CONFIG_PUT, %o5 440 ta FAST_TRAP 441 retl 442 stx %o1, [%g5] 443 444ENTRY(hv_pci_msiq_conf) 445 mov PCI_MSIQ_CONF, %o5 446 ta FAST_TRAP 447 retl 448 nop 449 450ENTRY(hv_pci_msiq_info) 451 mov %o2, %o4 452 mov PCI_MSIQ_INFO, %o5 453 ta FAST_TRAP 454 stx %o1, [%o4] 455 retl 456 stx %o2, [%o3] 457 458ENTRY(hv_pci_msiq_getvalid) 459 mov PCI_MSIQ_GETVALID, %o5 460 ta FAST_TRAP 461 retl 462 stx %o1, [%o2] 463 464ENTRY(hv_pci_msiq_setvalid) 465 mov PCI_MSIQ_SETVALID, %o5 466 ta FAST_TRAP 467 retl 468 nop 469 470ENTRY(hv_pci_msiq_getstate) 471 mov PCI_MSIQ_GETSTATE, %o5 472 ta FAST_TRAP 473 retl 474 stx %o1, [%o2] 475 476ENTRY(hv_pci_msiq_setstate) 477 mov PCI_MSIQ_SETSTATE, %o5 478 ta FAST_TRAP 479 retl 480 nop 481 482ENTRY(hv_pci_msiq_gethead) 483 mov PCI_MSIQ_GETHEAD, %o5 484 ta FAST_TRAP 485 retl 486 stx %o1, [%o2] 487 488ENTRY(hv_pci_msiq_sethead) 489 mov PCI_MSIQ_SETHEAD, %o5 490 ta FAST_TRAP 491 retl 492 nop 493 494ENTRY(hv_pci_msiq_gettail) 495 mov PCI_MSIQ_GETTAIL, %o5 496 ta FAST_TRAP 497 retl 498 stx %o1, [%o2] 499 500ENTRY(hv_pci_msi_getvalid) 501 mov PCI_MSI_GETVALID, %o5 502 ta FAST_TRAP 503 retl 504 stx %o1, [%o2] 505 506ENTRY(hv_pci_msi_setvalid) 507 mov PCI_MSI_SETVALID, %o5 508 ta FAST_TRAP 509 retl 510 nop 511 512ENTRY(hv_pci_msi_getmsiq) 513 mov PCI_MSI_GETMSIQ, %o5 514 ta FAST_TRAP 515 retl 516 stx %o1, [%o2] 517 518ENTRY(hv_pci_msi_setmsiq) 519 mov PCI_MSI_SETMSIQ, %o5 520 ta FAST_TRAP 521 retl 522 nop 523 524ENTRY(hv_pci_msi_getstate) 525 mov PCI_MSI_GETSTATE, %o5 526 ta FAST_TRAP 527 retl 528 stx %o1, [%o2] 529 530ENTRY(hv_pci_msi_setstate) 531 mov PCI_MSI_SETSTATE, %o5 532 ta FAST_TRAP 533 retl 534 nop 535 536ENTRY(hv_pci_msg_getmsiq) 537 mov PCI_MSG_GETMSIQ, %o5 538 ta FAST_TRAP 539 retl 540 stx %o1, [%o2] 541 542ENTRY(hv_pci_msg_setmsiq) 543 mov PCI_MSG_SETMSIQ, %o5 544 ta FAST_TRAP 545 retl 546 nop 547 548ENTRY(hv_pci_msg_getstate) 549 mov PCI_MSG_GETSTATE, %o5 550 ta FAST_TRAP 551 retl 552 stx %o1, [%o2] 553 554ENTRY(hv_pci_msg_setstate) 555 mov PCI_MSG_SETSTATE, %o5 556 ta FAST_TRAP 557 retl 558 nop 559 560ENTRY(hv_ldc_tx_qconf) 561 mov LDC_TX_QCONF, %o5 562 ta FAST_TRAP 563 retl 564 nop 565 566ENTRY(hv_ldc_tx_qinfo) 567 mov %o2, %o4 568 mov %o1, %o3 569 mov LDC_TX_QINFO, %o5 570 ta FAST_TRAP 571 stx %o1, [%o3] 572 retl 573 stx %o2, [%o4] 574 575ENTRY(hv_ldc_tx_get_state) 576 mov %o3, %g5 577 mov %o2, %g4 578 mov %o1, %o4 579 mov LDC_TX_GET_STATE, %o5 580 ta FAST_TRAP 581 stx %o1, [%o4] 582 stx %o2, [%g4] 583 retl 584 stx %o3, [%g5] 585 586ENTRY(hv_ldc_tx_set_qtail) 587 mov LDC_TX_SET_QTAIL, %o5 588 ta FAST_TRAP 589 retl 590 nop 591 592ENTRY(hv_ldc_rx_qconf) 593 mov LDC_RX_QCONF, %o5 594 ta FAST_TRAP 595 retl 596 nop 597 598ENTRY(hv_ldc_rx_qinfo) 599 mov %o2, %o4 600 mov %o1, %o3 601 mov LDC_RX_QINFO, %o5 602 ta FAST_TRAP 603 stx %o1, [%o3] 604 retl 605 stx %o2, [%o4] 606 607ENTRY(hv_ldc_rx_get_state) 608 mov %o3, %g5 609 mov %o2, %g4 610 mov %o1, %o4 611 mov LDC_RX_GET_STATE, %o5 612 ta FAST_TRAP 613 stx %o1, [%o4] 614 stx %o2, [%g4] 615 retl 616 stx %o3, [%g5] 617 618ENTRY(hv_ldc_rx_set_qhead) 619 mov LDC_RX_SET_QHEAD, %o5 620 ta FAST_TRAP 621 retl 622 nop 623 624ENTRY(hv_ldc_set_map_table) 625 mov LDC_SET_MAP_TABLE, %o5 626 ta FAST_TRAP 627 retl 628 nop 629 630ENTRY(hv_ldc_get_map_table) 631 mov %o2, %o4 632 mov %o1, %o3 633 mov LDC_GET_MAP_TABLE, %o5 634 ta FAST_TRAP 635 stx %o1, [%o3] 636 retl 637 stx %o2, [%o4] 638 639ENTRY(hv_ldc_copy) 640 mov %o5, %g5 641 mov LDC_COPY, %o5 642 ta FAST_TRAP 643 retl 644 stx %o1, [%g5] 645 646ENTRY(hv_ldc_mapin) 647 mov %o2, %o4 648 mov LDC_MAPIN, %o5 649 ta FAST_TRAP 650 stx %o1, [%o4] 651 retl 652 stx %o2, [%o3] 653 654ENTRY(hv_ldc_unmap) 655 mov %o1, %o2 656 mov LDC_UNMAP, %o5 657 ta FAST_TRAP 658 retl 659 stx %o1, [%o2] 660 661ENTRY(hv_pci_iov_root_configured) 662 mov PCI_IOV_ROOT_CONFIGURED, %o5 663 ta FAST_TRAP 664 retl 665 nop 666 667ENTRY(hv_pci_real_config_get) 668 mov %o5, %g5 669 mov PCI_REAL_CONFIG_GET, %o5 670 ta FAST_TRAP 671 stx %o1, [%o4] 672 retl 673 stx %o2, [%g5] 674 675ENTRY(hv_pci_real_config_put) 676 mov %o5, %g5 677 mov PCI_REAL_CONFIG_PUT, %o5 678 ta FAST_TRAP 679 retl 680 stx %o1, [%g5] 681 682ENTRY(hv_pci_error_send) 683 mov PCI_ERROR_SEND, %o5 684 ta FAST_TRAP 685 retl 686 nop 687 688ENTRY(hv_rng_get_diag_control) 689 mov RNG_GET_DIAG_CONTROL, %o5 690 ta FAST_TRAP 691 retl 692 nop 693 694ENTRY(hv_rng_ctl_read) 695 mov %o2, %o4 696 mov %o1, %o3 697 mov RNG_CTL_READ, %o5 698 ta FAST_TRAP 699 stx %o1, [%o3] 700 retl 701 stx %o2, [%o4] 702 703ENTRY(hv_rng_ctl_write) 704 mov RNG_CTL_WRITE, %o5 705 ta FAST_TRAP 706 retl 707 stx %o1, [%o3] 708 709ENTRY(hv_rng_data_read_diag) 710 mov RNG_DATA_READ_DIAG, %o5 711 ta FAST_TRAP 712 retl 713 stx %o1, [%o2] 714 715ENTRY(hv_rng_data_read) 716 mov %o1, %o2 717 mov RNG_DATA_READ, %o5 718 ta FAST_TRAP 719 retl 720 stx %o1, [%o2] 721