xref: /netbsd-src/sys/arch/sh3/sh3/db_memrw.c (revision 5a5542fb410743f7ebc967ab3e267d1750162e9e)
1 /*	$NetBSD: db_memrw.c,v 1.9 2008/06/07 03:25:13 uwe Exp $	*/
2 
3 /*
4  * Mach Operating System
5  * Copyright (c) 1991,1990 Carnegie Mellon University
6  * All Rights Reserved.
7  *
8  * Permission to use, copy, modify and distribute this software and its
9  * documentation is hereby granted, provided that both the copyright
10  * notice and this permission notice appear in all copies of the
11  * software, derivative works or modified versions, and any portions
12  * thereof, and that both notices appear in supporting documentation.
13  *
14  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
15  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
16  * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
17  *
18  * Carnegie Mellon requests users of this software to return to
19  *
20  *  Software Distribution Coordinator  or  Software.Distribution@CS.CMU.EDU
21  *  School of Computer Science
22  *  Carnegie Mellon University
23  *  Pittsburgh PA 15213-3890
24  *
25  * any improvements or extensions that they make and grant Carnegie the
26  * rights to redistribute these changes.
27  *
28  *	db_interface.c,v 2.4 1991/02/05 17:11:13 mrt (CMU)
29  */
30 
31 /*
32  * Routines to read and write memory on behalf of the debugger, used
33  * by DDB and KGDB.
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: db_memrw.c,v 1.9 2008/06/07 03:25:13 uwe Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/proc.h>
41 #include <sys/systm.h>
42 
43 #include <uvm/uvm_extern.h>
44 
45 #include <sh3/cache.h>
46 #include <machine/db_machdep.h>
47 
48 #include <ddb/db_access.h>
49 
50 /*
51  * Read bytes from kernel address space for debugger.
52  */
53 void
db_read_bytes(vaddr_t addr,size_t size,char * data)54 db_read_bytes(vaddr_t addr, size_t size, char *data)
55 {
56 	char *src = (char *)addr;
57 
58 	/* properly aligned 4-byte */
59 	if (size == 4 && ((addr & 3) == 0) && (((uintptr_t)data & 3) == 0)) {
60 		*(uint32_t *)data = *(uint32_t *)src;
61 		return;
62 	}
63 
64 	/* properly aligned 2-byte */
65 	if (size == 2 && ((addr & 1) == 0) && (((uintptr_t)data & 1) == 0)) {
66 		*(uint16_t *)data = *(uint16_t *)src;
67 		return;
68 	}
69 
70 	while (size-- > 0)
71 		*data++ = *src++;
72 }
73 
74 
75 /*
76  * Write bytes to kernel address space for debugger.
77  * XXX: need support for writing to P3 read-only text pages.
78  */
79 void
db_write_bytes(vaddr_t addr,size_t size,const char * data)80 db_write_bytes(vaddr_t addr, size_t size, const char *data)
81 {
82 	char *dst = (char *)addr;
83 
84 	/* properly aligned 4-byte */
85 	if (size == 4 && ((addr & 3) == 0) && (((uintptr_t)data & 3) == 0))
86 		*(uint32_t *)dst = *(const uint32_t *)data;
87 
88 	/* properly aligned 2-byte */
89 	else if (size == 2 && ((addr & 1) == 0) && (((uintptr_t)data & 1) == 0))
90 		*(uint16_t *)dst = *(const uint16_t *)data;
91 
92 	else
93 		while (size-- > 0)
94 			*dst++ = *data++;
95 
96 	sh_icache_sync_all();
97 }
98