xref: /netbsd-src/sys/arch/prep/pnpbus/wdc_pnpbus.c (revision e5fbc36ada28f9b9a5836ecffaf4a06aa1ebb687)
1 /*	$NetBSD: wdc_pnpbus.c,v 1.16 2023/12/20 15:29:06 thorpej Exp $	*/
2 
3 /*-
4  * Copyright (c) 1998, 2003 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Charles M. Hannum and by Onno van der Linden.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: wdc_pnpbus.c,v 1.16 2023/12/20 15:29:06 thorpej Exp $");
34 
35 #include <sys/types.h>
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/device.h>
39 
40 #include <sys/bus.h>
41 #include <machine/intr.h>
42 #include <machine/isa_machdep.h>
43 #include <machine/residual.h>
44 
45 #include <dev/ata/atavar.h>
46 #include <dev/ic/wdcvar.h>
47 
48 #include <prep/pnpbus/pnpbusvar.h>
49 
50 /* options passed via the 'flags' config keyword */
51 #define WDC_OPTIONS_32	0x01 /* try to use 32bit data I/O */
52 
53 struct wdc_pnpbus_softc {
54 	struct	wdc_softc sc_wdcdev;
55 	struct	ata_channel *sc_chanlist[1];
56 	struct	ata_channel sc_channel;
57 	struct	wdc_regs sc_wdc_regs;
58 	void	*sc_ih;
59 };
60 
61 static int	wdc_pnpbus_probe(device_t, cfdata_t, void *);
62 static void	wdc_pnpbus_attach(device_t, device_t, void *);
63 
64 CFATTACH_DECL_NEW(wdc_pnpbus, sizeof(struct wdc_pnpbus_softc),
65     wdc_pnpbus_probe, wdc_pnpbus_attach, NULL, NULL);
66 
67 static int
wdc_pnpbus_probe(device_t parent,cfdata_t match,void * aux)68 wdc_pnpbus_probe(device_t parent, cfdata_t match, void *aux)
69 {
70 	struct pnpbus_dev_attach_args *pna = aux;
71 	int ret = 0;
72 
73 	/* XXX special case the Powerstack E1, it has wdc builtin on 14E
74 	 * while the siop is builtin on 14L.  No idea how this works at all.
75 	 */
76 	if (strcmp(res->VitalProductData.PrintableModel, "(e1)") == 0)
77 		return ret;
78 
79 	/* XXX special case the MTX604/mcp750.  The onboard IDE is actually
80 	 * a PCIIDE chip.
81 	 */
82 
83 	if (strcmp(res->VitalProductData.PrintableModel,
84 	    "000000000000000000000000000(e2)") == 0)
85 		return ret;
86 
87 	if (strcmp(pna->pna_devid, "PNP0600") == 0)
88 		ret = 1;
89 
90 	if (ret)
91 		pnpbus_scan(pna, pna->pna_ppc_dev);
92 
93 	return ret;
94 }
95 
96 static void
wdc_pnpbus_attach(device_t parent,device_t self,void * aux)97 wdc_pnpbus_attach(device_t parent, device_t self, void *aux)
98 {
99 	struct wdc_pnpbus_softc *sc = device_private(self);
100 	struct wdc_regs *wdr;
101 	struct pnpbus_dev_attach_args *pna = aux;
102 	int cmd_iobase, cmd_len, aux_iobase, aux_len, i;
103 
104 	sc->sc_wdcdev.sc_atac.atac_dev = self;
105 	sc->sc_wdcdev.regs = wdr = &sc->sc_wdc_regs;
106 
107 	wdr->cmd_iot = pna->pna_iot;
108 	wdr->ctl_iot = pna->pna_iot;
109 	pnpbus_getioport(&pna->pna_res, 0, &cmd_iobase, &cmd_len);
110 	pnpbus_getioport(&pna->pna_res, 1, &aux_iobase, &aux_len);
111 
112 	if (pnpbus_io_map(&pna->pna_res, 0, &wdr->cmd_iot, &wdr->cmd_baseioh) ||
113 	    pnpbus_io_map(&pna->pna_res, 1, &wdr->ctl_iot, &wdr->ctl_ioh)) {
114 		aprint_error_dev(self, "couldn't map registers\n");
115 	}
116 
117 	for (i = 0; i < cmd_len; i++) {
118 		if (bus_space_subregion(wdr->cmd_iot,
119 		      wdr->cmd_baseioh, i, i == 0 ? 4 : 1,
120 		      &wdr->cmd_iohs[i]) != 0) {
121 			aprint_error(": couldn't subregion registers\n");
122 			return;
123 		}
124 	}
125 
126 	wdr->data32iot = wdr->cmd_iot;
127 	wdr->data32ioh = wdr->cmd_iohs[0];
128 
129 	sc->sc_wdcdev.cap |= WDC_CAPABILITY_PREATA;
130 	sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA16;
131 	if (device_cfdata(sc->sc_wdcdev.sc_atac.atac_dev)->cf_flags &
132 	    WDC_OPTIONS_32)
133 		sc->sc_wdcdev.sc_atac.atac_cap |= ATAC_CAP_DATA32;
134 
135 	sc->sc_wdcdev.sc_atac.atac_pio_cap = 0;
136 	sc->sc_chanlist[0] = &sc->sc_channel;
137 	sc->sc_wdcdev.sc_atac.atac_channels = sc->sc_chanlist;
138 	sc->sc_wdcdev.sc_atac.atac_nchannels = 1;
139 	sc->sc_wdcdev.wdc_maxdrives = 2;
140 	sc->sc_channel.ch_channel = 0;
141 	sc->sc_channel.ch_atac = &sc->sc_wdcdev.sc_atac;
142 
143 	wdc_init_shadow_regs(wdr);
144 
145 	sc->sc_ih = pnpbus_intr_establish(0, IPL_BIO, IST_PNP,
146 	    wdcintr, &sc->sc_channel, &pna->pna_res);
147 
148 	aprint_normal("\n");
149 	wdcattach(&sc->sc_channel);
150 }
151