1 /* $OpenBSD: fpu.c,v 1.14 2014/07/09 08:34:49 deraadt Exp $ */
2 /* $NetBSD: fpu.c,v 1.1 1996/09/30 16:34:44 ws Exp $ */
3
4 /*
5 * Copyright (C) 1996 Wolfgang Solfrank.
6 * Copyright (C) 1996 TooLs GmbH.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed by TooLs GmbH.
20 * 4. The name of TooLs GmbH may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/proc.h>
37 #include <sys/user.h>
38
39 #include <machine/fpu.h>
40 #include <machine/psl.h>
41
42 void
enable_fpu(struct proc * p)43 enable_fpu(struct proc *p)
44 {
45 struct cpu_info *ci = curcpu();
46 struct pcb *pcb = &p->p_addr->u_pcb;
47 struct trapframe *tf = trapframe(p);
48 int msr;
49
50 if (!(pcb->pcb_flags & PCB_FPU)) {
51 bzero(&pcb->pcb_fpu, sizeof pcb->pcb_fpu);
52 pcb->pcb_flags |= PCB_FPU;
53 }
54
55 if (pcb->pcb_fpcpu != NULL || ci->ci_fpuproc != NULL) {
56 printf("attempting to restore fpu state when in use pcb %p"
57 " fpproc %p\n", pcb->pcb_fpcpu, ci->ci_fpuproc);
58 }
59 msr = ppc_mfmsr();
60 ppc_mtmsr((msr & ~PSL_EE) | PSL_FP);
61 __asm volatile("isync");
62
63 asm volatile ("lfd 0,0(%0); mtfsf 0xff,0" :: "b"(&pcb->pcb_fpu.fpcsr));
64 asm ("lfd 0,0(%0);"
65 "lfd 1,8(%0);"
66 "lfd 2,16(%0);"
67 "lfd 3,24(%0);"
68 "lfd 4,32(%0);"
69 "lfd 5,40(%0);"
70 "lfd 6,48(%0);"
71 "lfd 7,56(%0);"
72 "lfd 8,64(%0);"
73 "lfd 9,72(%0);"
74 "lfd 10,80(%0);"
75 "lfd 11,88(%0);"
76 "lfd 12,96(%0);"
77 "lfd 13,104(%0);"
78 "lfd 14,112(%0);"
79 "lfd 15,120(%0);"
80 "lfd 16,128(%0);"
81 "lfd 17,136(%0);"
82 "lfd 18,144(%0);"
83 "lfd 19,152(%0);"
84 "lfd 20,160(%0);"
85 "lfd 21,168(%0);"
86 "lfd 22,176(%0);"
87 "lfd 23,184(%0);"
88 "lfd 24,192(%0);"
89 "lfd 25,200(%0);"
90 "lfd 26,208(%0);"
91 "lfd 27,216(%0);"
92 "lfd 28,224(%0);"
93 "lfd 29,232(%0);"
94 "lfd 30,240(%0);"
95 "lfd 31,248(%0)" :: "b"(&pcb->pcb_fpu.fpr[0]));
96 ci->ci_fpuproc = p;
97 pcb->pcb_fpcpu = ci;
98 tf->srr1 |= PSL_FP;
99 ppc_mtmsr(msr);
100 __asm volatile("isync");
101 }
102
103 void
save_fpu(void)104 save_fpu(void)
105 {
106 struct cpu_info *ci = curcpu();
107 struct pcb *pcb;
108 struct proc *p;
109 struct trapframe *tf;
110 int msr;
111
112 msr = ppc_mfmsr();
113 ppc_mtmsr((msr & ~PSL_EE) | PSL_FP);
114
115 p = ci->ci_fpuproc;
116
117 if (p == NULL) {
118 ppc_mtmsr(msr);
119 return;
120 }
121
122 pcb = &p->p_addr->u_pcb;
123
124 __asm volatile("isync");
125
126 asm ("stfd 0,0(%0);"
127 "stfd 1,8(%0);"
128 "stfd 2,16(%0);"
129 "stfd 3,24(%0);"
130 "stfd 4,32(%0);"
131 "stfd 5,40(%0);"
132 "stfd 6,48(%0);"
133 "stfd 7,56(%0);"
134 "stfd 8,64(%0);"
135 "stfd 9,72(%0);"
136 "stfd 10,80(%0);"
137 "stfd 11,88(%0);"
138 "stfd 12,96(%0);"
139 "stfd 13,104(%0);"
140 "stfd 14,112(%0);"
141 "stfd 15,120(%0);"
142 "stfd 16,128(%0);"
143 "stfd 17,136(%0);"
144 "stfd 18,144(%0);"
145 "stfd 19,152(%0);"
146 "stfd 20,160(%0);"
147 "stfd 21,168(%0);"
148 "stfd 22,176(%0);"
149 "stfd 23,184(%0);"
150 "stfd 24,192(%0);"
151 "stfd 25,200(%0);"
152 "stfd 26,208(%0);"
153 "stfd 27,216(%0);"
154 "stfd 28,224(%0);"
155 "stfd 29,232(%0);"
156 "stfd 30,240(%0);"
157 "stfd 31,248(%0)" :: "b"(&pcb->pcb_fpu.fpr[0]));
158 asm volatile ("mffs 0; stfd 0,0(%0)" :: "b"(&pcb->pcb_fpu.fpcsr));
159 asm ("lfd 0,0(%0);" :: "b"(&pcb->pcb_fpu.fpr[0]));
160
161 tf = trapframe(ci->ci_fpuproc);
162 tf->srr1 &= ~PSL_FP;
163 ci->ci_fpuproc = NULL;
164 pcb->pcb_fpcpu = NULL;
165
166 ppc_mtmsr(msr);
167 __asm volatile("isync");
168 }
169