1 /* $NetBSD: bus_dma.c,v 1.40 2022/07/26 20:08:55 andvar Exp $ */
2
3 /*
4 * This file was taken from next68k/dev/bus_dma.c, which was originally
5 * taken from alpha/common/bus_dma.c.
6 * It should probably be re-synced when needed.
7 * original cvs id: NetBSD: bus_dma.c,v 1.13 1999/11/13 00:30:40 thorpej Exp
8 */
9
10 /*-
11 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
12 * All rights reserved.
13 *
14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
41
42 __KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.40 2022/07/26 20:08:55 andvar Exp $");
43
44 #include <sys/param.h>
45 #include <sys/systm.h>
46 #include <sys/kernel.h>
47 #include <sys/device.h>
48 #include <sys/kmem.h>
49 #include <sys/proc.h>
50 #include <sys/mbuf.h>
51 #include <sys/kcore.h>
52
53 #include <uvm/uvm.h>
54
55 #include <machine/cpu.h>
56 #include <machine/pmap.h>
57 #define _MVME68K_BUS_DMA_PRIVATE
58 #include <machine/bus.h>
59 #include <m68k/cacheops.h>
60
61 extern phys_ram_seg_t mem_clusters[];
62
63 int _bus_dmamap_load_buffer_direct_common(bus_dma_tag_t,
64 bus_dmamap_t, void *, bus_size_t, struct vmspace *, int,
65 paddr_t *, int *, int);
66
67 static size_t
_bus_dmamap_mapsize(int const nsegments)68 _bus_dmamap_mapsize(int const nsegments)
69 {
70 KASSERT(nsegments > 0);
71 return sizeof(struct mvme68k_bus_dmamap) +
72 (sizeof(bus_dma_segment_t) * (nsegments - 1));
73 }
74
75 /*
76 * Common function for DMA map creation. May be called by bus-specific
77 * DMA map creation functions.
78 */
79 int
_bus_dmamap_create(bus_dma_tag_t t,bus_size_t size,int nsegments,bus_size_t maxsegsz,bus_size_t boundary,int flags,bus_dmamap_t * dmamp)80 _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
81 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
82 {
83 struct mvme68k_bus_dmamap *map;
84 void *mapstore;
85
86 /*
87 * Allocate and initialize the DMA map. The end of the map
88 * is a variable-sized array of segments, so we allocate enough
89 * room for them in one shot.
90 *
91 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
92 * of ALLOCNOW notifies others that we've reserved these resources,
93 * and they are not to be freed.
94 *
95 * The bus_dmamap_t includes one bus_dma_segment_t, hence
96 * the (nsegments - 1).
97 */
98 if ((mapstore = kmem_zalloc(_bus_dmamap_mapsize(nsegments),
99 (flags & BUS_DMA_NOWAIT) ? KM_NOSLEEP : KM_SLEEP)) == NULL)
100 return ENOMEM;
101
102 map = (struct mvme68k_bus_dmamap *)mapstore;
103 map->_dm_size = size;
104 map->_dm_segcnt = nsegments;
105 map->_dm_maxmaxsegsz = maxsegsz;
106 map->_dm_boundary = boundary;
107 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
108 map->dm_maxsegsz = maxsegsz;
109 map->dm_mapsize = 0; /* no valid mappings */
110 map->dm_nsegs = 0;
111
112 *dmamp = map;
113 return 0;
114 }
115
116 /*
117 * Common function for DMA map destruction. May be called by bus-specific
118 * DMA map destruction functions.
119 */
120 void
_bus_dmamap_destroy(bus_dma_tag_t t,bus_dmamap_t map)121 _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
122 {
123
124 kmem_free(map, _bus_dmamap_mapsize(map->_dm_segcnt));
125 }
126
127 /*
128 * Utility function to load a linear buffer. lastaddrp holds state
129 * between invocations (for multiple-buffer loads). segp contains
130 * the starting segment on entrance, and the ending segment on exit.
131 * first indicates if this is the first invocation of this function.
132 */
133 int
_bus_dmamap_load_buffer_direct_common(bus_dma_tag_t t,bus_dmamap_t map,void * buf,bus_size_t buflen,struct vmspace * vm,int flags,paddr_t * lastaddrp,int * segp,int first)134 _bus_dmamap_load_buffer_direct_common(bus_dma_tag_t t, bus_dmamap_t map,
135 void *buf, bus_size_t buflen, struct vmspace *vm, int flags,
136 paddr_t *lastaddrp, int *segp, int first)
137 {
138 bus_size_t sgsize;
139 bus_addr_t curaddr, lastaddr, baddr, bmask;
140 vaddr_t vaddr = (vaddr_t)buf;
141 int seg, cacheable, coherent = BUS_DMA_COHERENT;
142
143 lastaddr = *lastaddrp;
144 bmask = ~(map->_dm_boundary - 1);
145
146 for (seg = *segp; buflen > 0 ; ) {
147 /*
148 * Get the physical address for this segment.
149 */
150 (void) pmap_extract(vm_map_pmap(&vm->vm_map), vaddr, &curaddr);
151 cacheable = _pmap_page_is_cacheable(vm_map_pmap(&vm->vm_map),
152 vaddr);
153
154 if (cacheable)
155 coherent = 0;
156
157 /*
158 * Compute the segment size, and adjust counts.
159 */
160 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET);
161 if (buflen < sgsize)
162 sgsize = buflen;
163
164 /*
165 * Make sure we don't cross any boundaries.
166 */
167 if (map->_dm_boundary > 0) {
168 baddr = (curaddr + map->_dm_boundary) & bmask;
169 if (sgsize > (baddr - curaddr))
170 sgsize = (baddr - curaddr);
171 }
172
173 /*
174 * Insert chunk into a segment, coalescing with
175 * the previous segment if possible.
176 */
177 if (first) {
178 map->dm_segs[seg].ds_addr =
179 map->dm_segs[seg]._ds_cpuaddr = curaddr;
180 map->dm_segs[seg].ds_len = sgsize;
181 map->dm_segs[seg]._ds_flags =
182 cacheable ? 0 : BUS_DMA_COHERENT;
183 first = 0;
184 } else {
185 if (curaddr == lastaddr &&
186 (map->dm_segs[seg].ds_len + sgsize) <=
187 map->dm_maxsegsz &&
188 (map->_dm_boundary == 0 ||
189 (map->dm_segs[seg].ds_addr & bmask) ==
190 (curaddr & bmask)))
191 map->dm_segs[seg].ds_len += sgsize;
192 else {
193 if (++seg >= map->_dm_segcnt)
194 break;
195 map->dm_segs[seg].ds_addr =
196 map->dm_segs[seg]._ds_cpuaddr = curaddr;
197 map->dm_segs[seg].ds_len = sgsize;
198 map->dm_segs[seg]._ds_flags =
199 cacheable ? 0 : BUS_DMA_COHERENT;
200 }
201 }
202
203 lastaddr = curaddr + sgsize;
204 vaddr += sgsize;
205 buflen -= sgsize;
206 }
207
208 *segp = seg;
209 *lastaddrp = lastaddr;
210 map->_dm_flags &= ~BUS_DMA_COHERENT;
211 map->_dm_flags |= coherent;
212
213 /*
214 * Did we fit?
215 */
216 if (buflen != 0) {
217 /*
218 * If there is a chained window, we will automatically
219 * fall back to it.
220 */
221 return EFBIG; /* XXX better return value here? */
222 }
223
224 return 0;
225 }
226
227 /*
228 * Common function for loading a direct-mapped DMA map with a linear
229 * buffer. Called by bus-specific DMA map load functions with the
230 * OR value appropriate for indicating "direct-mapped" for that
231 * chipset.
232 */
233 int
_bus_dmamap_load_direct(bus_dma_tag_t t,bus_dmamap_t map,void * buf,bus_size_t buflen,struct proc * p,int flags)234 _bus_dmamap_load_direct(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
235 bus_size_t buflen, struct proc *p, int flags)
236 {
237 paddr_t lastaddr;
238 int seg, error;
239 struct vmspace *vm;
240
241 /*
242 * Make sure that on error condition we return "no valid mappings".
243 */
244 map->dm_mapsize = 0;
245 map->dm_nsegs = 0;
246 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
247
248 if (buflen > map->_dm_size)
249 return EINVAL;
250
251 if (p != NULL) {
252 vm = p->p_vmspace;
253 } else {
254 vm = vmspace_kernel();
255 }
256
257 seg = 0;
258 error = _bus_dmamap_load_buffer_direct_common(t, map, buf, buflen,
259 vm, flags, &lastaddr, &seg, 1);
260 if (error == 0) {
261 map->dm_mapsize = buflen;
262 map->dm_nsegs = seg + 1;
263 }
264 return error;
265 }
266
267 /*
268 * Like _bus_dmamap_load_direct_common(), but for mbufs.
269 */
270 int
_bus_dmamap_load_mbuf_direct(bus_dma_tag_t t,bus_dmamap_t map,struct mbuf * m0,int flags)271 _bus_dmamap_load_mbuf_direct(bus_dma_tag_t t, bus_dmamap_t map,
272 struct mbuf *m0, int flags)
273 {
274 paddr_t lastaddr;
275 int seg, error, first;
276 struct mbuf *m;
277
278 /*
279 * Make sure that on error condition we return "no valid mappings."
280 */
281 map->dm_mapsize = 0;
282 map->dm_nsegs = 0;
283 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
284
285 #ifdef DIAGNOSTIC
286 if ((m0->m_flags & M_PKTHDR) == 0)
287 panic("_bus_dmamap_load_mbuf_direct_common: no packet header");
288 #endif
289
290 if (m0->m_pkthdr.len > map->_dm_size)
291 return EINVAL;
292
293 first = 1;
294 seg = 0;
295 error = 0;
296 for (m = m0; m != NULL && error == 0; m = m->m_next) {
297 if (m->m_len == 0)
298 continue;
299 error = _bus_dmamap_load_buffer_direct_common(t, map,
300 m->m_data, m->m_len, vmspace_kernel(), flags, &lastaddr,
301 &seg, first);
302 first = 0;
303 }
304 if (error == 0) {
305 map->dm_mapsize = m0->m_pkthdr.len;
306 map->dm_nsegs = seg + 1;
307 }
308 return error;
309 }
310
311 /*
312 * Like _bus_dmamap_load_direct_common(), but for uios.
313 */
314 int
_bus_dmamap_load_uio_direct(bus_dma_tag_t t,bus_dmamap_t map,struct uio * uio,int flags)315 _bus_dmamap_load_uio_direct(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
316 int flags)
317 {
318 paddr_t lastaddr;
319 int seg, i, error, first;
320 bus_size_t minlen, resid;
321 struct iovec *iov;
322 void *addr;
323
324 /*
325 * Make sure that on error condition we return "no valid mappings."
326 */
327 map->dm_mapsize = 0;
328 map->dm_nsegs = 0;
329 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
330
331 resid = uio->uio_resid;
332 iov = uio->uio_iov;
333
334 first = 1;
335 seg = 0;
336 error = 0;
337 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
338 /*
339 * Now at the first iovec to load. Load each iovec
340 * until we have exhausted the residual count.
341 */
342 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
343 addr = (void *)iov[i].iov_base;
344
345 error = _bus_dmamap_load_buffer_direct_common(t, map,
346 addr, minlen, uio->uio_vmspace, flags, &lastaddr, &seg,
347 first);
348 first = 0;
349
350 resid -= minlen;
351 }
352 if (error == 0) {
353 map->dm_mapsize = uio->uio_resid;
354 map->dm_nsegs = seg + 1;
355 }
356 return error;
357 }
358
359 /*
360 * Like _bus_dmamap_load_direct_common(), but for raw memory.
361 */
362 int
_bus_dmamap_load_raw_direct(bus_dma_tag_t t,bus_dmamap_t map,bus_dma_segment_t * segs,int nsegs,bus_size_t size,int flags)363 _bus_dmamap_load_raw_direct(bus_dma_tag_t t, bus_dmamap_t map,
364 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
365 {
366 /*
367 * @@@ This routine doesn't enforce map boundary requirement
368 * @@@ perhaps it should return an error instead of panicking
369 */
370
371 #ifdef DIAGNOSTIC
372 if (map->_dm_size < size) {
373 panic("_bus_dmamap_load_raw_direct: size is too large for map");
374 }
375 if (map->_dm_segcnt < nsegs) {
376 panic("_bus_dmamap_load_raw_direct: too many segments for map");
377 }
378 #endif
379
380 {
381 int i;
382 for (i = 0; i < nsegs; i++) {
383 #ifdef DIAGNOSTIC
384 if (map->dm_maxsegsz < map->dm_segs[i].ds_len) {
385 panic("%s: segment too large for map",
386 __func__);
387 }
388 #endif
389 map->dm_segs[i] = segs[i];
390 }
391 }
392
393 map->dm_nsegs = nsegs;
394 map->dm_mapsize = size;
395
396 return 0;
397 }
398
399 /*
400 * Common function for unloading a DMA map. May be called by
401 * chipset-specific DMA map unload functions.
402 */
403 void
_bus_dmamap_unload(bus_dma_tag_t t,bus_dmamap_t map)404 _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
405 {
406
407 /*
408 * No resources to free; just mark the mappings as
409 * invalid.
410 */
411 map->dm_maxsegsz = map->_dm_maxmaxsegsz;
412 map->dm_mapsize = 0;
413 map->dm_nsegs = 0;
414 map->_dm_flags &= ~BUS_DMA_COHERENT;
415 }
416
417 /*
418 * 68030 DMA map synchronization. May be called
419 * by chipset-specific DMA map synchronization functions.
420 */
421 void
_bus_dmamap_sync_030(bus_dma_tag_t t,bus_dmamap_t map,bus_addr_t offset,bus_size_t len,int ops)422 _bus_dmamap_sync_030(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
423 bus_size_t len, int ops)
424 {
425
426 /* Nothing yet */
427 }
428
429 /*
430 * 68040/68060 DMA map synchronization. May be called
431 * by chipset-specific DMA map synchronization functions.
432 */
433 void
_bus_dmamap_sync_0460(bus_dma_tag_t t,bus_dmamap_t map,bus_addr_t offset,bus_size_t len,int ops)434 _bus_dmamap_sync_0460(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
435 bus_size_t len, int ops)
436 {
437 bus_addr_t p, e, ps, pe;
438 bus_size_t seglen;
439 int i;
440
441 /* If the whole DMA map is uncached, do nothing. */
442 if (map->_dm_flags & BUS_DMA_COHERENT)
443 return;
444
445 /* Short-circuit for unsupported `ops' */
446 if ((ops & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) == 0)
447 return;
448
449 for (i = 0; i < map->dm_nsegs && len > 0; i++) {
450 if (map->dm_segs[i].ds_len <= offset) {
451 /* Segment irrelevant - before requested offset */
452 offset -= map->dm_segs[i].ds_len;
453 continue;
454 }
455
456 seglen = map->dm_segs[i].ds_len - offset;
457 if (seglen > len)
458 seglen = len;
459 len -= seglen;
460
461 /* Ignore cache-inhibited segments */
462 if (map->dm_segs[i]._ds_flags & BUS_DMA_COHERENT)
463 continue;
464
465 ps = map->dm_segs[i]._ds_cpuaddr + offset;
466 pe = ps + seglen;
467
468 if (ops & BUS_DMASYNC_PREWRITE) {
469 p = ps & ~0xf;
470 e = (pe + 15) & ~0xf;
471
472 /* flush cache line (060 too) */
473 while((p < e) && (p % PAGE_SIZE)) {
474 DCFL_40(p);
475 p += 16;
476 }
477
478 /* flush page (060 too) */
479 while((p + PAGE_SIZE) <= e) {
480 DCFP_40(p);
481 p += PAGE_SIZE;
482 }
483
484 /* flush cache line (060 too) */
485 while(p < e) {
486 DCFL_40(p);
487 p += 16;
488 }
489 }
490
491 /*
492 * Normally, the `PREREAD' flag instructs us to purge the
493 * cache for the specified offset and length. However, if
494 * the offset/length is not aligned to a cacheline boundary,
495 * we may end up purging some legitimate data from the
496 * start/end of the cache. In such a case, *flush* the
497 * cachelines at the start and end of the required region.
498 */
499 if (ops & BUS_DMASYNC_PREREAD) {
500 if (ps & 0xf) {
501 DCFL_40(ps & ~0xf);
502 ICPL_40(ps & ~0xf);
503 }
504 if (pe & 0xf) {
505 DCFL_40(pe & ~0xf);
506 ICPL_40(pe & ~0xf);
507 }
508
509 p = (ps + 15) & ~0xf;
510 e = pe & ~0xf;
511
512 /* purge cache line */
513 while((p < e) && (p % PAGE_SIZE)) {
514 DCPL_40(p);
515 ICPL_40(p);
516 p += 16;
517 }
518
519 /* purge page */
520 while((p + PAGE_SIZE) <= e) {
521 DCPP_40(p);
522 ICPP_40(p);
523 p += PAGE_SIZE;
524 }
525
526 /* purge cache line */
527 while(p < e) {
528 DCPL_40(p);
529 ICPL_40(p);
530 p += 16;
531 }
532 }
533 }
534 }
535
536 /*
537 * Common function for DMA-safe memory allocation. May be called
538 * by bus-specific DMA memory allocation functions.
539 */
540 int
_bus_dmamem_alloc_common(bus_dma_tag_t t,bus_addr_t low,bus_addr_t high,bus_size_t size,bus_size_t alignment,bus_size_t boundary,bus_dma_segment_t * segs,int nsegs,int * rsegs,int flags)541 _bus_dmamem_alloc_common(bus_dma_tag_t t, bus_addr_t low, bus_addr_t high,
542 bus_size_t size, bus_size_t alignment, bus_size_t boundary,
543 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags)
544 {
545 paddr_t curaddr, lastaddr;
546 struct vm_page *m;
547 struct pglist mlist;
548 int curseg, error;
549
550 /* Always round the size. */
551 size = round_page(size);
552 high -= PAGE_SIZE;
553
554 /*
555 * Allocate pages from the VM system.
556 *
557 * XXXSCW: This will be sub-optimal if the base-address of offboard
558 * RAM is significantly higher than the end-address of onboard RAM.
559 * (Due to how uvm_pglistalloc() is implemented.)
560 *
561 * uvm_pglistalloc() also currently ignores the 'nsegs' parameter,
562 * and always returns only one (contiguous) segment.
563 */
564 error = uvm_pglistalloc(size, low, high, alignment, boundary,
565 &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
566 if (error)
567 return error;
568
569 /*
570 * Compute the location, size, and number of segments actually
571 * returned by the VM code.
572 */
573 m = mlist.tqh_first;
574 curseg = 0;
575 lastaddr = VM_PAGE_TO_PHYS(m);
576 segs[curseg].ds_addr = segs[curseg]._ds_cpuaddr = lastaddr;
577 segs[curseg].ds_len = PAGE_SIZE;
578 segs[curseg]._ds_flags = 0;
579 m = m->pageq.queue.tqe_next;
580
581 for (; m != NULL; m = m->pageq.queue.tqe_next) {
582 if (curseg > nsegs) {
583 #ifdef DIAGNOSTIC
584 printf("%s: too many segments\n", __func__);
585 #ifdef DEBUG
586 panic("%s", __func__);
587 #endif
588 #endif
589 uvm_pglistfree(&mlist);
590 return -1;
591 }
592
593 curaddr = VM_PAGE_TO_PHYS(m);
594 #ifdef DIAGNOSTIC
595 if (curaddr < low || curaddr > high) {
596 printf("uvm_pglistalloc returned non-sensical"
597 " address 0x%lx\n", curaddr);
598 panic("%s", __func__);
599 }
600 #endif
601 if (curaddr == (lastaddr + PAGE_SIZE))
602 segs[curseg].ds_len += PAGE_SIZE;
603 else {
604 curseg++;
605 segs[curseg].ds_addr =
606 segs[curseg]._ds_cpuaddr = curaddr;
607 segs[curseg].ds_len = PAGE_SIZE;
608 segs[curseg]._ds_flags = 0;
609 }
610 lastaddr = curaddr;
611 }
612
613 *rsegs = curseg + 1;
614
615 return 0;
616 }
617 /*
618 * Common function for DMA-safe memory allocation. May be called
619 * by bus-specific DMA memory allocation functions.
620 */
621 int
_bus_dmamem_alloc(bus_dma_tag_t t,bus_size_t size,bus_size_t alignment,bus_size_t boundary,bus_dma_segment_t * segs,int nsegs,int * rsegs,int flags)622 _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
623 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
624 int flags)
625 {
626 extern paddr_t avail_start, avail_end;
627 bus_addr_t high;
628
629 /*
630 * Assume any memory will do (this includes off-board RAM)
631 */
632 high = avail_end;
633
634 if ((flags & BUS_DMA_ONBOARD_RAM) != 0) {
635 /*
636 * Constrain the memory to 'onboard' RAM only
637 */
638 high = mem_clusters[0].size;
639 }
640
641 if ((flags & BUS_DMA_24BIT) != 0 && (high & 0xff000000u) != 0) {
642 /*
643 * We need to constrain the memory to a 24-bit address
644 */
645 high = 0x01000000u;
646 }
647
648 return _bus_dmamem_alloc_common(t, avail_start, high,
649 size, alignment, boundary, segs, nsegs, rsegs, flags);
650 }
651
652 /*
653 * Common function for freeing DMA-safe memory. May be called by
654 * bus-specific DMA memory free functions.
655 */
656 void
_bus_dmamem_free(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs)657 _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
658 {
659 struct vm_page *m;
660 bus_addr_t addr;
661 struct pglist mlist;
662 int curseg;
663
664 /*
665 * Build a list of pages to free back to the VM system.
666 */
667 TAILQ_INIT(&mlist);
668 for (curseg = 0; curseg < nsegs; curseg++) {
669 for (addr = segs[curseg]._ds_cpuaddr;
670 addr < (segs[curseg]._ds_cpuaddr + segs[curseg].ds_len);
671 addr += PAGE_SIZE) {
672 m = PHYS_TO_VM_PAGE(addr);
673 TAILQ_INSERT_TAIL(&mlist, m, pageq.queue);
674 }
675 }
676
677 uvm_pglistfree(&mlist);
678 }
679
680 /*
681 * Common function for mapping DMA-safe memory. May be called by
682 * bus-specific DMA memory map functions.
683 */
684 int
_bus_dmamem_map(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs,size_t size,void ** kvap,int flags)685 _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
686 size_t size, void **kvap, int flags)
687 {
688 vaddr_t va;
689 bus_addr_t addr;
690 int curseg;
691 const uvm_flag_t kmflags =
692 (flags & BUS_DMA_NOWAIT) != 0 ? UVM_KMF_NOWAIT : 0;
693
694 size = round_page(size);
695
696 va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags);
697
698 if (va == 0)
699 return ENOMEM;
700
701 *kvap = (void *)va;
702
703 for (curseg = 0; curseg < nsegs; curseg++) {
704 for (addr = segs[curseg]._ds_cpuaddr;
705 addr < (segs[curseg]._ds_cpuaddr + segs[curseg].ds_len);
706 addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
707 if (size == 0)
708 panic("%s: size botch", __func__);
709
710 pmap_enter(pmap_kernel(), va, addr,
711 VM_PROT_READ | VM_PROT_WRITE,
712 VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
713
714 /* Cache-inhibit the page if necessary */
715 if ((flags & BUS_DMA_COHERENT) != 0)
716 _pmap_set_page_cacheinhibit(pmap_kernel(), va);
717
718 segs[curseg]._ds_flags &= ~BUS_DMA_COHERENT;
719 segs[curseg]._ds_flags |= (flags & BUS_DMA_COHERENT);
720 }
721 }
722 pmap_update(pmap_kernel());
723
724 if ((flags & BUS_DMA_COHERENT) != 0)
725 TBIAS();
726
727 return 0;
728 }
729
730 /*
731 * Common function for unmapping DMA-safe memory. May be called by
732 * bus-specific DMA memory unmapping functions.
733 */
734 void
_bus_dmamem_unmap(bus_dma_tag_t t,void * kva,size_t size)735 _bus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)
736 {
737 vaddr_t va;
738 size_t s;
739
740 #ifdef DIAGNOSTIC
741 if ((u_long)kva & PGOFSET)
742 panic("%s", __func__);
743 #endif
744
745 size = round_page(size);
746
747 /*
748 * Re-enable cacheing on the range
749 * XXXSCW: There should be some way to indicate that the pages
750 * were mapped DMA_MAP_COHERENT in the first place...
751 */
752 for (s = 0, va = (vaddr_t)kva; s < size;
753 s += PAGE_SIZE, va += PAGE_SIZE)
754 _pmap_set_page_cacheable(pmap_kernel(), va);
755
756 pmap_remove(pmap_kernel(), (vaddr_t)kva, (vaddr_t)kva + size);
757 pmap_update(pmap_kernel());
758 uvm_km_free(kernel_map, (vaddr_t)kva, size, UVM_KMF_VAONLY);
759 }
760
761 /*
762 * Common function for mmap(2)'ing DMA-safe memory. May be called by
763 * bus-specific DMA mmap(2)'ing functions.
764 */
765 paddr_t
_bus_dmamem_mmap(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs,off_t off,int prot,int flags)766 _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
767 off_t off, int prot, int flags)
768 {
769 int i;
770
771 for (i = 0; i < nsegs; i++) {
772 #ifdef DIAGNOSTIC
773 if (off & PGOFSET)
774 panic("%s: offset unaligned", __func__);
775 if (segs[i]._ds_cpuaddr & PGOFSET)
776 panic("%s: segment unaligned", __func__);
777 if (segs[i].ds_len & PGOFSET)
778 panic("%s: segment size not multiple of page size",
779 __func__);
780 #endif
781 if (off >= segs[i].ds_len) {
782 off -= segs[i].ds_len;
783 continue;
784 }
785
786 /*
787 * XXXSCW: What about BUS_DMA_COHERENT ??
788 */
789
790 return m68k_btop((char *)segs[i]._ds_cpuaddr + off);
791 }
792
793 /* Page not found. */
794 return -1;
795 }
796