1 /* $NetBSD: bus_dma.c,v 1.40 2023/09/26 12:46:30 tsutsui Exp $ */
2
3 /*
4 * This file was taken from alpha/common/bus_dma.c
5 * should probably be re-synced when needed.
6 * Darrin B. Jewell <dbj@NetBSD.org> Sat Jul 31 06:11:33 UTC 1999
7 * original cvs id: NetBSD: bus_dma.c,v 1.31 1999/07/08 18:05:23 thorpej Exp
8 */
9
10 /*-
11 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
12 * All rights reserved.
13 *
14 * This code is derived from software contributed to The NetBSD Foundation
15 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
16 * NASA Ames Research Center.
17 *
18 * Redistribution and use in source and binary forms, with or without
19 * modification, are permitted provided that the following conditions
20 * are met:
21 * 1. Redistributions of source code must retain the above copyright
22 * notice, this list of conditions and the following disclaimer.
23 * 2. Redistributions in binary form must reproduce the above copyright
24 * notice, this list of conditions and the following disclaimer in the
25 * documentation and/or other materials provided with the distribution.
26 *
27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 * POSSIBILITY OF SUCH DAMAGE.
38 */
39
40 #include "opt_m68k_arch.h"
41
42 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
43
44 __KERNEL_RCSID(0, "$NetBSD: bus_dma.c,v 1.40 2023/09/26 12:46:30 tsutsui Exp $");
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/device.h>
50 #include <sys/kmem.h>
51 #include <sys/proc.h>
52 #include <sys/mbuf.h>
53
54 #include <uvm/uvm.h>
55
56 #include <machine/cpu.h>
57
58 #define _M68K_BUS_DMA_PRIVATE
59 #include <machine/bus.h>
60 #include <m68k/cacheops.h>
61
62 int _bus_dmamap_load_buffer_direct_common(bus_dma_tag_t,
63 bus_dmamap_t, void *, bus_size_t, struct vmspace *, int,
64 paddr_t *, int *, int);
65
66 static size_t
_bus_dmamap_mapsize(int const nsegments)67 _bus_dmamap_mapsize(int const nsegments)
68 {
69 KASSERT(nsegments > 0);
70 return sizeof(struct m68k_bus_dmamap) +
71 (sizeof(bus_dma_segment_t) * (nsegments - 1));
72 }
73
74 /*
75 * Common function for DMA map creation. May be called by bus-specific
76 * DMA map creation functions.
77 */
78 int
_bus_dmamap_create(bus_dma_tag_t t,bus_size_t size,int nsegments,bus_size_t maxsegsz,bus_size_t boundary,int flags,bus_dmamap_t * dmamp)79 _bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
80 bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
81 {
82 struct m68k_bus_dmamap *map;
83 void *mapstore;
84
85 /*
86 * Allocate and initialize the DMA map. The end of the map
87 * is a variable-sized array of segments, so we allocate enough
88 * room for them in one shot.
89 *
90 * Note we don't preserve the WAITOK or NOWAIT flags. Preservation
91 * of ALLOCNOW notifies others that we've reserved these resources,
92 * and they are not to be freed.
93 *
94 * The bus_dmamap_t includes one bus_dma_segment_t, hence
95 * the (nsegments - 1).
96 */
97 if ((mapstore = kmem_zalloc(_bus_dmamap_mapsize(nsegments),
98 (flags & BUS_DMA_NOWAIT) ? KM_NOSLEEP : KM_SLEEP)) == NULL)
99 return ENOMEM;
100
101 map = (struct m68k_bus_dmamap *)mapstore;
102 map->_dm_size = size;
103 map->_dm_segcnt = nsegments;
104 map->_dm_maxmaxsegsz = maxsegsz;
105 if (t->_boundary != 0 && t->_boundary < boundary)
106 map->_dm_boundary = t->_boundary;
107 else
108 map->_dm_boundary = boundary;
109 map->_dm_flags = flags & ~(BUS_DMA_WAITOK|BUS_DMA_NOWAIT);
110 map->dm_maxsegsz = maxsegsz;
111 map->dm_mapsize = 0; /* no valid mappings */
112 map->dm_nsegs = 0;
113
114 *dmamp = map;
115 return 0;
116 }
117
118 /*
119 * Common function for DMA map destruction. May be called by bus-specific
120 * DMA map destruction functions.
121 */
122 void
_bus_dmamap_destroy(bus_dma_tag_t t,bus_dmamap_t map)123 _bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
124 {
125
126 kmem_free(map, _bus_dmamap_mapsize(map->_dm_segcnt));
127 }
128
129 /*
130 * Utility function to load a linear buffer. lastaddrp holds state
131 * between invocations (for multiple-buffer loads). segp contains
132 * the starting segment on entrance, and the ending segment on exit.
133 * first indicates if this is the first invocation of this function.
134 */
135 int
_bus_dmamap_load_buffer_direct_common(bus_dma_tag_t t,bus_dmamap_t map,void * buf,bus_size_t buflen,struct vmspace * vm,int flags,paddr_t * lastaddrp,int * segp,int first)136 _bus_dmamap_load_buffer_direct_common(bus_dma_tag_t t, bus_dmamap_t map,
137 void *buf, bus_size_t buflen, struct vmspace *vm, int flags,
138 paddr_t *lastaddrp, int *segp, int first)
139 {
140 bus_size_t sgsize;
141 bus_addr_t curaddr, lastaddr, baddr, bmask;
142 vaddr_t vaddr = (vaddr_t)buf;
143 int seg, cacheable, coherent;
144 pmap_t pmap;
145 bool rv __diagused;
146
147 coherent = BUS_DMA_COHERENT;
148 lastaddr = *lastaddrp;
149 bmask = ~(map->_dm_boundary - 1);
150 if (!VMSPACE_IS_KERNEL_P(vm))
151 pmap = vm_map_pmap(&vm->vm_map);
152 else
153 pmap = pmap_kernel();
154
155 for (seg = *segp; buflen > 0 ; ) {
156 /*
157 * Get the physical address for this segment.
158 */
159 rv = pmap_extract(pmap, vaddr, (paddr_t *) &curaddr);
160 KASSERT(rv);
161
162 cacheable = _pmap_page_is_cacheable(pmap, vaddr);
163
164 if (cacheable)
165 coherent = 0;
166
167 /*
168 * Compute the segment size, and adjust counts.
169 */
170 sgsize = PAGE_SIZE - ((u_long)vaddr & PGOFSET);
171 if (buflen < sgsize)
172 sgsize = buflen;
173
174 /*
175 * Make sure we don't cross any boundaries.
176 */
177 if (map->_dm_boundary > 0) {
178 baddr = (curaddr + map->_dm_boundary) & bmask;
179 if (sgsize > (baddr - curaddr))
180 sgsize = (baddr - curaddr);
181 }
182
183 /*
184 * Insert chunk into a segment, coalescing with
185 * the previous segment if possible.
186 */
187 if (first) {
188 map->dm_segs[seg].ds_addr = curaddr;
189 map->dm_segs[seg].ds_len = sgsize;
190 map->dm_segs[seg]._ds_flags =
191 cacheable ? 0 : BUS_DMA_COHERENT;
192 first = 0;
193 } else {
194 if (curaddr == lastaddr &&
195 (map->dm_segs[seg].ds_len + sgsize) <=
196 map->dm_maxsegsz &&
197 (map->_dm_boundary == 0 ||
198 (map->dm_segs[seg].ds_addr & bmask) ==
199 (curaddr & bmask)))
200 map->dm_segs[seg].ds_len += sgsize;
201 else {
202 if (++seg >= map->_dm_segcnt)
203 break;
204 map->dm_segs[seg].ds_addr = curaddr;
205 map->dm_segs[seg].ds_len = sgsize;
206 map->dm_segs[seg]._ds_flags =
207 cacheable ? 0 : BUS_DMA_COHERENT;
208 }
209 }
210
211 lastaddr = curaddr + sgsize;
212 vaddr += sgsize;
213 buflen -= sgsize;
214 }
215
216 *segp = seg;
217 *lastaddrp = lastaddr;
218 map->_dm_flags &= ~BUS_DMA_COHERENT;
219 /* BUS_DMA_COHERENT is set only if all segments are uncached */
220 map->_dm_flags |= coherent;
221
222 /*
223 * Did we fit?
224 */
225 if (buflen != 0) {
226 /*
227 * If there is a chained window, we will automatically
228 * fall back to it.
229 */
230 return EFBIG; /* XXX better return value here? */
231 }
232
233 return 0;
234 }
235
236 /*
237 * Common function for loading a direct-mapped DMA map with a linear
238 * buffer. Called by bus-specific DMA map load functions with the
239 * OR value appropriate for indicating "direct-mapped" for that
240 * chipset.
241 */
242 int
_bus_dmamap_load_direct(bus_dma_tag_t t,bus_dmamap_t map,void * buf,bus_size_t buflen,struct proc * p,int flags)243 _bus_dmamap_load_direct(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
244 bus_size_t buflen, struct proc *p, int flags)
245 {
246 paddr_t lastaddr;
247 int seg, error;
248 struct vmspace *vm;
249
250 /*
251 * Make sure that on error condition we return "no valid mappings".
252 */
253 map->dm_mapsize = 0;
254 map->dm_nsegs = 0;
255 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
256
257 if (buflen > map->_dm_size)
258 return (EINVAL);
259
260 if (p != NULL) {
261 vm = p->p_vmspace;
262 } else {
263 vm = vmspace_kernel();
264 }
265
266 seg = 0;
267 error = _bus_dmamap_load_buffer_direct_common(t, map, buf, buflen,
268 vm, flags, &lastaddr, &seg, 1);
269 if (error == 0) {
270 map->dm_mapsize = buflen;
271 map->dm_nsegs = seg + 1;
272 }
273 return error;
274 }
275
276 /*
277 * Like _bus_dmamap_load_direct_common(), but for mbufs.
278 */
279 int
_bus_dmamap_load_mbuf_direct(bus_dma_tag_t t,bus_dmamap_t map,struct mbuf * m0,int flags)280 _bus_dmamap_load_mbuf_direct(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
281 int flags)
282 {
283 paddr_t lastaddr;
284 int seg, error, first;
285 struct mbuf *m;
286
287 /*
288 * Make sure that on error condition we return "no valid mappings."
289 */
290 map->dm_mapsize = 0;
291 map->dm_nsegs = 0;
292 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
293
294 #ifdef DIAGNOSTIC
295 if ((m0->m_flags & M_PKTHDR) == 0)
296 panic("_bus_dmamap_load_mbuf_direct_common: no packet header");
297 #endif
298
299 if (m0->m_pkthdr.len > map->_dm_size)
300 return EINVAL;
301
302 first = 1;
303 seg = 0;
304 error = 0;
305 for (m = m0; m != NULL && error == 0; m = m->m_next) {
306 if (m->m_len == 0)
307 continue;
308 error = _bus_dmamap_load_buffer_direct_common(t, map,
309 m->m_data, m->m_len, vmspace_kernel(), flags, &lastaddr,
310 &seg, first);
311 first = 0;
312 }
313 if (error == 0) {
314 map->dm_mapsize = m0->m_pkthdr.len;
315 map->dm_nsegs = seg + 1;
316 }
317 return error;
318 }
319
320 /*
321 * Like _bus_dmamap_load_direct_common(), but for uios.
322 */
323 int
_bus_dmamap_load_uio_direct(bus_dma_tag_t t,bus_dmamap_t map,struct uio * uio,int flags)324 _bus_dmamap_load_uio_direct(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
325 int flags)
326 {
327 paddr_t lastaddr;
328 int seg, i, error, first;
329 bus_size_t minlen, resid;
330 struct iovec *iov;
331 void *addr;
332
333 /*
334 * Make sure that on error condition we return "no valid mappings."
335 */
336 map->dm_mapsize = 0;
337 map->dm_nsegs = 0;
338 KASSERT(map->dm_maxsegsz <= map->_dm_maxmaxsegsz);
339
340 resid = uio->uio_resid;
341 iov = uio->uio_iov;
342
343 first = 1;
344 seg = 0;
345 error = 0;
346 for (i = 0; i < uio->uio_iovcnt && resid != 0 && error == 0; i++) {
347 /*
348 * Now at the first iovec to load. Load each iovec
349 * until we have exhausted the residual count.
350 */
351 minlen = resid < iov[i].iov_len ? resid : iov[i].iov_len;
352 addr = (void *)iov[i].iov_base;
353
354 error = _bus_dmamap_load_buffer_direct_common(t, map,
355 addr, minlen, uio->uio_vmspace, flags, &lastaddr, &seg,
356 first);
357 first = 0;
358
359 resid -= minlen;
360 }
361 if (error == 0) {
362 map->dm_mapsize = uio->uio_resid;
363 map->dm_nsegs = seg + 1;
364 }
365 return error;
366 }
367
368 /*
369 * Like _bus_dmamap_load_direct_common(), but for raw memory.
370 */
371 int
_bus_dmamap_load_raw_direct(bus_dma_tag_t t,bus_dmamap_t map,bus_dma_segment_t * segs,int nsegs,bus_size_t size,int flags)372 _bus_dmamap_load_raw_direct(bus_dma_tag_t t, bus_dmamap_t map,
373 bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
374 {
375
376 /*
377 * @@@ This routine doesn't enforce map boundary requirement
378 * @@@ perhaps it should return an error instead of panicking
379 */
380
381 #ifdef DIAGNOSTIC
382 if (map->_dm_size < size) {
383 panic("_bus_dmamap_load_raw_direct: size is too large for map");
384 }
385 if (map->_dm_segcnt < nsegs) {
386 panic("_bus_dmamap_load_raw_direct: too many segments for map");
387 }
388 #endif
389
390 {
391 int i;
392 for (i=0;i<nsegs;i++) {
393 #ifdef DIAGNOSTIC
394 if (map->dm_maxsegsz < map->dm_segs[i].ds_len) {
395 panic("_bus_dmamap_load_raw_direct: "
396 "segment too large for map");
397 }
398 #endif
399 map->dm_segs[i] = segs[i];
400 }
401 }
402
403 map->dm_nsegs = nsegs;
404 map->dm_mapsize = size;
405
406 return 0;
407 }
408
409 /*
410 * Common function for unloading a DMA map. May be called by
411 * chipset-specific DMA map unload functions.
412 */
413 void
_bus_dmamap_unload(bus_dma_tag_t t,bus_dmamap_t map)414 _bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
415 {
416
417 /*
418 * No resources to free; just mark the mappings as
419 * invalid.
420 */
421 map->dm_maxsegsz = map->_dm_maxmaxsegsz;
422 map->dm_mapsize = 0;
423 map->dm_nsegs = 0;
424 map->_dm_flags &= ~BUS_DMA_COHERENT;
425 }
426
427 /*
428 * Common function for DMA map synchronization. May be called
429 * by chipset-specific DMA map synchronization functions.
430 */
431 void
_bus_dmamap_sync(bus_dma_tag_t t,bus_dmamap_t map,bus_addr_t offset,bus_size_t len,int ops)432 _bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
433 bus_size_t len, int ops)
434 {
435 #if defined(M68040) || defined(M68060)
436 bus_addr_t p, e, ps, pe;
437 bus_size_t seglen;
438 bus_dma_segment_t *seg;
439 int i;
440 #endif
441
442 #if defined(M68020) || defined(M68030)
443 #if defined(M68040) || defined(M68060)
444 if (cputype == CPU_68020 || cputype == CPU_68030)
445 #endif
446 /* assume no L2 physical cache */
447 return;
448 #endif
449
450 #if defined(M68040) || defined(M68060)
451 /* If the whole DMA map is uncached, do nothing. */
452 if ((map->_dm_flags & BUS_DMA_COHERENT) != 0)
453 return;
454
455 /* Short-circuit for unsupported `ops' */
456 if ((ops & (BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE)) == 0)
457 return;
458
459 /*
460 * flush/purge the cache.
461 */
462 for (i = 0; i < map->dm_nsegs && len != 0; i++) {
463 seg = &map->dm_segs[i];
464 if (seg->ds_len <= offset) {
465 /* Segment irrelevant - before requested offset */
466 offset -= seg->ds_len;
467 continue;
468 }
469
470 /*
471 * Now at the first segment to sync; nail
472 * each segment until we have exhausted the
473 * length.
474 */
475 seglen = seg->ds_len - offset;
476 if (seglen > len)
477 seglen = len;
478
479 /* Ignore cache-inhibited segments */
480 if ((seg->_ds_flags & BUS_DMA_COHERENT) != 0)
481 continue;
482
483 ps = seg->ds_addr + offset;
484 pe = ps + seglen;
485
486 if (ops & BUS_DMASYNC_PREWRITE) {
487 p = ps & ~CACHELINE_MASK;
488 e = (pe + CACHELINE_MASK) & ~CACHELINE_MASK;
489
490 /* flush cacheline */
491 while ((p < e) && (p & (CACHELINE_SIZE * 8 - 1)) != 0) {
492 DCFL(p);
493 p += CACHELINE_SIZE;
494 }
495
496 /* flush cachelines per 128bytes */
497 while ((p + CACHELINE_SIZE * 8 <= e) &&
498 (p & PAGE_MASK) != 0) {
499 DCFL(p);
500 p += CACHELINE_SIZE;
501 DCFL(p);
502 p += CACHELINE_SIZE;
503 DCFL(p);
504 p += CACHELINE_SIZE;
505 DCFL(p);
506 p += CACHELINE_SIZE;
507 DCFL(p);
508 p += CACHELINE_SIZE;
509 DCFL(p);
510 p += CACHELINE_SIZE;
511 DCFL(p);
512 p += CACHELINE_SIZE;
513 DCFL(p);
514 p += CACHELINE_SIZE;
515 }
516
517 /* flush page */
518 while (p + PAGE_SIZE <= e) {
519 DCFP(p);
520 p += PAGE_SIZE;
521 }
522
523 /* flush cachelines per 128bytes */
524 while (p + CACHELINE_SIZE * 8 <= e) {
525 DCFL(p);
526 p += CACHELINE_SIZE;
527 DCFL(p);
528 p += CACHELINE_SIZE;
529 DCFL(p);
530 p += CACHELINE_SIZE;
531 DCFL(p);
532 p += CACHELINE_SIZE;
533 DCFL(p);
534 p += CACHELINE_SIZE;
535 DCFL(p);
536 p += CACHELINE_SIZE;
537 DCFL(p);
538 p += CACHELINE_SIZE;
539 DCFL(p);
540 p += CACHELINE_SIZE;
541 }
542
543 /* flush cacheline */
544 while (p < e) {
545 DCFL(p);
546 p += CACHELINE_SIZE;
547 }
548 }
549
550 /*
551 * Normally, the `PREREAD' flag instructs us to purge the
552 * cache for the specified offset and length. However, if
553 * the offset/length is not aligned to a cacheline boundary,
554 * we may end up purging some legitimate data from the
555 * start/end of the cache. In such a case, *flush* the
556 * cachelines at the start and end of the required region.
557 */
558 else if (ops & BUS_DMASYNC_PREREAD) {
559 /* flush cacheline on start boundary */
560 if (ps & CACHELINE_MASK) {
561 DCFL(ps & ~CACHELINE_MASK);
562 }
563
564 p = (ps + CACHELINE_MASK) & ~CACHELINE_MASK;
565 e = pe & ~CACHELINE_MASK;
566
567 /* purge cacheline */
568 while ((p < e) && (p & (CACHELINE_SIZE * 8 - 1)) != 0) {
569 DCPL(p);
570 p += CACHELINE_SIZE;
571 }
572
573 /* purge cachelines per 128bytes */
574 while ((p + CACHELINE_SIZE * 8 <= e) &&
575 (p & PAGE_MASK) != 0) {
576 DCPL(p);
577 p += CACHELINE_SIZE;
578 DCPL(p);
579 p += CACHELINE_SIZE;
580 DCPL(p);
581 p += CACHELINE_SIZE;
582 DCPL(p);
583 p += CACHELINE_SIZE;
584 DCPL(p);
585 p += CACHELINE_SIZE;
586 DCPL(p);
587 p += CACHELINE_SIZE;
588 DCPL(p);
589 p += CACHELINE_SIZE;
590 DCPL(p);
591 p += CACHELINE_SIZE;
592 }
593
594 /* purge page */
595 while (p + PAGE_SIZE <= e) {
596 DCPP(p);
597 p += PAGE_SIZE;
598 }
599
600 /* purge cachelines per 128bytes */
601 while (p + CACHELINE_SIZE * 8 <= e) {
602 DCPL(p);
603 p += CACHELINE_SIZE;
604 DCPL(p);
605 p += CACHELINE_SIZE;
606 DCPL(p);
607 p += CACHELINE_SIZE;
608 DCPL(p);
609 p += CACHELINE_SIZE;
610 DCPL(p);
611 p += CACHELINE_SIZE;
612 DCPL(p);
613 p += CACHELINE_SIZE;
614 DCPL(p);
615 p += CACHELINE_SIZE;
616 DCPL(p);
617 p += CACHELINE_SIZE;
618 }
619
620 /* purge cacheline */
621 while (p < e) {
622 DCPL(p);
623 p += CACHELINE_SIZE;
624 }
625
626 /* flush cacheline on end boundary */
627 if (p < pe) {
628 DCFL(p);
629 }
630 }
631 offset = 0;
632 len -= seglen;
633 }
634 #endif /* defined(M68040) || defined(M68060) */
635 }
636
637 /*
638 * Common function for DMA-safe memory allocation. May be called
639 * by bus-specific DMA memory allocation functions.
640 */
641 int
_bus_dmamem_alloc(bus_dma_tag_t t,bus_size_t size,bus_size_t alignment,bus_size_t boundary,bus_dma_segment_t * segs,int nsegs,int * rsegs,int flags)642 _bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
643 bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
644 int flags)
645 {
646 extern paddr_t avail_start, avail_end;
647 paddr_t curaddr, lastaddr, high;
648 struct vm_page *m;
649 struct pglist mlist;
650 int curseg, error;
651
652 /* Always round the size. */
653 size = round_page(size);
654
655 high = avail_end - PAGE_SIZE;
656
657 /*
658 * Allocate pages from the VM system.
659 */
660 error = uvm_pglistalloc(size, avail_start, high, alignment, boundary,
661 &mlist, nsegs, (flags & BUS_DMA_NOWAIT) == 0);
662 if (error)
663 return error;
664
665 /*
666 * Compute the location, size, and number of segments actually
667 * returned by the VM code.
668 */
669 m = mlist.tqh_first;
670 curseg = 0;
671 lastaddr = segs[curseg].ds_addr = VM_PAGE_TO_PHYS(m);
672 segs[curseg].ds_len = PAGE_SIZE;
673 m = m->pageq.queue.tqe_next;
674
675 for (; m != NULL; m = m->pageq.queue.tqe_next) {
676 curaddr = VM_PAGE_TO_PHYS(m);
677 #ifdef DIAGNOSTIC
678 if (curaddr < avail_start || curaddr >= high) {
679 printf("uvm_pglistalloc returned non-sensical"
680 " address 0x%lx\n", curaddr);
681 panic("_bus_dmamem_alloc");
682 }
683 #endif
684 if (curaddr == (lastaddr + PAGE_SIZE))
685 segs[curseg].ds_len += PAGE_SIZE;
686 else {
687 curseg++;
688 segs[curseg].ds_addr = curaddr;
689 segs[curseg].ds_len = PAGE_SIZE;
690 }
691 lastaddr = curaddr;
692 }
693
694 *rsegs = curseg + 1;
695
696 return 0;
697 }
698
699 /*
700 * Common function for freeing DMA-safe memory. May be called by
701 * bus-specific DMA memory free functions.
702 */
703 void
_bus_dmamem_free(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs)704 _bus_dmamem_free(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs)
705 {
706 struct vm_page *m;
707 bus_addr_t addr;
708 struct pglist mlist;
709 int curseg;
710
711 /*
712 * Build a list of pages to free back to the VM system.
713 */
714 TAILQ_INIT(&mlist);
715 for (curseg = 0; curseg < nsegs; curseg++) {
716 for (addr = segs[curseg].ds_addr;
717 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
718 addr += PAGE_SIZE) {
719 m = PHYS_TO_VM_PAGE(addr);
720 TAILQ_INSERT_TAIL(&mlist, m, pageq.queue);
721 }
722 }
723
724 uvm_pglistfree(&mlist);
725 }
726
727 /*
728 * Common function for mapping DMA-safe memory. May be called by
729 * bus-specific DMA memory map functions.
730 */
731 int
_bus_dmamem_map(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs,size_t size,void ** kvap,int flags)732 _bus_dmamem_map(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs,
733 size_t size, void **kvap, int flags)
734 {
735 vaddr_t va;
736 bus_addr_t addr;
737 int curseg;
738 const uvm_flag_t kmflags =
739 (flags & BUS_DMA_NOWAIT) != 0 ? UVM_KMF_NOWAIT : 0;
740
741 size = round_page(size);
742
743 va = uvm_km_alloc(kernel_map, size, 0, UVM_KMF_VAONLY | kmflags);
744
745 if (va == 0)
746 return ENOMEM;
747
748 *kvap = (void *)va;
749
750 for (curseg = 0; curseg < nsegs; curseg++) {
751 for (addr = segs[curseg].ds_addr;
752 addr < (segs[curseg].ds_addr + segs[curseg].ds_len);
753 addr += PAGE_SIZE, va += PAGE_SIZE, size -= PAGE_SIZE) {
754 if (size == 0)
755 panic("_bus_dmamem_map: size botch");
756 pmap_enter(pmap_kernel(), va, addr,
757 VM_PROT_READ | VM_PROT_WRITE,
758 VM_PROT_READ | VM_PROT_WRITE | PMAP_WIRED);
759
760 /* Cache-inhibit the page if necessary */
761 if ((flags & BUS_DMA_COHERENT) != 0)
762 _pmap_set_page_cacheinhibit(pmap_kernel(), va);
763
764 segs[curseg]._ds_flags &= ~BUS_DMA_COHERENT;
765 segs[curseg]._ds_flags |= (flags & BUS_DMA_COHERENT);
766 }
767 }
768 pmap_update(pmap_kernel());
769
770 if ((flags & BUS_DMA_COHERENT) != 0)
771 TBIAS();
772
773 return 0;
774 }
775
776 /*
777 * Common function for unmapping DMA-safe memory. May be called by
778 * bus-specific DMA memory unmapping functions.
779 */
780 void
_bus_dmamem_unmap(bus_dma_tag_t t,void * kva,size_t size)781 _bus_dmamem_unmap(bus_dma_tag_t t, void *kva, size_t size)
782 {
783 vaddr_t va;
784 size_t s;
785
786 #ifdef DIAGNOSTIC
787 if ((u_long)kva & PGOFSET)
788 panic("_bus_dmamem_unmap");
789 #endif
790
791 size = round_page(size);
792
793 /*
794 * Re-enable cacheing on the range
795 * XXXSCW: There should be some way to indicate that the pages
796 * were mapped DMA_MAP_COHERENT in the first place...
797 */
798 for (s = 0, va = (vaddr_t)kva; s < size;
799 s += PAGE_SIZE, va += PAGE_SIZE)
800 _pmap_set_page_cacheable(pmap_kernel(), va);
801
802 pmap_remove(pmap_kernel(), (vaddr_t)kva, (vaddr_t)kva + size);
803 pmap_update(pmap_kernel());
804 uvm_km_free(kernel_map, (vaddr_t)kva, size, UVM_KMF_VAONLY);
805 }
806
807 /*
808 * Common function for mmap(2)'ing DMA-safe memory. May be called by
809 * bus-specific DMA mmap(2)'ing functions.
810 */
811 paddr_t
_bus_dmamem_mmap(bus_dma_tag_t t,bus_dma_segment_t * segs,int nsegs,off_t off,int prot,int flags)812 _bus_dmamem_mmap(bus_dma_tag_t t, bus_dma_segment_t *segs, int nsegs, off_t off,
813 int prot, int flags)
814 {
815 int i;
816
817 for (i = 0; i < nsegs; i++) {
818 #ifdef DIAGNOSTIC
819 if (off & PGOFSET)
820 panic("_bus_dmamem_mmap: offset unaligned");
821 if (segs[i].ds_addr & PGOFSET)
822 panic("_bus_dmamem_mmap: segment unaligned");
823 if (segs[i].ds_len & PGOFSET)
824 panic("_bus_dmamem_mmap: segment size not multiple"
825 " of page size");
826 #endif
827 if (off >= segs[i].ds_len) {
828 off -= segs[i].ds_len;
829 continue;
830 }
831
832 /*
833 * XXXSCW: What about BUS_DMA_COHERENT ??
834 */
835
836 return m68k_btop((char *)segs[i].ds_addr + off);
837 }
838
839 /* Page not found. */
840 return -1;
841 }
842