1 /* $NetBSD: mainbus.c,v 1.17 2021/08/07 16:18:56 thorpej Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Christopher G. Demetriou
17 * for the NetBSD Project.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include "opt_pci.h"
34
35 /* #include "obio.h" */
36 #include "pci.h"
37 #include "isa.h"
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/kmem.h>
43
44 #include <machine/autoconf.h>
45 #include <sys/bus.h>
46 #include <machine/isa_machdep.h>
47
48 #include <dev/pci/pcivar.h>
49 #include <dev/pci/pciconf.h>
50
51 int mainbus_match(device_t, cfdata_t, void *);
52 void mainbus_attach(device_t, device_t, void *);
53
54 struct mainbus_softc {
55 device_t sc_dev; /* device tree glue */
56 };
57
58 CFATTACH_DECL_NEW(mainbus, sizeof(struct mainbus_softc),
59 mainbus_match, mainbus_attach, NULL, NULL);
60
61 int mainbus_print(void *, const char *);
62
63 union mainbus_attach_args {
64 const char *mba_busname; /* first elem of all */
65 struct pcibus_attach_args mba_pba;
66 };
67
68 /* There can be only one. */
69 int mainbus_found = 0;
70 struct powerpc_isa_chipset genppc_ict;
71 struct genppc_pci_chipset *genppc_pct;
72
73 #define PCI_IO_START 0x00008000
74 #define PCI_IO_END 0x0000ffff
75 #define PCI_IO_SIZE ((PCI_IO_END - PCI_IO_START) + 1)
76
77 #define PCI_MEM_START 0x00000000
78 #define PCI_MEM_END 0x0fffffff
79 #define PCI_MEM_SIZE ((PCI_MEM_END - PCI_MEM_START) + 1)
80
81 /*
82 * Probe for the mainbus; always succeeds.
83 */
84 int
mainbus_match(device_t parent,cfdata_t match,void * aux)85 mainbus_match(device_t parent, cfdata_t match, void *aux)
86 {
87
88 if (mainbus_found)
89 return 0;
90 return 1;
91 }
92
93 /*
94 * Attach the mainbus.
95 */
96 void
mainbus_attach(device_t parent,device_t self,void * aux)97 mainbus_attach(device_t parent, device_t self, void *aux)
98 {
99 struct mainbus_softc *sc = device_private(self);
100 union mainbus_attach_args mba;
101 struct confargs ca;
102
103 mainbus_found = 1;
104
105 aprint_normal("\n");
106
107 sc->sc_dev = self;
108 ca.ca_name = "cpu";
109 ca.ca_node = 0;
110 config_found(self, &ca, mainbus_print,
111 CFARGS(.iattr = "mainbus"));
112
113 #if NOBIO > 0
114 obio_reserve_resource_map();
115 #endif
116
117 /*
118 * XXX Note also that the presence of a PCI bus should
119 * XXX _always_ be checked, and if present the bus should be
120 * XXX 'found'. However, because of the structure of the code,
121 * XXX that's not currently possible.
122 */
123 #if NPCI > 0
124 genppc_pct = kmem_alloc(sizeof(struct genppc_pci_chipset), KM_SLEEP);
125 ibmnws_pci_get_chipset_tag_indirect (genppc_pct);
126
127 #ifdef PCI_NETBSD_CONFIGURE
128 struct pciconf_resources *pcires = pciconf_resource_init();
129
130 pciconf_resource_add(pcires, PCICONF_RESOURCE_IO,
131 PCI_IO_START, PCI_IO_SIZE);
132 pciconf_resource_add(pcires, PCICONF_RESOURCE_MEM,
133 PCI_MEM_START, PCI_MEM_SIZE);
134
135 pci_configure_bus(genppc_pct, pcires, 0, CACHELINESIZE);
136
137 pciconf_resource_fini(pcires);
138 #endif
139
140 memset(&mba, 0, sizeof(mba));
141 mba.mba_pba.pba_iot = &prep_io_space_tag;
142 mba.mba_pba.pba_memt = &prep_mem_space_tag;
143 mba.mba_pba.pba_dmat = &pci_bus_dma_tag;
144 mba.mba_pba.pba_dmat64 = NULL;
145 mba.mba_pba.pba_pc = genppc_pct;
146 mba.mba_pba.pba_bus = 0;
147 mba.mba_pba.pba_bridgetag = NULL;
148 mba.mba_pba.pba_flags = PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
149 config_found(self, &mba.mba_pba, pcibusprint,
150 CFARGS(.iattr = "pcibus"));
151 #endif
152
153 #if NOBIO > 0
154 #if 0
155 obio_reserve_resource_unmap();
156
157 if (platform->obiodevs != obiodevs_nodev) {
158 memset(&mba, 0, sizeof(mba));
159 mba.mba_busname = "obio"; /* XXX needs placeholder in pba */
160 mba.mba_pba.pba_iot = &isa_io_space_tag;
161 mba.mba_pba.pba_memt = &isa_mem_space_tag;
162 config_found(self, &mba.mba_pba, mainbus_print,
163 CFARGS(.iattr = "mainbus"));
164 }
165 #endif
166 #endif
167 }
168
169 int
mainbus_print(void * aux,const char * pnp)170 mainbus_print(void *aux, const char *pnp)
171 {
172 union mainbus_attach_args *mba = aux;
173
174 if (pnp)
175 aprint_normal("%s at %s", mba->mba_busname, pnp);
176
177 return (UNCONF);
178 }
179