xref: /netbsd-src/sys/arch/ibmnws/ibmnws/machdep.c (revision f36002f244a49908fef9cba8789032bdbf48d572)
1 /*	$NetBSD: machdep.c,v 1.22 2024/03/05 14:15:32 thorpej Exp $	*/
2 
3 /*
4  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
5  * Copyright (C) 1995, 1996 TooLs GmbH.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. All advertising materials mentioning features or use of this software
17  *    must display the following acknowledgement:
18  *	This product includes software developed by TooLs GmbH.
19  * 4. The name of TooLs GmbH may not be used to endorse or promote products
20  *    derived from this software without specific prior written permission.
21  *
22  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
27  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
28  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
29  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
31  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32  */
33 
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: machdep.c,v 1.22 2024/03/05 14:15:32 thorpej Exp $");
36 
37 #include "opt_compat_netbsd.h"
38 
39 #include <sys/param.h>
40 #include <sys/buf.h>
41 #include <sys/bus.h>
42 #include <sys/conf.h>
43 #include <sys/device.h>
44 #include <sys/exec.h>
45 #include <sys/extent.h>
46 #include <sys/intr.h>
47 #include <sys/kernel.h>
48 #include <sys/mbuf.h>
49 #include <sys/mount.h>
50 #include <sys/msgbuf.h>
51 #include <sys/proc.h>
52 #include <sys/reboot.h>
53 #include <sys/syscallargs.h>
54 #include <sys/sysctl.h>
55 #include <sys/syslog.h>
56 #include <sys/systm.h>
57 
58 #include <uvm/uvm_extern.h>
59 
60 #include <machine/autoconf.h>
61 #include <machine/powerpc.h>
62 
63 #include <powerpc/pmap.h>
64 #include <powerpc/trap.h>
65 
66 #include <powerpc/oea/bat.h>
67 #include <powerpc/pic/picvar.h>
68 #include <powerpc/include/pio.h>
69 
70 #include <dev/pci/pcivar.h>
71 #include <dev/ic/ibm82660reg.h>
72 
73 #include <dev/cons.h>
74 
75 void initppc(u_long, u_long, u_int, void *);
76 void dumpsys(void);
77 vaddr_t prep_intr_reg;			/* PReP interrupt vector register */
78 uint32_t prep_intr_reg_off;
79 
80 #define	OFMEMREGIONS	32
81 struct mem_region physmemr[OFMEMREGIONS], availmemr[OFMEMREGIONS];
82 
83 paddr_t avail_end;			/* XXX temporary */
84 struct pic_ops *isa_pic;
85 int isa_pcmciamask = 0x8b28;
86 
87 void
initppc(u_long startkernel,u_long endkernel,u_int args,void * btinfo)88 initppc(u_long startkernel, u_long endkernel, u_int args, void *btinfo)
89 {
90 
91 	uint32_t sa, ea, banks;
92 	u_long memsize = 0;
93 	pcitag_t tag;
94 
95 	/*
96 	 * Set memory region by reading the memory size from the PCI
97 	 * host bridge.
98 	 */
99 
100 	tag = genppc_pci_indirect_make_tag(NULL, 0, 0, 0);
101 
102 	out32rb(PCI_MODE1_ADDRESS_REG, tag | IBM_82660_MEM_BANK0_START);
103 	sa = in32rb(PCI_MODE1_DATA_REG);
104 
105 	out32rb(PCI_MODE1_ADDRESS_REG, tag | IBM_82660_MEM_BANK0_END);
106 	ea = in32rb(PCI_MODE1_DATA_REG);
107 
108 	/* Which memory banks are enabled? */
109 	out32rb(PCI_MODE1_ADDRESS_REG, tag | IBM_82660_MEM_BANK_ENABLE);
110 	banks = in32rb(PCI_MODE1_DATA_REG) & 0xFF;
111 
112 	/* Reset the register for the next call. */
113 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
114 
115 	if (banks & IBM_82660_MEM_BANK0_ENABLED)
116 		memsize += IBM_82660_BANK0_ADDR(ea) - IBM_82660_BANK0_ADDR(sa) + 1;
117 
118 	if (banks & IBM_82660_MEM_BANK1_ENABLED)
119 		memsize += IBM_82660_BANK1_ADDR(ea) - IBM_82660_BANK1_ADDR(sa) + 1;
120 
121 	if (banks & IBM_82660_MEM_BANK2_ENABLED)
122 		memsize += IBM_82660_BANK2_ADDR(ea) - IBM_82660_BANK2_ADDR(sa) + 1;
123 
124 	if (banks & IBM_82660_MEM_BANK3_ENABLED)
125 		memsize += IBM_82660_BANK3_ADDR(ea) - IBM_82660_BANK3_ADDR(sa) + 1;
126 
127 	memsize <<= 20;
128 
129 	physmemr[0].start = 0;
130 	physmemr[0].size = memsize & ~PGOFSET;
131 	availmemr[0].start = (endkernel + PGOFSET) & ~PGOFSET;
132 	availmemr[0].size = memsize - availmemr[0].start;
133 
134 	avail_end = physmemr[0].start + physmemr[0].size;    /* XXX temporary */
135 
136 	/*
137 	 * Set CPU clock
138 	 */
139 	{
140 		extern u_long ticks_per_sec, ns_per_tick;
141 
142 		ticks_per_sec = 16666666;		/* hardcoded */
143 		ns_per_tick = 1000000000 / ticks_per_sec;
144 	}
145 
146 	/*
147 	 * boothowto
148 	 */
149 	boothowto = 0;		/* XXX - should make this an option */
150 
151 	prep_initppc(startkernel, endkernel, args, 0);
152 }
153 
154 /*
155  * Machine dependent startup code.
156  */
157 void
cpu_startup(void)158 cpu_startup(void)
159 {
160 	/*
161 	 * Mapping PReP interrupt vector register.
162 	 */
163 	prep_intr_reg = (vaddr_t) mapiodev(PREP_INTR_REG, PAGE_SIZE, false);
164 	if (!prep_intr_reg)
165 		panic("startup: no room for interrupt register");
166 	prep_intr_reg_off = INTR_VECTOR_REG;
167 
168 	/*
169 	 * Do common startup.
170 	 */
171 	oea_startup("IBM NetworkStation 1000 (8362-XXX)");
172 
173 	pic_init();
174 	isa_pic = setup_prepivr(PIC_IVR_IBM);
175 
176         oea_install_extint(pic_ext_intr);
177 
178 	/*
179 	 * Now allow hardware interrupts.
180 	 */
181 	{
182 		int msr;
183 
184 		splraise(-1);
185 		__asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0"
186 			      : "=r"(msr) : "K"(PSL_EE));
187 	}
188 
189 	/*
190 	 * Now safe for bus space allocation to use malloc.
191 	 */
192 	bus_space_mallocok();
193 }
194 
195 /*
196  * Halt or reboot the machine after syncing/dumping according to howto.
197  */
198 void
cpu_reboot(int howto,char * what)199 cpu_reboot(int howto, char *what)
200 {
201 	static int syncing;
202 
203 	if (cold) {
204 		howto |= RB_HALT;
205 		goto halt_sys;
206 	}
207 
208 	boothowto = howto;
209 	if ((howto & RB_NOSYNC) == 0 && syncing == 0) {
210 		syncing = 1;
211 		vfs_shutdown();		/* sync */
212 	}
213 
214 	/* Disable intr */
215 	splhigh();
216 
217 	/* Do dump if requested */
218 	if ((howto & (RB_DUMP | RB_HALT)) == RB_DUMP)
219 		oea_dumpsys();
220 
221 halt_sys:
222 	doshutdownhooks();
223 
224 	pmf_system_shutdown(boothowto);
225 
226 	if (howto & RB_HALT) {
227                 aprint_normal("\n");
228                 aprint_normal("The operating system has halted.\n");
229                 aprint_normal("Please press any key to reboot.\n\n");
230                 cnpollc(1);	/* for proper keyboard command handling */
231                 cngetc();
232                 cnpollc(0);
233 	}
234 
235 	aprint_normal("rebooting...\n\n");
236 
237 
238         {
239 	    int msr;
240 	    u_char reg;
241 
242 	    __asm volatile("mfmsr %0" : "=r"(msr));
243 	    msr |= PSL_IP;
244 	    __asm volatile("mtmsr %0" :: "r"(msr));
245 
246 	    reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
247 	    reg &= ~1UL;
248 	    *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;
249 
250 	    __asm volatile("sync; eieio" ::: "memory");
251 
252 	    reg = *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92);
253 	    reg |= 1;
254 	    *(volatile u_char *)(PREP_BUS_SPACE_IO + 0x92) = reg;
255 
256 	    __asm volatile("sync; eieio" ::: "memory");
257 	}
258 
259 	for (;;)
260 		continue;
261 	/* NOTREACHED */
262 }
263