xref: /netbsd-src/sys/arch/hpcmips/tx/tx39ir.c (revision 94a7d2532986dd22f4bff322e765b554a1efc886)
1 /*	$NetBSD: tx39ir.c,v 1.11 2023/09/10 20:28:25 andvar Exp $ */
2 
3 /*-
4  * Copyright (c) 2000 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by UCHIYAMA Yasushi.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /*
33  * TX39 IR module (connected to UARTB)
34  */
35 
36 #include <sys/cdefs.h>
37 __KERNEL_RCSID(0, "$NetBSD: tx39ir.c,v 1.11 2023/09/10 20:28:25 andvar Exp $");
38 
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 
43 #include <machine/bus.h>
44 #include <machine/intr.h>
45 
46 #include <hpcmips/tx/tx39var.h>
47 #include <hpcmips/tx/tx39icureg.h>
48 #include <hpcmips/tx/tx39irvar.h>
49 #include <hpcmips/tx/tx39irreg.h>
50 
51 #include <hpcmips/tx/tx39clockreg.h> /* XXX */
52 
53 #ifdef TX39IRDEBUG
54 #define DPRINTF_ENABLE
55 #define DPRINTF_DEBUG	tx39ir_debug
56 #endif
57 #include <machine/debug.h>
58 
59 int	tx39ir_match(device_t, cfdata_t, void *);
60 void	tx39ir_attach(device_t, device_t, void *);
61 
62 struct tx39ir_softc {
63 	device_t sc_parent;
64 	tx_chipset_tag_t sc_tc;
65 };
66 
67 #ifdef TX39IRDEBUG
68 static void	tx39ir_dump(struct tx39ir_softc *);
69 #endif
70 #if not_required_yet
71 static int	tx39ir_intr(void *);
72 #endif
73 
74 CFATTACH_DECL_NEW(tx39ir, sizeof(struct tx39ir_softc),
75     tx39ir_match, tx39ir_attach, NULL, NULL);
76 
77 int
tx39ir_match(device_t parent,cfdata_t cf,void * aux)78 tx39ir_match(device_t parent, cfdata_t cf, void *aux)
79 {
80 	return (ATTACH_NORMAL);
81 }
82 
83 void
tx39ir_attach(device_t parent,device_t self,void * aux)84 tx39ir_attach(device_t parent, device_t self, void *aux)
85 {
86 	struct txcom_attach_args *tca = aux;
87 	struct tx39ir_softc *sc = device_private(self);
88 	tx_chipset_tag_t tc;
89 	txreg_t reg;
90 
91 	sc->sc_tc = tc = tca->tca_tc;
92 	sc->sc_parent = tca->tca_parent;
93 
94 	printf("\n");
95 
96 	/* setup IR module */
97 	reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
98 	reg |= TX39_IRCTRL1_RXPWR;
99 	tx_conf_write(tc, TX39_IRCTRL1_REG, reg);
100 
101 	/* power up IR module */
102 	reg = tx_conf_read(tc, TX39_CLOCKCTRL_REG);
103 	reg |= TX39_CLOCK_ENIRCLK | TX39_CLOCK_ENUARTBCLK;
104 	tx_conf_write(tc, TX39_CLOCKCTRL_REG, reg);
105 
106 	/* turn to pulse mode UARTB */
107 	txcom_pulse_mode(sc->sc_parent);
108 
109 #if not_required_yet
110 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_CARSTINT),
111 	    IST_EDGE, IPL_TTY, tx39ir_intr, sc);
112 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_POSCARINT),
113 	    IST_EDGE, IPL_TTY, tx39ir_intr, sc);
114 	tx_intr_establish(tc, MAKEINTR(5, TX39_INTRSTATUS5_NEGCARINT),
115 	    IST_EDGE, IPL_TTY, tx39ir_intr, sc);
116 #endif
117 
118 #ifdef TX39IRDEBUG
119 	tx39ir_dump(sc);
120 #endif
121 }
122 
123 #ifdef TX39IRDEBUG
124 void
tx39ir_dump(struct tx39ir_softc * sc)125 tx39ir_dump(struct tx39ir_softc *sc)
126 {
127 	tx_chipset_tag_t tc = sc->sc_tc;
128 	txreg_t reg;
129 
130 	reg = tx_conf_read(tc, TX39_IRCTRL1_REG);
131 #define ISSETPRINT(r, m) dbg_bitmask_print((u_int32_t)(r),			\
132 	TX39_IRCTRL1_##m, #m)
133 	ISSETPRINT(reg, CARDET);
134 	ISSETPRINT(reg, TESTIR);
135 	ISSETPRINT(reg, DTINVERT);
136 	ISSETPRINT(reg, RXPWR);
137 	ISSETPRINT(reg, ENSTATE);
138 	ISSETPRINT(reg, ENCOMSM);
139 #undef	ISSETPRINT
140 	printf("baudval %d\n", TX39_IRCTRL1_BAUDVAL(reg));
141 }
142 #endif
143 
144 #if not_required_yet
145 int
tx39ir_intr(void * arg)146 tx39ir_intr(void *arg)
147 {
148 	return (0);
149 }
150 #endif
151