1 /* $NetBSD: tx39biu.c,v 1.18 2023/09/10 20:41:57 andvar Exp $ */
2
3 /*-
4 * Copyright (c) 1999-2002 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by UCHIYAMA Yasushi.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: tx39biu.c,v 1.18 2023/09/10 20:41:57 andvar Exp $");
34
35 #include "opt_tx39_watchdogtimer.h"
36 #include "opt_tx39biu_debug.h"
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41
42 #include <machine/bus.h>
43 #include <machine/debug.h>
44
45 #include <hpcmips/tx/tx39var.h>
46 #include <hpcmips/tx/tx39biureg.h>
47 #include <hpcmips/tx/txcsbusvar.h>
48
49 #ifdef TX39BIU_DEBUG
50 #define DPRINTF_ENABLE
51 #define DPRINTF_DEBUG tx39biu_debug
52 #endif
53
54 #define ISSETPRINT(r, s, m) dbg_bitmask_print((u_int32_t)(r), \
55 TX39_MEMCONFIG ## s ## _ ##m, #m)
56
57 int tx39biu_match(device_t, cfdata_t, void *);
58 void tx39biu_attach(device_t, device_t, void *);
59 void tx39biu_callback(device_t);
60 int tx39biu_print(void *, const char *);
61 int tx39biu_intr(void *);
62
63 static void *__sc; /* XXX */
64 #ifdef TX39BIU_DEBUG
65 void tx39biu_dump(tx_chipset_tag_t);
66 #endif
67
68 struct tx39biu_softc {
69 tx_chipset_tag_t sc_tc;
70 };
71
72 CFATTACH_DECL_NEW(tx39biu, sizeof(struct tx39biu_softc),
73 tx39biu_match, tx39biu_attach, NULL, NULL);
74
75 int
tx39biu_match(device_t parent,cfdata_t cf,void * aux)76 tx39biu_match(device_t parent, cfdata_t cf, void *aux)
77 {
78 return (ATTACH_NORMAL);
79 }
80
81 void
tx39biu_attach(device_t parent,device_t self,void * aux)82 tx39biu_attach(device_t parent, device_t self, void *aux)
83 {
84 struct txsim_attach_args *ta = aux;
85 struct tx39biu_softc *sc = device_private(self);
86 tx_chipset_tag_t tc;
87 #ifdef TX39_WATCHDOGTIMER
88 txreg_t reg;
89 #endif
90
91 sc->sc_tc = tc = ta->ta_tc;
92 printf("\n");
93 #ifdef TX39BIU_DEBUG
94 tx39biu_dump(tc);
95 #endif
96
97 #ifdef TX39_WATCHDOGTIMER
98 /*
99 * CLRWRBUSERRINT Bus error connected CPU HwInt0
100 */
101 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
102 reg |= TX39_MEMCONFIG4_ENWATCH;
103 reg = TX39_MEMCONFIG4_WATCHTIMEVAL_SET(reg, 0xf);
104 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
105
106 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
107 if (reg & TX39_MEMCONFIG4_ENWATCH) {
108 int i;
109 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg);
110 i = (1000 * (i + 1) * 64) / 36864;
111 printf("WatchDogTimerRate: %dus\n", i);
112 }
113 #endif
114 __sc = sc;
115
116 /* Clear watch dog timer interrupt */
117 tx39biu_intr(sc);
118
119 /*
120 * Chip select virtual bridge
121 */
122 config_defer(self, tx39biu_callback);
123 }
124
125 void
tx39biu_callback(device_t self)126 tx39biu_callback(device_t self)
127 {
128 struct tx39biu_softc *sc = device_private(self);
129 struct csbus_attach_args cba;
130
131 cba.cba_busname = "txcsbus";
132 cba.cba_tc = sc->sc_tc;
133 config_found(self, &cba, tx39biu_print, CFARGS_NONE);
134 }
135
136 int
tx39biu_print(void * aux,const char * pnp)137 tx39biu_print(void *aux, const char *pnp)
138 {
139 return (pnp ? QUIET : UNCONF);
140 }
141
142 int
tx39biu_intr(void * arg)143 tx39biu_intr(void *arg)
144 {
145 struct tx39biu_softc *sc = __sc;
146 tx_chipset_tag_t tc;
147 txreg_t reg;
148
149 if (!sc) {
150 return (0);
151 }
152 tc = sc->sc_tc;
153 /* Clear interrupt */
154 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
155 reg |= TX39_MEMCONFIG4_CLRWRBUSERRINT;
156 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
157 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
158 reg &= ~TX39_MEMCONFIG4_CLRWRBUSERRINT;
159 tx_conf_write(tc, TX39_MEMCONFIG4_REG, reg);
160
161 return (0);
162 }
163
164 #ifdef TX39BIU_DEBUG
165 void
tx39biu_dump(tx_chipset_tag_t tc)166 tx39biu_dump(tx_chipset_tag_t tc)
167 {
168 const char *rowsel[] = {"18,17:9", "22,18,20,19,17:9", "20,22,21,19,17:9",
169 "22,23,21,19,17:9"};
170 const char *colsel[] = {"22,20,18,8:1", "19,18,8:2", "21,20,18,8:2",
171 "23,22,20,18,8:2", "24,22,20,18,8:2",
172 "18,p,X,8:0","22,p,X,21,8:0", "18,p,X,21,8:1",
173 "22,p,X,23,21,8:1", "24,23,21,8:2"};
174 txreg_t reg;
175 int i;
176 /*
177 * Memory config 0 register
178 */
179 reg = tx_conf_read(tc, TX39_MEMCONFIG0_REG);
180 printf(" config0:");
181 ISSETPRINT(reg, 0, ENDCLKOUTTRI);
182 ISSETPRINT(reg, 0, DISDQMINIT);
183 ISSETPRINT(reg, 0, ENSDRAMPD);
184 ISSETPRINT(reg, 0, SHOWDINO);
185 ISSETPRINT(reg, 0, ENRMAP2);
186 ISSETPRINT(reg, 0, ENRMAP1);
187 ISSETPRINT(reg, 0, ENWRINPAGE);
188 ISSETPRINT(reg, 0, ENCS3USER);
189 ISSETPRINT(reg, 0, ENCS2USER);
190 ISSETPRINT(reg, 0, ENCS1USER);
191 ISSETPRINT(reg, 0, ENCS1DRAM);
192 ISSETPRINT(reg, 0, CS3SIZE);
193 ISSETPRINT(reg, 0, CS2SIZE);
194 ISSETPRINT(reg, 0, CS1SIZE);
195 ISSETPRINT(reg, 0, CS0SIZE);
196 printf("\n");
197 for (i = 0; i < 2; i++) {
198 int r, c;
199 printf(" BANK%d: ", i);
200 switch (i ? TX39_MEMCONFIG0_BANK1CONF(reg)
201 : TX39_MEMCONFIG0_BANK0CONF(reg)) {
202 case TX39_MEMCONFIG0_BANKCONF_16BITSDRAM:
203 printf("16bit SDRAM");
204 break;
205 case TX39_MEMCONFIG0_BANKCONF_8BITSDRAM:
206 printf("8bit SDRAM");
207 break;
208 case TX39_MEMCONFIG0_BANKCONF_32BITSDHDRAM:
209 printf("32bit DRAM/HDRAM");
210 break;
211 case TX39_MEMCONFIG0_BANKCONF_16BITSDHDRAM:
212 printf("16bit DRAM/HDRAM");
213 break;
214 }
215 if (i == 1) {
216 r = TX39_MEMCONFIG0_ROWSEL1(reg);
217 c = TX39_MEMCONFIG0_COLSEL1(reg);
218 } else {
219 r = TX39_MEMCONFIG0_ROWSEL0(reg);
220 c = TX39_MEMCONFIG0_COLSEL0(reg);
221 }
222 printf(" ROW %s COL %s\n", rowsel[r], colsel[c]);
223 }
224
225 /*
226 * Memory config 3 register
227 */
228 printf(" config3:");
229 reg = tx_conf_read(tc, TX39_MEMCONFIG3_REG);
230 #ifdef TX391X
231 ISSETPRINT(reg, 3, ENMCS3PAGE);
232 ISSETPRINT(reg, 3, ENMCS2PAGE);
233 ISSETPRINT(reg, 3, ENMCS1PAGE);
234 ISSETPRINT(reg, 3, ENMCS0PAGE);
235 #endif /* TX391X */
236 ISSETPRINT(reg, 3, ENCS3PAGE);
237 ISSETPRINT(reg, 3, ENCS2PAGE);
238 ISSETPRINT(reg, 3, ENCS1PAGE);
239 ISSETPRINT(reg, 3, ENCS0PAGE);
240 ISSETPRINT(reg, 3, CARD2WAITEN);
241 ISSETPRINT(reg, 3, CARD1WAITEN);
242 ISSETPRINT(reg, 3, CARD2IOEN);
243 ISSETPRINT(reg, 3, CARD1IOEN);
244 #ifdef TX391X
245 ISSETPRINT(reg, 3, PORT8SEL);
246 #endif /* TX391X */
247 #ifdef TX392X
248 ISSETPRINT(reg, 3, CARD2_8SEL);
249 ISSETPRINT(reg, 3, CARD1_8SEL);
250 #endif /* TX392X */
251
252 printf("\n");
253
254 /*
255 * Memory config 4 register
256 */
257 reg = tx_conf_read(tc, TX39_MEMCONFIG4_REG);
258 printf(" config4:");
259 ISSETPRINT(reg, 4, ENBANK1HDRAM);
260 ISSETPRINT(reg, 4, ENBANK0HDRAM);
261 ISSETPRINT(reg, 4, ENARB);
262 ISSETPRINT(reg, 4, DISSNOOP);
263 ISSETPRINT(reg, 4, CLRWRBUSERRINT);
264 ISSETPRINT(reg, 4, ENBANK1OPT);
265 ISSETPRINT(reg, 4, ENBANK0OPT);
266 ISSETPRINT(reg, 4, ENWATCH);
267 ISSETPRINT(reg, 4, MEMPOWERDOWN);
268 ISSETPRINT(reg, 4, ENRFSH1);
269 ISSETPRINT(reg, 4, ENRFSH0);
270 if (reg & TX39_MEMCONFIG4_ENWATCH) {
271 i = TX39_MEMCONFIG4_WATCHTIMEVAL(reg);
272 i = (1000 * (i + 1) * 64) / 36864;
273 printf("WatchDogTimerRate: %dus", i);
274 }
275 printf("\n");
276 }
277 #endif /* TX39BIU_DEBUG */
278