xref: /netbsd-src/sys/arch/arm/xscale/ixp425_a4x_space.c (revision 509197b672d5cd748873877ad33419fadde87740)
1 /*	$NetBSD: ixp425_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $	*/
2 
3 /*
4  * Copyright 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Bus space tag for 8/16-bit devices on 32-bit bus.
40  * all registers are located at the address of multiple of 4.
41  *
42  * Based on pxa2x0_a4x_space.c
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: ixp425_a4x_space.c,v 1.4 2018/03/16 17:56:32 ryo Exp $");
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 
51 #include <uvm/uvm_extern.h>
52 
53 #include <sys/bus.h>
54 
55 /* Prototypes for all the bus_space structure functions */
56 bs_protos(ixp425);
57 bs_protos(a4x);
58 bs_protos(generic);
59 bs_protos(generic_armv4);
60 bs_protos(bs_notimpl);
61 
62 struct bus_space ixp425_a4x_bs_tag = {
63 	/* cookie */
64 	.bs_cookie = (void *) 0,
65 
66 	/* mapping/unmapping */
67 	.bs_map = ixp425_bs_map,
68 	.bs_unmap = ixp425_bs_unmap,
69 	.bs_subregion = ixp425_bs_subregion,
70 
71 	/* allocation/deallocation */
72 	.bs_alloc = ixp425_bs_alloc,	/* not implemented */
73 	.bs_free = ixp425_bs_free,	/* not implemented */
74 
75 	/* get kernel virtual address */
76 	.bs_vaddr = ixp425_bs_vaddr,
77 
78 	/* mmap */
79 	.bs_mmap = bs_notimpl_bs_mmap,
80 
81 	/* barrier */
82 	.bs_barrier = ixp425_bs_barrier,
83 
84 	/* read (single) */
85 	.bs_r_1 = a4x_bs_r_1,
86 	.bs_r_2 = a4x_bs_r_2,
87 	.bs_r_4 = a4x_bs_r_4,
88 	.bs_r_8 = bs_notimpl_bs_r_8,
89 
90 	/* read multiple */
91 	.bs_rm_1 = a4x_bs_rm_1,
92 	.bs_rm_2 = a4x_bs_rm_2,
93 	.bs_rm_4 = bs_notimpl_bs_rm_4,
94 	.bs_rm_8 = bs_notimpl_bs_rm_8,
95 
96 	/* read region */
97 	.bs_rr_1 = bs_notimpl_bs_rr_1,
98 	.bs_rr_2 = bs_notimpl_bs_rr_2,
99 	.bs_rr_4 = bs_notimpl_bs_rr_4,
100 	.bs_rr_8 = bs_notimpl_bs_rr_8,
101 
102 	/* write (single) */
103 	.bs_w_1 = a4x_bs_w_1,
104 	.bs_w_2 = a4x_bs_w_2,
105 	.bs_w_4 = a4x_bs_w_4,
106 	.bs_w_8 = bs_notimpl_bs_w_8,
107 
108 	/* write multiple */
109 	.bs_wm_1 = a4x_bs_wm_1,
110 	.bs_wm_2 = a4x_bs_wm_2,
111 	.bs_wm_4 = bs_notimpl_bs_wm_4,
112 	.bs_wm_8 = bs_notimpl_bs_wm_8,
113 
114 	/* write region */
115 	.bs_wr_1 = bs_notimpl_bs_wr_1,
116 	.bs_wr_2 = bs_notimpl_bs_wr_2,
117 	.bs_wr_4 = bs_notimpl_bs_wr_4,
118 	.bs_wr_8 = bs_notimpl_bs_wr_8,
119 
120 	/* set multiple */
121 	.bs_sm_1 = bs_notimpl_bs_sm_1,
122 	.bs_sm_2 = bs_notimpl_bs_sm_2,
123 	.bs_sm_4 = bs_notimpl_bs_sm_4,
124 	.bs_sm_8 = bs_notimpl_bs_sm_8,
125 
126 	/* set region */
127 	.bs_sr_1 = bs_notimpl_bs_sr_1,
128 	.bs_sr_2 = bs_notimpl_bs_sr_2,
129 	.bs_sr_4 = bs_notimpl_bs_sr_4,
130 	.bs_sr_8 = bs_notimpl_bs_sr_8,
131 
132 	/* copy */
133 	.bs_c_1 = bs_notimpl_bs_c_1,
134 	.bs_c_2 = bs_notimpl_bs_c_2,
135 	.bs_c_4 = bs_notimpl_bs_c_4,
136 	.bs_c_8 = bs_notimpl_bs_c_8,
137 };
138