1 /* $NetBSD: sunxi_de2_ccu.c,v 1.8 2022/06/28 05:19:03 skrll Exp $ */
2
3 /*-
4 * Copyright (c) 2019 Jared McNeill <jmcneill@invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30
31 __KERNEL_RCSID(1, "$NetBSD: sunxi_de2_ccu.c,v 1.8 2022/06/28 05:19:03 skrll Exp $");
32
33 #include <sys/param.h>
34 #include <sys/bus.h>
35 #include <sys/device.h>
36 #include <sys/systm.h>
37
38 #include <dev/fdt/fdtvar.h>
39
40 #include <arm/sunxi/sunxi_ccu.h>
41 #include <arm/sunxi/sunxi_de2_ccu.h>
42
43 static int sunxi_de2_ccu_match(device_t, cfdata_t, void *);
44 static void sunxi_de2_ccu_attach(device_t, device_t, void *);
45
46 CFATTACH_DECL_NEW(sunxi_de2ccu, sizeof(struct sunxi_ccu_softc),
47 sunxi_de2_ccu_match, sunxi_de2_ccu_attach, NULL, NULL);
48
49 static struct sunxi_ccu_reset sun8i_h3_de2_ccu_resets[] = {
50 SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
51 SUNXI_CCU_RESET(DE2_RST_WB, 0x08, 2),
52 };
53
54 static struct sunxi_ccu_reset sun50i_a64_de2_ccu_resets[] = {
55 SUNXI_CCU_RESET(DE2_RST_MIXER0, 0x08, 0),
56 SUNXI_CCU_RESET(DE2_RST_MIXER1, 0x08, 1),
57 SUNXI_CCU_RESET(DE2_RST_WB, 0x08, 2),
58 };
59
60 static const char *mod_parents[] = { "mod" };
61
62 static struct sunxi_ccu_clk sun8i_h3_de2_ccu_clks[] = {
63 SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER0, "bus-mixer0", "bus", 0x04, 0),
64 SUNXI_CCU_GATE(DE2_CLK_BUS_MIXER1, "bus-mixer1", "bus", 0x04, 1),
65 SUNXI_CCU_GATE(DE2_CLK_BUS_WB, "bus-wb", "bus", 0x04, 2),
66
67 SUNXI_CCU_DIV(DE2_CLK_MIXER0_DIV, "mixer0-div", mod_parents,
68 0x0c, __BITS(3,0), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
69 SUNXI_CCU_DIV(DE2_CLK_MIXER1_DIV, "mixer1-div", mod_parents,
70 0x0c, __BITS(7,4), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
71 SUNXI_CCU_DIV(DE2_CLK_WB_DIV, "wb-div", mod_parents,
72 0x0c, __BITS(11,8), 0, SUNXI_CCU_DIV_SET_RATE_PARENT),
73
74 SUNXI_CCU_GATE(DE2_CLK_MIXER0, "mixer0", "mixer0-div", 0x00, 0),
75 SUNXI_CCU_GATE(DE2_CLK_MIXER1, "mixer1", "mixer1-div", 0x00, 1),
76 SUNXI_CCU_GATE(DE2_CLK_WB, "wb", "wb-div", 0x00, 2),
77 };
78
79 struct sunxi_de2_ccu_config {
80 struct sunxi_ccu_reset *resets;
81 u_int nresets;
82 struct sunxi_ccu_clk *clks;
83 u_int nclks;
84 };
85
86 static const struct sunxi_de2_ccu_config sun8i_h3_de2_config = {
87 .resets = sun8i_h3_de2_ccu_resets,
88 .nresets = __arraycount(sun8i_h3_de2_ccu_resets),
89 .clks = sun8i_h3_de2_ccu_clks,
90 .nclks = __arraycount(sun8i_h3_de2_ccu_clks),
91 };
92
93 static const struct sunxi_de2_ccu_config sun50i_a64_de2_config = {
94 .resets = sun50i_a64_de2_ccu_resets,
95 .nresets = __arraycount(sun50i_a64_de2_ccu_resets),
96 .clks = sun8i_h3_de2_ccu_clks,
97 .nclks = __arraycount(sun8i_h3_de2_ccu_clks),
98 };
99
100 static const struct device_compatible_entry compat_data[] = {
101 { .compat = "allwinner,sun8i-h3-de2-clk",
102 .data = &sun8i_h3_de2_config },
103 { .compat = "allwinner,sun8i-v3s-de2-clk",
104 .data = &sun8i_h3_de2_config },
105 { .compat = "allwinner,sun50i-a64-de2-clk",
106 .data = &sun50i_a64_de2_config },
107 { .compat = "allwinner,sun50i-h5-de2-clk",
108 .data = &sun50i_a64_de2_config },
109
110 DEVICE_COMPAT_EOL
111 };
112
113 static int
sunxi_de2_ccu_match(device_t parent,cfdata_t cf,void * aux)114 sunxi_de2_ccu_match(device_t parent, cfdata_t cf, void *aux)
115 {
116 struct fdt_attach_args * const faa = aux;
117
118 return of_compatible_match(faa->faa_phandle, compat_data);
119 }
120
121 static void
sunxi_de2_ccu_attach(device_t parent,device_t self,void * aux)122 sunxi_de2_ccu_attach(device_t parent, device_t self, void *aux)
123 {
124 struct sunxi_ccu_softc * const sc = device_private(self);
125 struct fdt_attach_args * const faa = aux;
126 const int phandle = faa->faa_phandle;
127 const struct sunxi_de2_ccu_config *conf;
128 struct clk *clk_bus, *clk_mod;
129 struct fdtbus_reset *rst;
130
131 sc->sc_dev = self;
132 sc->sc_phandle = phandle;
133 sc->sc_bst = faa->faa_bst;
134
135 conf = of_compatible_lookup(phandle, compat_data)->data;
136
137 sc->sc_resets = conf->resets;
138 sc->sc_nresets = conf->nresets;
139 sc->sc_clks = conf->clks;
140 sc->sc_nclks = conf->nclks;
141
142 clk_bus = fdtbus_clock_get(phandle, "bus");
143 if (clk_bus == NULL || clk_enable(clk_bus) != 0) {
144 aprint_error(": couldn't enable bus clock\n");
145 return;
146 }
147 clk_mod = fdtbus_clock_get(phandle, "mod");
148 if (clk_mod == NULL || clk_enable(clk_mod) != 0) {
149 aprint_error(": couldn't enable mod clock\n");
150 return;
151 }
152 rst = fdtbus_reset_get_index(phandle, 0);
153 if (rst == NULL || fdtbus_reset_deassert(rst) != 0) {
154 aprint_error(": couldn't de-assert reset\n");
155 return;
156 }
157
158 if (sunxi_ccu_attach(sc) != 0)
159 return;
160
161 aprint_naive("\n");
162 aprint_normal(": DE2 CCU\n");
163
164 sunxi_ccu_print(sc);
165 }
166