1 /* $Id: at91twi.c,v 1.10 2021/08/07 16:18:43 thorpej Exp $ */
2 /* $NetBSD: at91twi.c,v 1.10 2021/08/07 16:18:43 thorpej Exp $ */
3
4 /*-
5 * Copyright (c) 2007 Embedtronics Oy. All rights reserved.
6 *
7 * Based on arch/macppc/dev/ki2c.c,
8 * Copyright (c) 2001 Tsubai Masanari. All rights reserved.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
30 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: at91twi.c,v 1.10 2021/08/07 16:18:43 thorpej Exp $");
35
36 #include <sys/param.h>
37 #include <sys/device.h>
38 #include <sys/systm.h>
39
40 #include <sys/bus.h>
41 #include <sys/lock.h>
42
43 #include <arm/at91/at91var.h>
44 #include <arm/at91/at91reg.h>
45
46 #include <dev/i2c/i2cvar.h>
47 #include <arm/at91/at91twivar.h>
48 #include <arm/at91/at91twireg.h>
49
50 int at91twi_match(device_t, cfdata_t, void *);
51 void at91twi_attach(device_t, device_t, void *);
52 inline u_int at91twi_readreg(struct at91twi_softc *, int);
53 inline void at91twi_writereg(struct at91twi_softc *, int, u_int);
54 int at91twi_intr(void *);
55 int at91twi_poll(struct at91twi_softc *, int, int);
56 int at91twi_start(struct at91twi_softc *, int, void *, int, int);
57 int at91twi_read(struct at91twi_softc *, int, void *, int, int);
58 int at91twi_write(struct at91twi_softc *, int, void *, int, int);
59
60 /* I2C glue */
61 static int at91twi_i2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
62 void *, size_t, int);
63
64
65 CFATTACH_DECL_NEW(at91twi, sizeof(struct at91twi_softc),
66 at91twi_match, at91twi_attach, NULL, NULL);
67
68 int
at91twi_match(device_t parent,cfdata_t match,void * aux)69 at91twi_match(device_t parent, cfdata_t match, void *aux)
70 {
71 if (strcmp(match->cf_name, "at91twi") == 0)
72 return 2;
73 return 0;
74 }
75
76 void
at91twi_attach(device_t parent,device_t self,void * aux)77 at91twi_attach(device_t parent, device_t self, void *aux)
78 {
79 struct at91twi_softc *sc = device_private(self);
80 struct at91bus_attach_args *sa = aux;
81 struct i2cbus_attach_args iba;
82 unsigned ckdiv, cxdiv;
83
84 // gather attach data:
85 sc->sc_dev = self;
86 sc->sc_iot = sa->sa_iot;
87 sc->sc_pid = sa->sa_pid;
88
89 if (bus_space_map(sa->sa_iot, sa->sa_addr, sa->sa_size, 0, &sc->sc_ioh))
90 panic("%s: Cannot map registers", device_xname(self));
91
92 printf(": I2C controller\n");
93
94 /* initialize I2C controller */
95 at91_peripheral_clock(sc->sc_pid, 1);
96
97 at91twi_writereg(sc, TWI_CR, TWI_CR_SWRST);
98 delay(1000);
99 #if 1
100 // target to 100 kHz
101 for (ckdiv = 0; ckdiv < 8; ckdiv++) {
102 if ((cxdiv = (AT91_MSTCLK / (1U << ckdiv)) / (2 * 50000U)) < 256) {
103 goto found_ckdiv;
104 }
105 }
106 panic("%s: Cannot calculate clock divider!", __FUNCTION__);
107
108 found_ckdiv:
109 #else
110 ckdiv = 5; cxdiv = 0xFF;
111 #endif
112 at91twi_writereg(sc, TWI_CWGR, (ckdiv << 16) | (cxdiv << 8) | cxdiv);
113 at91twi_writereg(sc, TWI_CR, TWI_CR_MSEN);
114
115 //#ifdef AT91TWI_DEBUG
116 printf("%s: ckdiv=%d cxdiv=%d CWGR=0x%08X SR=0x%08X\n", device_xname(self), ckdiv, cxdiv, at91twi_readreg(sc, TWI_CWGR), at91twi_readreg(sc, TWI_SR));
117 //#endif
118
119 /* initialize rest */
120 sc->sc_ih = at91_intr_establish(sc->sc_pid, IPL_SERIAL, INTR_HIGH_LEVEL,
121 at91twi_intr, sc);
122
123 /* fill in the i2c tag */
124 iic_tag_init(&sc->sc_i2c);
125 sc->sc_i2c.ic_cookie = sc;
126 sc->sc_i2c.ic_exec = at91twi_i2c_exec;
127
128 memset(&iba, 0, sizeof(iba));
129 iba.iba_tag = &sc->sc_i2c;
130 config_found(sc->sc_dev, &iba, iicbus_print, CFARGS_NONE);
131 }
132
133 u_int
at91twi_readreg(struct at91twi_softc * sc,int reg)134 at91twi_readreg(struct at91twi_softc *sc, int reg)
135 {
136 return bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg);
137 }
138
139 void
at91twi_writereg(struct at91twi_softc * sc,int reg,u_int val)140 at91twi_writereg(struct at91twi_softc *sc, int reg, u_int val)
141 {
142 bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
143 }
144
145 int
at91twi_intr(void * arg)146 at91twi_intr(void *arg)
147 {
148 struct at91twi_softc *sc = arg;
149 u_int sr, isr, imr;
150
151 sr = at91twi_readreg(sc, TWI_SR);
152 imr = at91twi_readreg(sc, TWI_IMR);
153 isr = sr & imr;
154
155 if (!isr) {
156 #ifdef AT91TWI_DEBUG
157 // printf("%s(%s): interrupts are disabled (sr=%08X imr=%08X)\n", __FUNCTION__, device_xname(sc->sc_dev), sr, imr);
158 #endif
159 return 0;
160 }
161
162 if (isr & TWI_SR_TXCOMP) {
163 // transmission has completed!
164 if (sr & (TWI_SR_NACK | TWI_SR_UNRE | TWI_SR_OVRE)) {
165 // failed!
166 #ifdef AT91TWI_DEBUG
167 printf("%s(%s): FAILED (sr=%08X)\n", __FUNCTION__,
168 device_xname(sc->sc_dev), sr);
169 #endif
170 sc->sc_flags |= I2C_ERROR;
171 } else {
172 #ifdef AT91TWI_DEBUG
173 printf("%s(%s): SUCCESS (sr=%08X)\n", __FUNCTION__,
174 device_xname(sc->sc_dev), sr);
175 #endif
176 }
177 if (sc->sc_flags & I2C_READING && sr & TWI_SR_RXRDY) {
178 *sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
179 sc->sc_resid--;
180 }
181 sc->sc_flags &= ~I2C_BUSY;
182 at91twi_writereg(sc, TWI_IDR, -1);
183 goto out;
184 }
185
186 if (isr & TWI_SR_TXRDY) {
187 if (--sc->sc_resid > 0)
188 at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
189 }
190
191 if (isr & TWI_SR_RXRDY) {
192 // data has been received
193 *sc->sc_data++ = at91twi_readreg(sc, TWI_RHR);
194 sc->sc_resid--;
195 }
196
197 if (isr & (TWI_SR_TXRDY | TWI_SR_RXRDY) && sc->sc_resid <= 0) {
198 // all bytes have been transmitted, send stop condition
199 at91twi_writereg(sc, TWI_IDR, TWI_SR_RXRDY | TWI_SR_TXRDY);
200 at91twi_writereg(sc, TWI_CR, TWI_CR_STOP);
201 }
202 out:
203 return 1;
204 }
205
206 int
at91twi_poll(struct at91twi_softc * sc,int timo,int flags)207 at91twi_poll(struct at91twi_softc *sc, int timo, int flags)
208 {
209
210 timo = 1000000U;
211
212 while (sc->sc_flags & I2C_BUSY) {
213 if (timo < 0) {
214 printf("i2c_poll: timeout\n");
215 return -1;
216 }
217 if (flags & I2C_F_POLL) {
218 at91_intr_poll(sc->sc_ih, 1);
219 delay(1);
220 timo--;
221 } else {
222 delay(100); // @@@ sleep!?
223 timo -= 100;
224 }
225 }
226 return 0;
227 }
228
229 int
at91twi_start(struct at91twi_softc * sc,int addr,void * data,int len,int flags)230 at91twi_start(struct at91twi_softc *sc, int addr, void *data, int len,
231 int flags)
232 {
233 int rd = (sc->sc_flags & I2C_READING);
234 int timo, s;
235
236 KASSERT((addr & 1) == 0);
237
238 sc->sc_data = data;
239 sc->sc_resid = len;
240 sc->sc_flags |= I2C_BUSY;
241
242 timo = 1000 + len * 200;
243
244 s = splserial();
245 // if writing, queue first byte immediately
246 if (!rd)
247 at91twi_writereg(sc, TWI_THR, *sc->sc_data++);
248 // if there's just one byte to transmit, we must set STOP-bit too
249 if (sc->sc_resid == 1) {
250 at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP);
251 at91twi_writereg(sc, TWI_CR, TWI_CR_START | TWI_CR_STOP);
252 } else {
253 at91twi_writereg(sc, TWI_IER, TWI_SR_TXCOMP
254 | (rd ? TWI_SR_RXRDY : TWI_SR_TXRDY));
255 at91twi_writereg(sc, TWI_CR, TWI_CR_START);
256 }
257 splx(s);
258
259 if (at91twi_poll(sc, timo, flags))
260 return -1;
261 if (sc->sc_flags & I2C_ERROR) {
262 printf("I2C_ERROR\n");
263 return -1;
264 }
265 return 0;
266 }
267
268 int
at91twi_read(struct at91twi_softc * sc,int addr,void * data,int len,int flags)269 at91twi_read(struct at91twi_softc *sc, int addr, void *data, int len, int flags)
270 {
271 sc->sc_flags = I2C_READING;
272 #ifdef AT91TWI_DEBUG
273 printf("at91twi_read: %02x %d\n", addr, len);
274 #endif
275 return at91twi_start(sc, addr, data, len, flags);
276 }
277
278 int
at91twi_write(struct at91twi_softc * sc,int addr,void * data,int len,int flags)279 at91twi_write(struct at91twi_softc *sc, int addr, void *data, int len, int flags)
280 {
281 sc->sc_flags = 0;
282 #ifdef AT91TWI_DEBUG
283 printf("at91twi_write: %02x %d\n", addr, len);
284 #endif
285 return at91twi_start(sc, addr, data, len, flags);
286 }
287
288 int
at91twi_i2c_exec(void * cookie,i2c_op_t op,i2c_addr_t addr,const void * vcmd,size_t cmdlen,void * vbuf,size_t buflen,int flags)289 at91twi_i2c_exec(void *cookie, i2c_op_t op, i2c_addr_t addr, const void *vcmd,
290 size_t cmdlen, void *vbuf, size_t buflen, int flags)
291 {
292 struct at91twi_softc *sc = cookie;
293
294 if (I2C_OP_READ_P(op))
295 {
296 u_int iadr = 0;
297 if (vcmd) {
298 const uint8_t *cmd = (const uint8_t *)vcmd;
299 if (cmdlen > 3) {
300 // we're in trouble..
301 return -1;
302 }
303 iadr = cmd[0];
304 if (cmdlen > 1) {
305 iadr <<= 8;
306 iadr |= cmd[1];
307 }
308 if (cmdlen > 2) {
309 iadr <<= 8;
310 iadr |= cmd[2];
311 }
312 }
313 at91twi_writereg(sc, TWI_MMR, (addr << 16) | TWI_MMR_MREAD | (cmdlen << 8));
314 if (cmdlen > 0) {
315 #ifdef AT91TWI_DEBUG
316 printf("at91twi_read: %02x iadr=%08X mmr=%08X\n",
317 addr, iadr, at91twi_readreg(sc, TWI_MMR));
318 #endif
319 at91twi_writereg(sc, TWI_IADR, iadr);
320 }
321 if (at91twi_read(sc, addr, vbuf, buflen, flags) != 0)
322 return -1;
323 } else if (vcmd) {
324 at91twi_writereg(sc, TWI_MMR, addr << 16);
325 if (at91twi_write(sc, addr, __UNCONST(vcmd), cmdlen, flags) !=0)
326 return -1;
327 }
328 return 0;
329 }
330