1/* $OpenBSD: irq_dispatch.S,v 1.17 2022/12/08 01:25:44 guenther Exp $ */ 2/* $NetBSD: irq_dispatch.S,v 1.5 2003/10/30 08:57:24 scw Exp $ */ 3 4/* 5 * Copyright (c) 2002 Fujitsu Component Limited 6 * Copyright (c) 2002 Genetec Corporation 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. Neither the name of The Fujitsu Component Limited nor the name of 18 * Genetec corporation may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 22 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 23 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 26 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 28 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 29 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 31 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 32 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36/* 37 * Copyright (c) 2002, 2003 Wasabi Systems, Inc. 38 * All rights reserved. 39 * 40 * Written by Jason R. Thorpe for Wasabi Systems, Inc. 41 * 42 * Redistribution and use in source and binary forms, with or without 43 * modification, are permitted provided that the following conditions 44 * are met: 45 * 1. Redistributions of source code must retain the above copyright 46 * notice, this list of conditions and the following disclaimer. 47 * 2. Redistributions in binary form must reproduce the above copyright 48 * notice, this list of conditions and the following disclaimer in the 49 * documentation and/or other materials provided with the distribution. 50 * 3. All advertising materials mentioning features or use of this software 51 * must display the following acknowledgement: 52 * This product includes software developed for the NetBSD Project by 53 * Wasabi Systems, Inc. 54 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 55 * or promote products derived from this software without specific prior 56 * written permission. 57 * 58 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 59 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 60 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 61 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 62 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 63 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 64 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 65 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 66 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 67 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 68 * POSSIBILITY OF SUCH DAMAGE. 69 */ 70 71#include "assym.h" 72 73#include <machine/asm.h> 74#include <arm/armreg.h> 75#include <arm/sysreg.h> 76#include <machine/frame.h> 77#include <machine/intr.h> 78 79#ifndef ARM_IRQ_HANDLER 80#error ARM_IRQ_HANDLER not defined 81#endif 82 83/* 84 * irq_entry: 85 * Main entry point for the IRQ vector. This is a generic version 86 * which can be used by different platforms. 87 */ 88 .text 89 .align 2 90.Lcpu_info_primary: 91 .word cpu_info_primary 92 93#define STOREVFP \ 94 bl vfp_save 95 96AST_LOCALS 97 98ASENTRY_NP(irq_entry) 99 sub lr, lr, #0x00000004 /* Adjust the lr */ 100 101 PUSHFRAMEINSVC /* Push an interrupt frame */ 102 103 STOREVFP /* save fpu state before irq handler */ 104 105 /* 106 * Increment the interrupt nesting depth and call the interrupt 107 * dispatch routine. We've pushed a frame, so we can safely use 108 * callee-saved regs here. We use the following registers, which 109 * we expect to persist: 110 * 111 * r5 address of the curcpu struct 112 * r6 old value of curcpu()->ci_idepth 113 */ 114 mrc CP15_TPIDRPRW(r5) /* Get curcpu from TPIDRPRW. */ 115 mov r0, sp /* arg for dispatcher */ 116 ldr r6, [r5, #CI_IDEPTH] 117 add r1, r6, #1 118 str r1, [r5, #CI_IDEPTH] 119 120 bl ARM_IRQ_HANDLER 121 122 /* 123 * Restore the old interrupt depth value (which should be the 124 * same as decrementing it at this point). 125 */ 126 str r6, [r5, #CI_IDEPTH] 127 128 DO_AST 129 PULLFRAMEFROMSVCANDEXIT 130 movs pc, lr /* Exit */ 131 dsb nsh 132 isb 133 134 .bss 135 .align 2 136 137 .global astpending 138astpending: 139 .word 0 140