1 /*
2 * Copyright (c) 2008-2009 Sam Leffler, Errno Consulting
3 * Copyright (c) 2008 Atheros Communications, Inc.
4 *
5 * Permission to use, copy, modify, and/or distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *
9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
16 *
17 * $FreeBSD$
18 */
19 #include "opt_ah.h"
20
21 /*
22 * NB: Merlin and later have a simpler RF backend.
23 */
24 #include "ah.h"
25 #include "ah_internal.h"
26
27 #include "ah_eeprom_v14.h"
28
29 #include "ar5416/ar9280.h"
30 #include "ar5416/ar5416reg.h"
31 #include "ar5416/ar5416phy.h"
32
33 #define N(a) (sizeof(a)/sizeof(a[0]))
34
35 struct ar9280State {
36 RF_HAL_FUNCS base; /* public state, must be first */
37 uint16_t pcdacTable[1]; /* XXX */
38 };
39 #define AR9280(ah) ((struct ar9280State *) AH5212(ah)->ah_rfHal)
40
41 static HAL_BOOL ar9280GetChannelMaxMinPower(struct ath_hal *,
42 HAL_CHANNEL *, int16_t *maxPow,int16_t *minPow);
43 int16_t ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c);
44
45 static void
ar9280WriteRegs(struct ath_hal * ah,u_int modesIndex,u_int freqIndex,int writes)46 ar9280WriteRegs(struct ath_hal *ah, u_int modesIndex, u_int freqIndex,
47 int writes)
48 {
49 (void) ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_bb_rfgain,
50 freqIndex, writes);
51 }
52
53 /*
54 * Take the MHz channel value and set the Channel value
55 *
56 * ASSUMES: Writes enabled to analog bus
57 *
58 * Actual Expression,
59 *
60 * For 2GHz channel,
61 * Channel Frequency = (3/4) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
62 * (freq_ref = 40MHz)
63 *
64 * For 5GHz channel,
65 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^10)
66 * (freq_ref = 40MHz/(24>>amodeRefSel))
67 *
68 * For 5GHz channels which are 5MHz spaced,
69 * Channel Frequency = (3/2) * freq_ref * (chansel[8:0] + chanfrac[16:0]/2^17)
70 * (freq_ref = 40MHz)
71 */
72 static HAL_BOOL
ar9280SetChannel(struct ath_hal * ah,HAL_CHANNEL_INTERNAL * chan)73 ar9280SetChannel(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan)
74 {
75 uint16_t bMode, fracMode, aModeRefSel = 0;
76 uint32_t freq, ndiv, channelSel = 0, channelFrac = 0, reg32 = 0;
77 CHAN_CENTERS centers;
78 uint32_t refDivA = 24;
79
80 OS_MARK(ah, AH_MARK_SETCHANNEL, chan->ic_freq);
81
82 ar5416GetChannelCenters(ah, chan, ¢ers);
83 freq = centers.synth_center;
84
85 reg32 = OS_REG_READ(ah, AR_PHY_SYNTH_CONTROL);
86 reg32 &= 0xc0000000;
87
88 if (freq < 4800) { /* 2 GHz, fractional mode */
89 uint32_t txctl;
90
91 bMode = 1;
92 fracMode = 1;
93 aModeRefSel = 0;
94 channelSel = (freq * 0x10000)/15;
95
96 txctl = OS_REG_READ(ah, AR_PHY_CCK_TX_CTRL);
97 if (freq == 2484) {
98 /* Enable channel spreading for channel 14 */
99 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
100 txctl | AR_PHY_CCK_TX_CTRL_JAPAN);
101 } else {
102 OS_REG_WRITE(ah, AR_PHY_CCK_TX_CTRL,
103 txctl &~ AR_PHY_CCK_TX_CTRL_JAPAN);
104 }
105 } else {
106 bMode = 0;
107 fracMode = 0;
108
109 if ((freq % 20) == 0) {
110 aModeRefSel = 3;
111 } else if ((freq % 10) == 0) {
112 aModeRefSel = 2;
113 } else {
114 aModeRefSel = 0;
115 /* Enable 2G (fractional) mode for channels which are 5MHz spaced */
116 fracMode = 1;
117 refDivA = 1;
118 channelSel = (freq * 0x8000)/15;
119
120 /* RefDivA setting */
121 OS_REG_RMW_FIELD(ah, AR_AN_SYNTH9,
122 AR_AN_SYNTH9_REFDIVA, refDivA);
123 }
124 if (!fracMode) {
125 ndiv = (freq * (refDivA >> aModeRefSel))/60;
126 channelSel = ndiv & 0x1ff;
127 channelFrac = (ndiv & 0xfffffe00) * 2;
128 channelSel = (channelSel << 17) | channelFrac;
129 }
130 }
131
132 reg32 = reg32 | (bMode << 29) | (fracMode << 28) |
133 (aModeRefSel << 26) | (channelSel);
134
135 OS_REG_WRITE(ah, AR_PHY_SYNTH_CONTROL, reg32);
136
137 AH_PRIVATE(ah)->ah_curchan = chan;
138
139 return AH_TRUE;
140 }
141
142 /*
143 * Return a reference to the requested RF Bank.
144 */
145 static uint32_t *
ar9280GetRfBank(struct ath_hal * ah,int bank)146 ar9280GetRfBank(struct ath_hal *ah, int bank)
147 {
148 HALDEBUG(ah, HAL_DEBUG_ANY, "%s: unknown RF Bank %d requested\n",
149 __func__, bank);
150 return AH_NULL;
151 }
152
153 /*
154 * Reads EEPROM header info from device structure and programs
155 * all rf registers
156 */
157 static HAL_BOOL
ar9280SetRfRegs(struct ath_hal * ah,HAL_CHANNEL_INTERNAL * chan,uint16_t modesIndex,uint16_t * rfXpdGain)158 ar9280SetRfRegs(struct ath_hal *ah, HAL_CHANNEL_INTERNAL *chan,
159 uint16_t modesIndex, uint16_t *rfXpdGain)
160 {
161 return AH_TRUE; /* nothing to do */
162 }
163
164 /*
165 * Read the transmit power levels from the structures taken from EEPROM
166 * Interpolate read transmit power values for this channel
167 * Organize the transmit power values into a table for writing into the hardware
168 */
169
170 static HAL_BOOL
ar9280SetPowerTable(struct ath_hal * ah,int16_t * pPowerMin,int16_t * pPowerMax,HAL_CHANNEL_INTERNAL * chan,uint16_t * rfXpdGain)171 ar9280SetPowerTable(struct ath_hal *ah, int16_t *pPowerMin, int16_t *pPowerMax,
172 HAL_CHANNEL_INTERNAL *chan, uint16_t *rfXpdGain)
173 {
174 return AH_TRUE;
175 }
176
177 #if 0
178 static int16_t
179 ar9280GetMinPower(struct ath_hal *ah, EXPN_DATA_PER_CHANNEL_5112 *data)
180 {
181 int i, minIndex;
182 int16_t minGain,minPwr,minPcdac,retVal;
183
184 /* Assume NUM_POINTS_XPD0 > 0 */
185 minGain = data->pDataPerXPD[0].xpd_gain;
186 for (minIndex=0,i=1; i<NUM_XPD_PER_CHANNEL; i++) {
187 if (data->pDataPerXPD[i].xpd_gain < minGain) {
188 minIndex = i;
189 minGain = data->pDataPerXPD[i].xpd_gain;
190 }
191 }
192 minPwr = data->pDataPerXPD[minIndex].pwr_t4[0];
193 minPcdac = data->pDataPerXPD[minIndex].pcdac[0];
194 for (i=1; i<NUM_POINTS_XPD0; i++) {
195 if (data->pDataPerXPD[minIndex].pwr_t4[i] < minPwr) {
196 minPwr = data->pDataPerXPD[minIndex].pwr_t4[i];
197 minPcdac = data->pDataPerXPD[minIndex].pcdac[i];
198 }
199 }
200 retVal = minPwr - (minPcdac*2);
201 return(retVal);
202 }
203 #endif
204
205 static HAL_BOOL
ar9280GetChannelMaxMinPower(struct ath_hal * ah,HAL_CHANNEL * chan,int16_t * maxPow,int16_t * minPow)206 ar9280GetChannelMaxMinPower(struct ath_hal *ah,
207 HAL_CHANNEL *chan,
208 int16_t *maxPow, int16_t *minPow)
209 {
210 #if 0
211 struct ath_hal_5212 *ahp = AH5212(ah);
212 int numChannels=0,i,last;
213 int totalD, totalF,totalMin;
214 EXPN_DATA_PER_CHANNEL_5112 *data=AH_NULL;
215 EEPROM_POWER_EXPN_5112 *powerArray=AH_NULL;
216
217 *maxPow = 0;
218 if (IS_CHAN_A(chan)) {
219 powerArray = ahp->ah_modePowerArray5112;
220 data = powerArray[headerInfo11A].pDataPerChannel;
221 numChannels = powerArray[headerInfo11A].numChannels;
222 } else if (IS_CHAN_G(chan) || IS_CHAN_108G(chan)) {
223 /* XXX - is this correct? Should we also use the same power for turbo G? */
224 powerArray = ahp->ah_modePowerArray5112;
225 data = powerArray[headerInfo11G].pDataPerChannel;
226 numChannels = powerArray[headerInfo11G].numChannels;
227 } else if (IS_CHAN_B(chan)) {
228 powerArray = ahp->ah_modePowerArray5112;
229 data = powerArray[headerInfo11B].pDataPerChannel;
230 numChannels = powerArray[headerInfo11B].numChannels;
231 } else {
232 return (AH_TRUE);
233 }
234 /* Make sure the channel is in the range of the TP values
235 * (freq piers)
236 */
237 if ((numChannels < 1) ||
238 (chan->channel < data[0].channelValue) ||
239 (chan->channel > data[numChannels-1].channelValue))
240 return(AH_FALSE);
241
242 /* Linearly interpolate the power value now */
243 for (last=0,i=0;
244 (i<numChannels) && (chan->channel > data[i].channelValue);
245 last=i++);
246 totalD = data[i].channelValue - data[last].channelValue;
247 if (totalD > 0) {
248 totalF = data[i].maxPower_t4 - data[last].maxPower_t4;
249 *maxPow = (int8_t) ((totalF*(chan->channel-data[last].channelValue) + data[last].maxPower_t4*totalD)/totalD);
250
251 totalMin = ar9280GetMinPower(ah,&data[i]) - ar9280GetMinPower(ah, &data[last]);
252 *minPow = (int8_t) ((totalMin*(chan->channel-data[last].channelValue) + ar9280GetMinPower(ah, &data[last])*totalD)/totalD);
253 return (AH_TRUE);
254 } else {
255 if (chan->channel == data[i].channelValue) {
256 *maxPow = data[i].maxPower_t4;
257 *minPow = ar9280GetMinPower(ah, &data[i]);
258 return(AH_TRUE);
259 } else
260 return(AH_FALSE);
261 }
262 #else
263 *maxPow = *minPow = 0;
264 return AH_FALSE;
265 #endif
266 }
267
268 static void
ar9280GetNoiseFloor(struct ath_hal * ah,int16_t nfarray[])269 ar9280GetNoiseFloor(struct ath_hal *ah, int16_t nfarray[])
270 {
271 int16_t nf;
272
273 nf = MS(OS_REG_READ(ah, AR_PHY_CCA), AR9280_PHY_MINCCA_PWR);
274 if (nf & 0x100)
275 nf = 0 - ((nf ^ 0x1ff) + 1);
276 HALDEBUG(ah, HAL_DEBUG_NFCAL,
277 "NF calibrated [ctl] [chain 0] is %d\n", nf);
278 nfarray[0] = nf;
279
280 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_CCA), AR9280_PHY_CH1_MINCCA_PWR);
281 if (nf & 0x100)
282 nf = 0 - ((nf ^ 0x1ff) + 1);
283 HALDEBUG(ah, HAL_DEBUG_NFCAL,
284 "NF calibrated [ctl] [chain 1] is %d\n", nf);
285 nfarray[1] = nf;
286
287 nf = MS(OS_REG_READ(ah, AR_PHY_EXT_CCA), AR9280_PHY_EXT_MINCCA_PWR);
288 if (nf & 0x100)
289 nf = 0 - ((nf ^ 0x1ff) + 1);
290 HALDEBUG(ah, HAL_DEBUG_NFCAL,
291 "NF calibrated [ext] [chain 0] is %d\n", nf);
292 nfarray[3] = nf;
293
294 nf = MS(OS_REG_READ(ah, AR_PHY_CH1_EXT_CCA), AR9280_PHY_CH1_EXT_MINCCA_PWR);
295 if (nf & 0x100)
296 nf = 0 - ((nf ^ 0x1ff) + 1);
297 HALDEBUG(ah, HAL_DEBUG_NFCAL,
298 "NF calibrated [ext] [chain 1] is %d\n", nf);
299 nfarray[4] = nf;
300 }
301
302 /*
303 * Adjust NF based on statistical values for 5GHz frequencies.
304 * Stubbed:Not used by Fowl
305 */
306 int16_t
ar9280GetNfAdjust(struct ath_hal * ah,const HAL_CHANNEL_INTERNAL * c)307 ar9280GetNfAdjust(struct ath_hal *ah, const HAL_CHANNEL_INTERNAL *c)
308 {
309 return 0;
310 }
311
312 /*
313 * Free memory for analog bank scratch buffers
314 */
315 static void
ar9280RfDetach(struct ath_hal * ah)316 ar9280RfDetach(struct ath_hal *ah)
317 {
318 struct ath_hal_5212 *ahp = AH5212(ah);
319
320 HALASSERT(ahp->ah_rfHal != AH_NULL);
321 ath_hal_free(ahp->ah_rfHal);
322 ahp->ah_rfHal = AH_NULL;
323 }
324
325 HAL_BOOL
ar9280RfAttach(struct ath_hal * ah,HAL_STATUS * status)326 ar9280RfAttach(struct ath_hal *ah, HAL_STATUS *status)
327 {
328 struct ath_hal_5212 *ahp = AH5212(ah);
329 struct ar9280State *priv;
330
331 HALDEBUG(ah, HAL_DEBUG_ATTACH, "%s: attach AR9280 radio\n", __func__);
332
333 HALASSERT(ahp->ah_rfHal == AH_NULL);
334 priv = ath_hal_malloc(sizeof(struct ar9280State));
335 if (priv == AH_NULL) {
336 HALDEBUG(ah, HAL_DEBUG_ANY,
337 "%s: cannot allocate private state\n", __func__);
338 *status = HAL_ENOMEM; /* XXX */
339 return AH_FALSE;
340 }
341 priv->base.rfDetach = ar9280RfDetach;
342 priv->base.writeRegs = ar9280WriteRegs;
343 priv->base.getRfBank = ar9280GetRfBank;
344 priv->base.setChannel = ar9280SetChannel;
345 priv->base.setRfRegs = ar9280SetRfRegs;
346 priv->base.setPowerTable = ar9280SetPowerTable;
347 priv->base.getChannelMaxMinPower = ar9280GetChannelMaxMinPower;
348 priv->base.getNfAdjust = ar9280GetNfAdjust;
349
350 ahp->ah_pcdacTable = priv->pcdacTable;
351 ahp->ah_pcdacTableSize = sizeof(priv->pcdacTable);
352 ahp->ah_rfHal = &priv->base;
353 /*
354 * Set noise floor adjust method; we arrange a
355 * direct call instead of thunking.
356 */
357 AH_PRIVATE(ah)->ah_getNfAdjust = priv->base.getNfAdjust;
358 AH_PRIVATE(ah)->ah_getNoiseFloor = ar9280GetNoiseFloor;
359
360 return AH_TRUE;
361 }
362