1 /* $NetBSD: amdgpu_common_baco.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $ */
2
3 /*
4 * Copyright 2018 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: amdgpu_common_baco.c,v 1.2 2021/12/18 23:45:26 riastradh Exp $");
28
29 #include "common_baco.h"
30
31
baco_wait_register(struct pp_hwmgr * hwmgr,u32 reg,u32 mask,u32 value)32 static bool baco_wait_register(struct pp_hwmgr *hwmgr, u32 reg, u32 mask, u32 value)
33 {
34 struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
35 u32 timeout = 5000, data;
36
37 do {
38 msleep(1);
39 data = RREG32(reg);
40 timeout--;
41 } while (value != (data & mask) && (timeout != 0));
42
43 if (timeout == 0)
44 return false;
45
46 return true;
47 }
48
baco_cmd_handler(struct pp_hwmgr * hwmgr,u32 command,u32 reg,u32 mask,u32 shift,u32 value,u32 timeout)49 static bool baco_cmd_handler(struct pp_hwmgr *hwmgr, u32 command, u32 reg, u32 mask,
50 u32 shift, u32 value, u32 timeout)
51 {
52 struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
53 u32 data;
54 bool ret = true;
55
56 switch (command) {
57 case CMD_WRITE:
58 WREG32(reg, value << shift);
59 break;
60 case CMD_READMODIFYWRITE:
61 data = RREG32(reg);
62 data = (data & (~mask)) | (value << shift);
63 WREG32(reg, data);
64 break;
65 case CMD_WAITFOR:
66 ret = baco_wait_register(hwmgr, reg, mask, value);
67 break;
68 case CMD_DELAY_MS:
69 if (timeout)
70 /* Delay in milli Seconds */
71 msleep(timeout);
72 break;
73 case CMD_DELAY_US:
74 if (timeout)
75 /* Delay in micro Seconds */
76 udelay(timeout);
77 break;
78
79 default:
80 dev_warn(adev->dev, "Invalid BACO command.\n");
81 ret = false;
82 }
83
84 return ret;
85 }
86
baco_program_registers(struct pp_hwmgr * hwmgr,const struct baco_cmd_entry * entry,const u32 array_size)87 bool baco_program_registers(struct pp_hwmgr *hwmgr,
88 const struct baco_cmd_entry *entry,
89 const u32 array_size)
90 {
91 u32 i, reg = 0;
92
93 for (i = 0; i < array_size; i++) {
94 if ((entry[i].cmd == CMD_WRITE) ||
95 (entry[i].cmd == CMD_READMODIFYWRITE) ||
96 (entry[i].cmd == CMD_WAITFOR))
97 reg = entry[i].reg_offset;
98 if (!baco_cmd_handler(hwmgr, entry[i].cmd, reg, entry[i].mask,
99 entry[i].shift, entry[i].val, entry[i].timeout))
100 return false;
101 }
102
103 return true;
104 }
105
soc15_baco_program_registers(struct pp_hwmgr * hwmgr,const struct soc15_baco_cmd_entry * entry,const u32 array_size)106 bool soc15_baco_program_registers(struct pp_hwmgr *hwmgr,
107 const struct soc15_baco_cmd_entry *entry,
108 const u32 array_size)
109 {
110 struct amdgpu_device *adev = (struct amdgpu_device *)(hwmgr->adev);
111 u32 i, reg = 0;
112
113 for (i = 0; i < array_size; i++) {
114 if ((entry[i].cmd == CMD_WRITE) ||
115 (entry[i].cmd == CMD_READMODIFYWRITE) ||
116 (entry[i].cmd == CMD_WAITFOR))
117 reg = adev->reg_offset[entry[i].hwip][entry[i].inst][entry[i].seg]
118 + entry[i].reg_offset;
119 if (!baco_cmd_handler(hwmgr, entry[i].cmd, reg, entry[i].mask,
120 entry[i].shift, entry[i].val, entry[i].timeout))
121 return false;
122 }
123
124 return true;
125 }
126