1 //===-- VEAsmBackend.cpp - VE Assembler Backend ---------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8
9 #include "MCTargetDesc/VEFixupKinds.h"
10 #include "MCTargetDesc/VEMCTargetDesc.h"
11 #include "llvm/MC/MCAsmBackend.h"
12 #include "llvm/MC/MCELFObjectWriter.h"
13 #include "llvm/MC/MCExpr.h"
14 #include "llvm/MC/MCFixupKindInfo.h"
15 #include "llvm/MC/MCObjectWriter.h"
16 #include "llvm/MC/MCSubtargetInfo.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/MC/TargetRegistry.h"
19 #include "llvm/Support/EndianStream.h"
20
21 using namespace llvm;
22
adjustFixupValue(unsigned Kind,uint64_t Value)23 static uint64_t adjustFixupValue(unsigned Kind, uint64_t Value) {
24 switch (Kind) {
25 default:
26 llvm_unreachable("Unknown fixup kind!");
27 case FK_Data_1:
28 case FK_Data_2:
29 case FK_Data_4:
30 case FK_Data_8:
31 case FK_PCRel_1:
32 case FK_PCRel_2:
33 case FK_PCRel_4:
34 case FK_PCRel_8:
35 return Value;
36 case VE::fixup_ve_hi32:
37 case VE::fixup_ve_pc_hi32:
38 case VE::fixup_ve_got_hi32:
39 case VE::fixup_ve_gotoff_hi32:
40 case VE::fixup_ve_plt_hi32:
41 case VE::fixup_ve_tls_gd_hi32:
42 case VE::fixup_ve_tpoff_hi32:
43 return (Value >> 32) & 0xffffffff;
44 case VE::fixup_ve_reflong:
45 case VE::fixup_ve_srel32:
46 case VE::fixup_ve_lo32:
47 case VE::fixup_ve_pc_lo32:
48 case VE::fixup_ve_got_lo32:
49 case VE::fixup_ve_gotoff_lo32:
50 case VE::fixup_ve_plt_lo32:
51 case VE::fixup_ve_tls_gd_lo32:
52 case VE::fixup_ve_tpoff_lo32:
53 return Value & 0xffffffff;
54 }
55 }
56
57 /// getFixupKindNumBytes - The number of bytes the fixup may change.
getFixupKindNumBytes(unsigned Kind)58 static unsigned getFixupKindNumBytes(unsigned Kind) {
59 switch (Kind) {
60 default:
61 llvm_unreachable("Unknown fixup kind!");
62 case FK_Data_1:
63 case FK_PCRel_1:
64 return 1;
65 case FK_Data_2:
66 case FK_PCRel_2:
67 return 2;
68 return 4;
69 case FK_Data_4:
70 case FK_PCRel_4:
71 case VE::fixup_ve_reflong:
72 case VE::fixup_ve_srel32:
73 case VE::fixup_ve_hi32:
74 case VE::fixup_ve_lo32:
75 case VE::fixup_ve_pc_hi32:
76 case VE::fixup_ve_pc_lo32:
77 case VE::fixup_ve_got_hi32:
78 case VE::fixup_ve_got_lo32:
79 case VE::fixup_ve_gotoff_hi32:
80 case VE::fixup_ve_gotoff_lo32:
81 case VE::fixup_ve_plt_hi32:
82 case VE::fixup_ve_plt_lo32:
83 case VE::fixup_ve_tls_gd_hi32:
84 case VE::fixup_ve_tls_gd_lo32:
85 case VE::fixup_ve_tpoff_hi32:
86 case VE::fixup_ve_tpoff_lo32:
87 return 4;
88 case FK_Data_8:
89 case FK_PCRel_8:
90 return 8;
91 }
92 }
93
94 namespace {
95 class VEAsmBackend : public MCAsmBackend {
96 protected:
97 const Target &TheTarget;
98
99 public:
VEAsmBackend(const Target & T)100 VEAsmBackend(const Target &T) : MCAsmBackend(support::little), TheTarget(T) {}
101
getNumFixupKinds() const102 unsigned getNumFixupKinds() const override { return VE::NumTargetFixupKinds; }
103
getFixupKindInfo(MCFixupKind Kind) const104 const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override {
105 const static MCFixupKindInfo Infos[VE::NumTargetFixupKinds] = {
106 // name, offset, bits, flags
107 {"fixup_ve_reflong", 0, 32, 0},
108 {"fixup_ve_srel32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
109 {"fixup_ve_hi32", 0, 32, 0},
110 {"fixup_ve_lo32", 0, 32, 0},
111 {"fixup_ve_pc_hi32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
112 {"fixup_ve_pc_lo32", 0, 32, MCFixupKindInfo::FKF_IsPCRel},
113 {"fixup_ve_got_hi32", 0, 32, 0},
114 {"fixup_ve_got_lo32", 0, 32, 0},
115 {"fixup_ve_gotoff_hi32", 0, 32, 0},
116 {"fixup_ve_gotoff_lo32", 0, 32, 0},
117 {"fixup_ve_plt_hi32", 0, 32, 0},
118 {"fixup_ve_plt_lo32", 0, 32, 0},
119 {"fixup_ve_tls_gd_hi32", 0, 32, 0},
120 {"fixup_ve_tls_gd_lo32", 0, 32, 0},
121 {"fixup_ve_tpoff_hi32", 0, 32, 0},
122 {"fixup_ve_tpoff_lo32", 0, 32, 0},
123 };
124
125 if (Kind < FirstTargetFixupKind)
126 return MCAsmBackend::getFixupKindInfo(Kind);
127
128 assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
129 "Invalid kind!");
130 return Infos[Kind - FirstTargetFixupKind];
131 }
132
shouldForceRelocation(const MCAssembler & Asm,const MCFixup & Fixup,const MCValue & Target)133 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
134 const MCValue &Target) override {
135 switch ((VE::Fixups)Fixup.getKind()) {
136 default:
137 return false;
138 case VE::fixup_ve_tls_gd_hi32:
139 case VE::fixup_ve_tls_gd_lo32:
140 case VE::fixup_ve_tpoff_hi32:
141 case VE::fixup_ve_tpoff_lo32:
142 return true;
143 }
144 }
145
mayNeedRelaxation(const MCInst & Inst,const MCSubtargetInfo & STI) const146 bool mayNeedRelaxation(const MCInst &Inst,
147 const MCSubtargetInfo &STI) const override {
148 // Not implemented yet. For example, if we have a branch with
149 // lager than SIMM32 immediate value, we want to relaxation such
150 // branch instructions.
151 return false;
152 }
153
154 /// fixupNeedsRelaxation - Target specific predicate for whether a given
155 /// fixup requires the associated instruction to be relaxed.
fixupNeedsRelaxation(const MCFixup & Fixup,uint64_t Value,const MCRelaxableFragment * DF,const MCAsmLayout & Layout) const156 bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
157 const MCRelaxableFragment *DF,
158 const MCAsmLayout &Layout) const override {
159 // Not implemented yet. For example, if we have a branch with
160 // lager than SIMM32 immediate value, we want to relaxation such
161 // branch instructions.
162 return false;
163 }
relaxInstruction(MCInst & Inst,const MCSubtargetInfo & STI) const164 void relaxInstruction(MCInst &Inst,
165 const MCSubtargetInfo &STI) const override {
166 // Aurora VE doesn't support relaxInstruction yet.
167 llvm_unreachable("relaxInstruction() should not be called");
168 }
169
writeNopData(raw_ostream & OS,uint64_t Count,const MCSubtargetInfo * STI) const170 bool writeNopData(raw_ostream &OS, uint64_t Count,
171 const MCSubtargetInfo *STI) const override {
172 if ((Count % 8) != 0)
173 return false;
174
175 for (uint64_t i = 0; i < Count; i += 8)
176 support::endian::write<uint64_t>(OS, 0x7900000000000000ULL,
177 support::little);
178
179 return true;
180 }
181 };
182
183 class ELFVEAsmBackend : public VEAsmBackend {
184 Triple::OSType OSType;
185
186 public:
ELFVEAsmBackend(const Target & T,Triple::OSType OSType)187 ELFVEAsmBackend(const Target &T, Triple::OSType OSType)
188 : VEAsmBackend(T), OSType(OSType) {}
189
applyFixup(const MCAssembler & Asm,const MCFixup & Fixup,const MCValue & Target,MutableArrayRef<char> Data,uint64_t Value,bool IsResolved,const MCSubtargetInfo * STI) const190 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
191 const MCValue &Target, MutableArrayRef<char> Data,
192 uint64_t Value, bool IsResolved,
193 const MCSubtargetInfo *STI) const override {
194 Value = adjustFixupValue(Fixup.getKind(), Value);
195 if (!Value)
196 return; // Doesn't change encoding.
197
198 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
199
200 // Shift the value into position.
201 Value <<= Info.TargetOffset;
202
203 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
204 unsigned Offset = Fixup.getOffset();
205 assert(Offset + NumBytes <= Data.size() && "Invalid fixup offset!");
206 // For each byte of the fragment that the fixup touches, mask in the bits
207 // from the fixup value. The Value has been "split up" into the
208 // appropriate bitfields above.
209 for (unsigned i = 0; i != NumBytes; ++i) {
210 unsigned Idx = Endian == support::little ? i : (NumBytes - 1) - i;
211 Data[Offset + Idx] |= static_cast<uint8_t>((Value >> (i * 8)) & 0xff);
212 }
213 }
214
215 std::unique_ptr<MCObjectTargetWriter>
createObjectTargetWriter() const216 createObjectTargetWriter() const override {
217 uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(OSType);
218 return createVEELFObjectWriter(OSABI);
219 }
220 };
221 } // end anonymous namespace
222
createVEAsmBackend(const Target & T,const MCSubtargetInfo & STI,const MCRegisterInfo & MRI,const MCTargetOptions & Options)223 MCAsmBackend *llvm::createVEAsmBackend(const Target &T,
224 const MCSubtargetInfo &STI,
225 const MCRegisterInfo &MRI,
226 const MCTargetOptions &Options) {
227 return new ELFVEAsmBackend(T, STI.getTargetTriple().getOS());
228 }
229