1 //===- SelectionDAGDumper.cpp - Implement SelectionDAG::dump() ------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This implements the SelectionDAG::dump method and friends.
10 //
11 //===----------------------------------------------------------------------===//
12
13 #include "SDNodeDbgValue.h"
14 #include "llvm/ADT/APFloat.h"
15 #include "llvm/ADT/APInt.h"
16 #include "llvm/ADT/SmallPtrSet.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/CodeGen/ISDOpcodes.h"
19 #include "llvm/CodeGen/MachineBasicBlock.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineMemOperand.h"
22 #include "llvm/CodeGen/SelectionDAG.h"
23 #include "llvm/CodeGen/SelectionDAGNodes.h"
24 #include "llvm/CodeGen/TargetInstrInfo.h"
25 #include "llvm/CodeGen/TargetLowering.h"
26 #include "llvm/CodeGen/TargetRegisterInfo.h"
27 #include "llvm/CodeGen/TargetSubtargetInfo.h"
28 #include "llvm/CodeGen/ValueTypes.h"
29 #include "llvm/Config/llvm-config.h"
30 #include "llvm/IR/BasicBlock.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DebugInfoMetadata.h"
33 #include "llvm/IR/DebugLoc.h"
34 #include "llvm/IR/Function.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/IR/ModuleSlotTracker.h"
37 #include "llvm/IR/Value.h"
38 #include "llvm/Support/Casting.h"
39 #include "llvm/Support/CommandLine.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/Debug.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/MachineValueType.h"
44 #include "llvm/Support/Printable.h"
45 #include "llvm/Support/raw_ostream.h"
46 #include "llvm/Target/TargetIntrinsicInfo.h"
47 #include "llvm/Target/TargetMachine.h"
48 #include <cstdint>
49 #include <iterator>
50
51 using namespace llvm;
52
53 static cl::opt<bool>
54 VerboseDAGDumping("dag-dump-verbose", cl::Hidden,
55 cl::desc("Display more information when dumping selection "
56 "DAG nodes."));
57
getOperationName(const SelectionDAG * G) const58 std::string SDNode::getOperationName(const SelectionDAG *G) const {
59 switch (getOpcode()) {
60 default:
61 if (getOpcode() < ISD::BUILTIN_OP_END)
62 return "<<Unknown DAG Node>>";
63 if (isMachineOpcode()) {
64 if (G)
65 if (const TargetInstrInfo *TII = G->getSubtarget().getInstrInfo())
66 if (getMachineOpcode() < TII->getNumOpcodes())
67 return std::string(TII->getName(getMachineOpcode()));
68 return "<<Unknown Machine Node #" + utostr(getOpcode()) + ">>";
69 }
70 if (G) {
71 const TargetLowering &TLI = G->getTargetLoweringInfo();
72 const char *Name = TLI.getTargetNodeName(getOpcode());
73 if (Name) return Name;
74 return "<<Unknown Target Node #" + utostr(getOpcode()) + ">>";
75 }
76 return "<<Unknown Node #" + utostr(getOpcode()) + ">>";
77
78 #ifndef NDEBUG
79 case ISD::DELETED_NODE: return "<<Deleted Node!>>";
80 #endif
81 case ISD::PREFETCH: return "Prefetch";
82 case ISD::MEMBARRIER: return "MemBarrier";
83 case ISD::ATOMIC_FENCE: return "AtomicFence";
84 case ISD::ATOMIC_CMP_SWAP: return "AtomicCmpSwap";
85 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS: return "AtomicCmpSwapWithSuccess";
86 case ISD::ATOMIC_SWAP: return "AtomicSwap";
87 case ISD::ATOMIC_LOAD_ADD: return "AtomicLoadAdd";
88 case ISD::ATOMIC_LOAD_SUB: return "AtomicLoadSub";
89 case ISD::ATOMIC_LOAD_AND: return "AtomicLoadAnd";
90 case ISD::ATOMIC_LOAD_CLR: return "AtomicLoadClr";
91 case ISD::ATOMIC_LOAD_OR: return "AtomicLoadOr";
92 case ISD::ATOMIC_LOAD_XOR: return "AtomicLoadXor";
93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand";
94 case ISD::ATOMIC_LOAD_MIN: return "AtomicLoadMin";
95 case ISD::ATOMIC_LOAD_MAX: return "AtomicLoadMax";
96 case ISD::ATOMIC_LOAD_UMIN: return "AtomicLoadUMin";
97 case ISD::ATOMIC_LOAD_UMAX: return "AtomicLoadUMax";
98 case ISD::ATOMIC_LOAD_FADD: return "AtomicLoadFAdd";
99 case ISD::ATOMIC_LOAD_UINC_WRAP:
100 return "AtomicLoadUIncWrap";
101 case ISD::ATOMIC_LOAD_UDEC_WRAP:
102 return "AtomicLoadUDecWrap";
103 case ISD::ATOMIC_LOAD: return "AtomicLoad";
104 case ISD::ATOMIC_STORE: return "AtomicStore";
105 case ISD::PCMARKER: return "PCMarker";
106 case ISD::READCYCLECOUNTER: return "ReadCycleCounter";
107 case ISD::SRCVALUE: return "SrcValue";
108 case ISD::MDNODE_SDNODE: return "MDNode";
109 case ISD::EntryToken: return "EntryToken";
110 case ISD::TokenFactor: return "TokenFactor";
111 case ISD::AssertSext: return "AssertSext";
112 case ISD::AssertZext: return "AssertZext";
113 case ISD::AssertAlign: return "AssertAlign";
114
115 case ISD::BasicBlock: return "BasicBlock";
116 case ISD::VALUETYPE: return "ValueType";
117 case ISD::Register: return "Register";
118 case ISD::RegisterMask: return "RegisterMask";
119 case ISD::Constant:
120 if (cast<ConstantSDNode>(this)->isOpaque())
121 return "OpaqueConstant";
122 return "Constant";
123 case ISD::ConstantFP: return "ConstantFP";
124 case ISD::GlobalAddress: return "GlobalAddress";
125 case ISD::GlobalTLSAddress: return "GlobalTLSAddress";
126 case ISD::FrameIndex: return "FrameIndex";
127 case ISD::JumpTable: return "JumpTable";
128 case ISD::GLOBAL_OFFSET_TABLE: return "GLOBAL_OFFSET_TABLE";
129 case ISD::RETURNADDR: return "RETURNADDR";
130 case ISD::ADDROFRETURNADDR: return "ADDROFRETURNADDR";
131 case ISD::FRAMEADDR: return "FRAMEADDR";
132 case ISD::SPONENTRY: return "SPONENTRY";
133 case ISD::LOCAL_RECOVER: return "LOCAL_RECOVER";
134 case ISD::READ_REGISTER: return "READ_REGISTER";
135 case ISD::WRITE_REGISTER: return "WRITE_REGISTER";
136 case ISD::FRAME_TO_ARGS_OFFSET: return "FRAME_TO_ARGS_OFFSET";
137 case ISD::EH_DWARF_CFA: return "EH_DWARF_CFA";
138 case ISD::EH_RETURN: return "EH_RETURN";
139 case ISD::EH_SJLJ_SETJMP: return "EH_SJLJ_SETJMP";
140 case ISD::EH_SJLJ_LONGJMP: return "EH_SJLJ_LONGJMP";
141 case ISD::EH_SJLJ_SETUP_DISPATCH: return "EH_SJLJ_SETUP_DISPATCH";
142 case ISD::ConstantPool: return "ConstantPool";
143 case ISD::TargetIndex: return "TargetIndex";
144 case ISD::ExternalSymbol: return "ExternalSymbol";
145 case ISD::BlockAddress: return "BlockAddress";
146 case ISD::INTRINSIC_WO_CHAIN:
147 case ISD::INTRINSIC_VOID:
148 case ISD::INTRINSIC_W_CHAIN: {
149 unsigned OpNo = getOpcode() == ISD::INTRINSIC_WO_CHAIN ? 0 : 1;
150 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
151 if (IID < Intrinsic::num_intrinsics)
152 return Intrinsic::getBaseName((Intrinsic::ID)IID).str();
153 if (!G)
154 return "Unknown intrinsic";
155 if (const TargetIntrinsicInfo *TII = G->getTarget().getIntrinsicInfo())
156 return TII->getName(IID);
157 llvm_unreachable("Invalid intrinsic ID");
158 }
159
160 case ISD::BUILD_VECTOR: return "BUILD_VECTOR";
161 case ISD::TargetConstant:
162 if (cast<ConstantSDNode>(this)->isOpaque())
163 return "OpaqueTargetConstant";
164 return "TargetConstant";
165 case ISD::TargetConstantFP: return "TargetConstantFP";
166 case ISD::TargetGlobalAddress: return "TargetGlobalAddress";
167 case ISD::TargetGlobalTLSAddress: return "TargetGlobalTLSAddress";
168 case ISD::TargetFrameIndex: return "TargetFrameIndex";
169 case ISD::TargetJumpTable: return "TargetJumpTable";
170 case ISD::TargetConstantPool: return "TargetConstantPool";
171 case ISD::TargetExternalSymbol: return "TargetExternalSymbol";
172 case ISD::MCSymbol: return "MCSymbol";
173 case ISD::TargetBlockAddress: return "TargetBlockAddress";
174
175 case ISD::CopyToReg: return "CopyToReg";
176 case ISD::CopyFromReg: return "CopyFromReg";
177 case ISD::UNDEF: return "undef";
178 case ISD::VSCALE: return "vscale";
179 case ISD::MERGE_VALUES: return "merge_values";
180 case ISD::INLINEASM: return "inlineasm";
181 case ISD::INLINEASM_BR: return "inlineasm_br";
182 case ISD::EH_LABEL: return "eh_label";
183 case ISD::ANNOTATION_LABEL: return "annotation_label";
184 case ISD::HANDLENODE: return "handlenode";
185
186 // Unary operators
187 case ISD::FABS: return "fabs";
188 case ISD::FMINNUM: return "fminnum";
189 case ISD::STRICT_FMINNUM: return "strict_fminnum";
190 case ISD::FMAXNUM: return "fmaxnum";
191 case ISD::STRICT_FMAXNUM: return "strict_fmaxnum";
192 case ISD::FMINNUM_IEEE: return "fminnum_ieee";
193 case ISD::FMAXNUM_IEEE: return "fmaxnum_ieee";
194 case ISD::FMINIMUM: return "fminimum";
195 case ISD::STRICT_FMINIMUM: return "strict_fminimum";
196 case ISD::FMAXIMUM: return "fmaximum";
197 case ISD::STRICT_FMAXIMUM: return "strict_fmaximum";
198 case ISD::FNEG: return "fneg";
199 case ISD::FSQRT: return "fsqrt";
200 case ISD::STRICT_FSQRT: return "strict_fsqrt";
201 case ISD::FCBRT: return "fcbrt";
202 case ISD::FSIN: return "fsin";
203 case ISD::STRICT_FSIN: return "strict_fsin";
204 case ISD::FCOS: return "fcos";
205 case ISD::STRICT_FCOS: return "strict_fcos";
206 case ISD::FSINCOS: return "fsincos";
207 case ISD::FTRUNC: return "ftrunc";
208 case ISD::STRICT_FTRUNC: return "strict_ftrunc";
209 case ISD::FFLOOR: return "ffloor";
210 case ISD::STRICT_FFLOOR: return "strict_ffloor";
211 case ISD::FCEIL: return "fceil";
212 case ISD::STRICT_FCEIL: return "strict_fceil";
213 case ISD::FRINT: return "frint";
214 case ISD::STRICT_FRINT: return "strict_frint";
215 case ISD::FNEARBYINT: return "fnearbyint";
216 case ISD::STRICT_FNEARBYINT: return "strict_fnearbyint";
217 case ISD::FROUND: return "fround";
218 case ISD::STRICT_FROUND: return "strict_fround";
219 case ISD::FROUNDEVEN: return "froundeven";
220 case ISD::STRICT_FROUNDEVEN: return "strict_froundeven";
221 case ISD::FEXP: return "fexp";
222 case ISD::STRICT_FEXP: return "strict_fexp";
223 case ISD::FEXP2: return "fexp2";
224 case ISD::STRICT_FEXP2: return "strict_fexp2";
225 case ISD::FLOG: return "flog";
226 case ISD::STRICT_FLOG: return "strict_flog";
227 case ISD::FLOG2: return "flog2";
228 case ISD::STRICT_FLOG2: return "strict_flog2";
229 case ISD::FLOG10: return "flog10";
230 case ISD::STRICT_FLOG10: return "strict_flog10";
231
232 // Binary operators
233 case ISD::ADD: return "add";
234 case ISD::SUB: return "sub";
235 case ISD::MUL: return "mul";
236 case ISD::MULHU: return "mulhu";
237 case ISD::MULHS: return "mulhs";
238 case ISD::AVGFLOORU: return "avgflooru";
239 case ISD::AVGFLOORS: return "avgfloors";
240 case ISD::AVGCEILU: return "avgceilu";
241 case ISD::AVGCEILS: return "avgceils";
242 case ISD::ABDS: return "abds";
243 case ISD::ABDU: return "abdu";
244 case ISD::SDIV: return "sdiv";
245 case ISD::UDIV: return "udiv";
246 case ISD::SREM: return "srem";
247 case ISD::UREM: return "urem";
248 case ISD::SMUL_LOHI: return "smul_lohi";
249 case ISD::UMUL_LOHI: return "umul_lohi";
250 case ISD::SDIVREM: return "sdivrem";
251 case ISD::UDIVREM: return "udivrem";
252 case ISD::AND: return "and";
253 case ISD::OR: return "or";
254 case ISD::XOR: return "xor";
255 case ISD::SHL: return "shl";
256 case ISD::SRA: return "sra";
257 case ISD::SRL: return "srl";
258 case ISD::ROTL: return "rotl";
259 case ISD::ROTR: return "rotr";
260 case ISD::FSHL: return "fshl";
261 case ISD::FSHR: return "fshr";
262 case ISD::FADD: return "fadd";
263 case ISD::STRICT_FADD: return "strict_fadd";
264 case ISD::FSUB: return "fsub";
265 case ISD::STRICT_FSUB: return "strict_fsub";
266 case ISD::FMUL: return "fmul";
267 case ISD::STRICT_FMUL: return "strict_fmul";
268 case ISD::FDIV: return "fdiv";
269 case ISD::STRICT_FDIV: return "strict_fdiv";
270 case ISD::FMA: return "fma";
271 case ISD::STRICT_FMA: return "strict_fma";
272 case ISD::FMAD: return "fmad";
273 case ISD::FREM: return "frem";
274 case ISD::STRICT_FREM: return "strict_frem";
275 case ISD::FCOPYSIGN: return "fcopysign";
276 case ISD::FGETSIGN: return "fgetsign";
277 case ISD::FCANONICALIZE: return "fcanonicalize";
278 case ISD::IS_FPCLASS: return "is_fpclass";
279 case ISD::FPOW: return "fpow";
280 case ISD::STRICT_FPOW: return "strict_fpow";
281 case ISD::SMIN: return "smin";
282 case ISD::SMAX: return "smax";
283 case ISD::UMIN: return "umin";
284 case ISD::UMAX: return "umax";
285
286 case ISD::FPOWI: return "fpowi";
287 case ISD::STRICT_FPOWI: return "strict_fpowi";
288 case ISD::SETCC: return "setcc";
289 case ISD::SETCCCARRY: return "setcccarry";
290 case ISD::STRICT_FSETCC: return "strict_fsetcc";
291 case ISD::STRICT_FSETCCS: return "strict_fsetccs";
292 case ISD::SELECT: return "select";
293 case ISD::VSELECT: return "vselect";
294 case ISD::SELECT_CC: return "select_cc";
295 case ISD::INSERT_VECTOR_ELT: return "insert_vector_elt";
296 case ISD::EXTRACT_VECTOR_ELT: return "extract_vector_elt";
297 case ISD::CONCAT_VECTORS: return "concat_vectors";
298 case ISD::INSERT_SUBVECTOR: return "insert_subvector";
299 case ISD::EXTRACT_SUBVECTOR: return "extract_subvector";
300 case ISD::SCALAR_TO_VECTOR: return "scalar_to_vector";
301 case ISD::VECTOR_SHUFFLE: return "vector_shuffle";
302 case ISD::VECTOR_SPLICE: return "vector_splice";
303 case ISD::SPLAT_VECTOR: return "splat_vector";
304 case ISD::SPLAT_VECTOR_PARTS: return "splat_vector_parts";
305 case ISD::VECTOR_REVERSE: return "vector_reverse";
306 case ISD::STEP_VECTOR: return "step_vector";
307 case ISD::CARRY_FALSE: return "carry_false";
308 case ISD::ADDC: return "addc";
309 case ISD::ADDE: return "adde";
310 case ISD::ADDCARRY: return "addcarry";
311 case ISD::SADDO_CARRY: return "saddo_carry";
312 case ISD::SADDO: return "saddo";
313 case ISD::UADDO: return "uaddo";
314 case ISD::SSUBO: return "ssubo";
315 case ISD::USUBO: return "usubo";
316 case ISD::SMULO: return "smulo";
317 case ISD::UMULO: return "umulo";
318 case ISD::SUBC: return "subc";
319 case ISD::SUBE: return "sube";
320 case ISD::SUBCARRY: return "subcarry";
321 case ISD::SSUBO_CARRY: return "ssubo_carry";
322 case ISD::SHL_PARTS: return "shl_parts";
323 case ISD::SRA_PARTS: return "sra_parts";
324 case ISD::SRL_PARTS: return "srl_parts";
325
326 case ISD::SADDSAT: return "saddsat";
327 case ISD::UADDSAT: return "uaddsat";
328 case ISD::SSUBSAT: return "ssubsat";
329 case ISD::USUBSAT: return "usubsat";
330 case ISD::SSHLSAT: return "sshlsat";
331 case ISD::USHLSAT: return "ushlsat";
332
333 case ISD::SMULFIX: return "smulfix";
334 case ISD::SMULFIXSAT: return "smulfixsat";
335 case ISD::UMULFIX: return "umulfix";
336 case ISD::UMULFIXSAT: return "umulfixsat";
337
338 case ISD::SDIVFIX: return "sdivfix";
339 case ISD::SDIVFIXSAT: return "sdivfixsat";
340 case ISD::UDIVFIX: return "udivfix";
341 case ISD::UDIVFIXSAT: return "udivfixsat";
342
343 // Conversion operators.
344 case ISD::SIGN_EXTEND: return "sign_extend";
345 case ISD::ZERO_EXTEND: return "zero_extend";
346 case ISD::ANY_EXTEND: return "any_extend";
347 case ISD::SIGN_EXTEND_INREG: return "sign_extend_inreg";
348 case ISD::ANY_EXTEND_VECTOR_INREG: return "any_extend_vector_inreg";
349 case ISD::SIGN_EXTEND_VECTOR_INREG: return "sign_extend_vector_inreg";
350 case ISD::ZERO_EXTEND_VECTOR_INREG: return "zero_extend_vector_inreg";
351 case ISD::TRUNCATE: return "truncate";
352 case ISD::FP_ROUND: return "fp_round";
353 case ISD::STRICT_FP_ROUND: return "strict_fp_round";
354 case ISD::FP_EXTEND: return "fp_extend";
355 case ISD::STRICT_FP_EXTEND: return "strict_fp_extend";
356
357 case ISD::SINT_TO_FP: return "sint_to_fp";
358 case ISD::STRICT_SINT_TO_FP: return "strict_sint_to_fp";
359 case ISD::UINT_TO_FP: return "uint_to_fp";
360 case ISD::STRICT_UINT_TO_FP: return "strict_uint_to_fp";
361 case ISD::FP_TO_SINT: return "fp_to_sint";
362 case ISD::STRICT_FP_TO_SINT: return "strict_fp_to_sint";
363 case ISD::FP_TO_UINT: return "fp_to_uint";
364 case ISD::STRICT_FP_TO_UINT: return "strict_fp_to_uint";
365 case ISD::FP_TO_SINT_SAT: return "fp_to_sint_sat";
366 case ISD::FP_TO_UINT_SAT: return "fp_to_uint_sat";
367 case ISD::BITCAST: return "bitcast";
368 case ISD::ADDRSPACECAST: return "addrspacecast";
369 case ISD::FP16_TO_FP: return "fp16_to_fp";
370 case ISD::STRICT_FP16_TO_FP: return "strict_fp16_to_fp";
371 case ISD::FP_TO_FP16: return "fp_to_fp16";
372 case ISD::STRICT_FP_TO_FP16: return "strict_fp_to_fp16";
373 case ISD::BF16_TO_FP: return "bf16_to_fp";
374 case ISD::FP_TO_BF16: return "fp_to_bf16";
375 case ISD::LROUND: return "lround";
376 case ISD::STRICT_LROUND: return "strict_lround";
377 case ISD::LLROUND: return "llround";
378 case ISD::STRICT_LLROUND: return "strict_llround";
379 case ISD::LRINT: return "lrint";
380 case ISD::STRICT_LRINT: return "strict_lrint";
381 case ISD::LLRINT: return "llrint";
382 case ISD::STRICT_LLRINT: return "strict_llrint";
383
384 // Control flow instructions
385 case ISD::BR: return "br";
386 case ISD::BRIND: return "brind";
387 case ISD::BR_JT: return "br_jt";
388 case ISD::BRCOND: return "brcond";
389 case ISD::BR_CC: return "br_cc";
390 case ISD::CALLSEQ_START: return "callseq_start";
391 case ISD::CALLSEQ_END: return "callseq_end";
392
393 // EH instructions
394 case ISD::CATCHRET: return "catchret";
395 case ISD::CLEANUPRET: return "cleanupret";
396
397 // Other operators
398 case ISD::LOAD: return "load";
399 case ISD::STORE: return "store";
400 case ISD::MLOAD: return "masked_load";
401 case ISD::MSTORE: return "masked_store";
402 case ISD::MGATHER: return "masked_gather";
403 case ISD::MSCATTER: return "masked_scatter";
404 case ISD::VAARG: return "vaarg";
405 case ISD::VACOPY: return "vacopy";
406 case ISD::VAEND: return "vaend";
407 case ISD::VASTART: return "vastart";
408 case ISD::DYNAMIC_STACKALLOC: return "dynamic_stackalloc";
409 case ISD::EXTRACT_ELEMENT: return "extract_element";
410 case ISD::BUILD_PAIR: return "build_pair";
411 case ISD::STACKSAVE: return "stacksave";
412 case ISD::STACKRESTORE: return "stackrestore";
413 case ISD::TRAP: return "trap";
414 case ISD::DEBUGTRAP: return "debugtrap";
415 case ISD::UBSANTRAP: return "ubsantrap";
416 case ISD::LIFETIME_START: return "lifetime.start";
417 case ISD::LIFETIME_END: return "lifetime.end";
418 case ISD::PSEUDO_PROBE:
419 return "pseudoprobe";
420 case ISD::GC_TRANSITION_START: return "gc_transition.start";
421 case ISD::GC_TRANSITION_END: return "gc_transition.end";
422 case ISD::GET_DYNAMIC_AREA_OFFSET: return "get.dynamic.area.offset";
423 case ISD::FREEZE: return "freeze";
424 case ISD::PREALLOCATED_SETUP:
425 return "call_setup";
426 case ISD::PREALLOCATED_ARG:
427 return "call_alloc";
428
429 // Floating point environment manipulation
430 case ISD::GET_ROUNDING: return "get_rounding";
431 case ISD::SET_ROUNDING: return "set_rounding";
432
433 // Bit manipulation
434 case ISD::ABS: return "abs";
435 case ISD::BITREVERSE: return "bitreverse";
436 case ISD::BSWAP: return "bswap";
437 case ISD::CTPOP: return "ctpop";
438 case ISD::CTTZ: return "cttz";
439 case ISD::CTTZ_ZERO_UNDEF: return "cttz_zero_undef";
440 case ISD::CTLZ: return "ctlz";
441 case ISD::CTLZ_ZERO_UNDEF: return "ctlz_zero_undef";
442 case ISD::PARITY: return "parity";
443
444 // Trampolines
445 case ISD::INIT_TRAMPOLINE: return "init_trampoline";
446 case ISD::ADJUST_TRAMPOLINE: return "adjust_trampoline";
447
448 case ISD::CONDCODE:
449 switch (cast<CondCodeSDNode>(this)->get()) {
450 default: llvm_unreachable("Unknown setcc condition!");
451 case ISD::SETOEQ: return "setoeq";
452 case ISD::SETOGT: return "setogt";
453 case ISD::SETOGE: return "setoge";
454 case ISD::SETOLT: return "setolt";
455 case ISD::SETOLE: return "setole";
456 case ISD::SETONE: return "setone";
457
458 case ISD::SETO: return "seto";
459 case ISD::SETUO: return "setuo";
460 case ISD::SETUEQ: return "setueq";
461 case ISD::SETUGT: return "setugt";
462 case ISD::SETUGE: return "setuge";
463 case ISD::SETULT: return "setult";
464 case ISD::SETULE: return "setule";
465 case ISD::SETUNE: return "setune";
466
467 case ISD::SETEQ: return "seteq";
468 case ISD::SETGT: return "setgt";
469 case ISD::SETGE: return "setge";
470 case ISD::SETLT: return "setlt";
471 case ISD::SETLE: return "setle";
472 case ISD::SETNE: return "setne";
473
474 case ISD::SETTRUE: return "settrue";
475 case ISD::SETTRUE2: return "settrue2";
476 case ISD::SETFALSE: return "setfalse";
477 case ISD::SETFALSE2: return "setfalse2";
478 }
479 case ISD::VECREDUCE_FADD: return "vecreduce_fadd";
480 case ISD::VECREDUCE_SEQ_FADD: return "vecreduce_seq_fadd";
481 case ISD::VECREDUCE_FMUL: return "vecreduce_fmul";
482 case ISD::VECREDUCE_SEQ_FMUL: return "vecreduce_seq_fmul";
483 case ISD::VECREDUCE_ADD: return "vecreduce_add";
484 case ISD::VECREDUCE_MUL: return "vecreduce_mul";
485 case ISD::VECREDUCE_AND: return "vecreduce_and";
486 case ISD::VECREDUCE_OR: return "vecreduce_or";
487 case ISD::VECREDUCE_XOR: return "vecreduce_xor";
488 case ISD::VECREDUCE_SMAX: return "vecreduce_smax";
489 case ISD::VECREDUCE_SMIN: return "vecreduce_smin";
490 case ISD::VECREDUCE_UMAX: return "vecreduce_umax";
491 case ISD::VECREDUCE_UMIN: return "vecreduce_umin";
492 case ISD::VECREDUCE_FMAX: return "vecreduce_fmax";
493 case ISD::VECREDUCE_FMIN: return "vecreduce_fmin";
494 case ISD::STACKMAP:
495 return "stackmap";
496 case ISD::PATCHPOINT:
497 return "patchpoint";
498
499 // Vector Predication
500 #define BEGIN_REGISTER_VP_SDNODE(SDID, LEGALARG, NAME, ...) \
501 case ISD::SDID: \
502 return #NAME;
503 #include "llvm/IR/VPIntrinsics.def"
504 }
505 }
506
getIndexedModeName(ISD::MemIndexedMode AM)507 const char *SDNode::getIndexedModeName(ISD::MemIndexedMode AM) {
508 switch (AM) {
509 default: return "";
510 case ISD::PRE_INC: return "<pre-inc>";
511 case ISD::PRE_DEC: return "<pre-dec>";
512 case ISD::POST_INC: return "<post-inc>";
513 case ISD::POST_DEC: return "<post-dec>";
514 }
515 }
516
PrintNodeId(const SDNode & Node)517 static Printable PrintNodeId(const SDNode &Node) {
518 return Printable([&Node](raw_ostream &OS) {
519 #ifndef NDEBUG
520 OS << 't' << Node.PersistentId;
521 #else
522 OS << (const void*)&Node;
523 #endif
524 });
525 }
526
527 // Print the MMO with more information from the SelectionDAG.
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const MachineFunction * MF,const Module * M,const MachineFrameInfo * MFI,const TargetInstrInfo * TII,LLVMContext & Ctx)528 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
529 const MachineFunction *MF, const Module *M,
530 const MachineFrameInfo *MFI,
531 const TargetInstrInfo *TII, LLVMContext &Ctx) {
532 ModuleSlotTracker MST(M);
533 if (MF)
534 MST.incorporateFunction(MF->getFunction());
535 SmallVector<StringRef, 0> SSNs;
536 MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
537 }
538
printMemOperand(raw_ostream & OS,const MachineMemOperand & MMO,const SelectionDAG * G)539 static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
540 const SelectionDAG *G) {
541 if (G) {
542 const MachineFunction *MF = &G->getMachineFunction();
543 return printMemOperand(OS, MMO, MF, MF->getFunction().getParent(),
544 &MF->getFrameInfo(),
545 G->getSubtarget().getInstrInfo(), *G->getContext());
546 }
547
548 LLVMContext Ctx;
549 return printMemOperand(OS, MMO, /*MF=*/nullptr, /*M=*/nullptr,
550 /*MFI=*/nullptr, /*TII=*/nullptr, Ctx);
551 }
552
553 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const554 LLVM_DUMP_METHOD void SDNode::dump() const { dump(nullptr); }
555
dump(const SelectionDAG * G) const556 LLVM_DUMP_METHOD void SDNode::dump(const SelectionDAG *G) const {
557 print(dbgs(), G);
558 dbgs() << '\n';
559 }
560 #endif
561
print_types(raw_ostream & OS,const SelectionDAG * G) const562 void SDNode::print_types(raw_ostream &OS, const SelectionDAG *G) const {
563 for (unsigned i = 0, e = getNumValues(); i != e; ++i) {
564 if (i) OS << ",";
565 if (getValueType(i) == MVT::Other)
566 OS << "ch";
567 else
568 OS << getValueType(i).getEVTString();
569 }
570 }
571
print_details(raw_ostream & OS,const SelectionDAG * G) const572 void SDNode::print_details(raw_ostream &OS, const SelectionDAG *G) const {
573 if (getFlags().hasNoUnsignedWrap())
574 OS << " nuw";
575
576 if (getFlags().hasNoSignedWrap())
577 OS << " nsw";
578
579 if (getFlags().hasExact())
580 OS << " exact";
581
582 if (getFlags().hasNoNaNs())
583 OS << " nnan";
584
585 if (getFlags().hasNoInfs())
586 OS << " ninf";
587
588 if (getFlags().hasNoSignedZeros())
589 OS << " nsz";
590
591 if (getFlags().hasAllowReciprocal())
592 OS << " arcp";
593
594 if (getFlags().hasAllowContract())
595 OS << " contract";
596
597 if (getFlags().hasApproximateFuncs())
598 OS << " afn";
599
600 if (getFlags().hasAllowReassociation())
601 OS << " reassoc";
602
603 if (getFlags().hasNoFPExcept())
604 OS << " nofpexcept";
605
606 if (const MachineSDNode *MN = dyn_cast<MachineSDNode>(this)) {
607 if (!MN->memoperands_empty()) {
608 OS << "<";
609 OS << "Mem:";
610 for (MachineSDNode::mmo_iterator i = MN->memoperands_begin(),
611 e = MN->memoperands_end(); i != e; ++i) {
612 printMemOperand(OS, **i, G);
613 if (std::next(i) != e)
614 OS << " ";
615 }
616 OS << ">";
617 }
618 } else if (const ShuffleVectorSDNode *SVN =
619 dyn_cast<ShuffleVectorSDNode>(this)) {
620 OS << "<";
621 for (unsigned i = 0, e = ValueList[0].getVectorNumElements(); i != e; ++i) {
622 int Idx = SVN->getMaskElt(i);
623 if (i) OS << ",";
624 if (Idx < 0)
625 OS << "u";
626 else
627 OS << Idx;
628 }
629 OS << ">";
630 } else if (const ConstantSDNode *CSDN = dyn_cast<ConstantSDNode>(this)) {
631 OS << '<' << CSDN->getAPIntValue() << '>';
632 } else if (const ConstantFPSDNode *CSDN = dyn_cast<ConstantFPSDNode>(this)) {
633 if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEsingle())
634 OS << '<' << CSDN->getValueAPF().convertToFloat() << '>';
635 else if (&CSDN->getValueAPF().getSemantics() == &APFloat::IEEEdouble())
636 OS << '<' << CSDN->getValueAPF().convertToDouble() << '>';
637 else {
638 OS << "<APFloat(";
639 CSDN->getValueAPF().bitcastToAPInt().print(OS, false);
640 OS << ")>";
641 }
642 } else if (const GlobalAddressSDNode *GADN =
643 dyn_cast<GlobalAddressSDNode>(this)) {
644 int64_t offset = GADN->getOffset();
645 OS << '<';
646 GADN->getGlobal()->printAsOperand(OS);
647 OS << '>';
648 if (offset > 0)
649 OS << " + " << offset;
650 else
651 OS << " " << offset;
652 if (unsigned int TF = GADN->getTargetFlags())
653 OS << " [TF=" << TF << ']';
654 } else if (const FrameIndexSDNode *FIDN = dyn_cast<FrameIndexSDNode>(this)) {
655 OS << "<" << FIDN->getIndex() << ">";
656 } else if (const JumpTableSDNode *JTDN = dyn_cast<JumpTableSDNode>(this)) {
657 OS << "<" << JTDN->getIndex() << ">";
658 if (unsigned int TF = JTDN->getTargetFlags())
659 OS << " [TF=" << TF << ']';
660 } else if (const ConstantPoolSDNode *CP = dyn_cast<ConstantPoolSDNode>(this)){
661 int offset = CP->getOffset();
662 if (CP->isMachineConstantPoolEntry())
663 OS << "<" << *CP->getMachineCPVal() << ">";
664 else
665 OS << "<" << *CP->getConstVal() << ">";
666 if (offset > 0)
667 OS << " + " << offset;
668 else
669 OS << " " << offset;
670 if (unsigned int TF = CP->getTargetFlags())
671 OS << " [TF=" << TF << ']';
672 } else if (const TargetIndexSDNode *TI = dyn_cast<TargetIndexSDNode>(this)) {
673 OS << "<" << TI->getIndex() << '+' << TI->getOffset() << ">";
674 if (unsigned TF = TI->getTargetFlags())
675 OS << " [TF=" << TF << ']';
676 } else if (const BasicBlockSDNode *BBDN = dyn_cast<BasicBlockSDNode>(this)) {
677 OS << "<";
678 const Value *LBB = (const Value*)BBDN->getBasicBlock()->getBasicBlock();
679 if (LBB)
680 OS << LBB->getName() << " ";
681 OS << (const void*)BBDN->getBasicBlock() << ">";
682 } else if (const RegisterSDNode *R = dyn_cast<RegisterSDNode>(this)) {
683 OS << ' ' << printReg(R->getReg(),
684 G ? G->getSubtarget().getRegisterInfo() : nullptr);
685 } else if (const ExternalSymbolSDNode *ES =
686 dyn_cast<ExternalSymbolSDNode>(this)) {
687 OS << "'" << ES->getSymbol() << "'";
688 if (unsigned int TF = ES->getTargetFlags())
689 OS << " [TF=" << TF << ']';
690 } else if (const SrcValueSDNode *M = dyn_cast<SrcValueSDNode>(this)) {
691 if (M->getValue())
692 OS << "<" << M->getValue() << ">";
693 else
694 OS << "<null>";
695 } else if (const MDNodeSDNode *MD = dyn_cast<MDNodeSDNode>(this)) {
696 if (MD->getMD())
697 OS << "<" << MD->getMD() << ">";
698 else
699 OS << "<null>";
700 } else if (const VTSDNode *N = dyn_cast<VTSDNode>(this)) {
701 OS << ":" << N->getVT().getEVTString();
702 }
703 else if (const LoadSDNode *LD = dyn_cast<LoadSDNode>(this)) {
704 OS << "<";
705
706 printMemOperand(OS, *LD->getMemOperand(), G);
707
708 bool doExt = true;
709 switch (LD->getExtensionType()) {
710 default: doExt = false; break;
711 case ISD::EXTLOAD: OS << ", anyext"; break;
712 case ISD::SEXTLOAD: OS << ", sext"; break;
713 case ISD::ZEXTLOAD: OS << ", zext"; break;
714 }
715 if (doExt)
716 OS << " from " << LD->getMemoryVT().getEVTString();
717
718 const char *AM = getIndexedModeName(LD->getAddressingMode());
719 if (*AM)
720 OS << ", " << AM;
721
722 OS << ">";
723 } else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(this)) {
724 OS << "<";
725 printMemOperand(OS, *ST->getMemOperand(), G);
726
727 if (ST->isTruncatingStore())
728 OS << ", trunc to " << ST->getMemoryVT().getEVTString();
729
730 const char *AM = getIndexedModeName(ST->getAddressingMode());
731 if (*AM)
732 OS << ", " << AM;
733
734 OS << ">";
735 } else if (const MaskedLoadSDNode *MLd = dyn_cast<MaskedLoadSDNode>(this)) {
736 OS << "<";
737
738 printMemOperand(OS, *MLd->getMemOperand(), G);
739
740 bool doExt = true;
741 switch (MLd->getExtensionType()) {
742 default: doExt = false; break;
743 case ISD::EXTLOAD: OS << ", anyext"; break;
744 case ISD::SEXTLOAD: OS << ", sext"; break;
745 case ISD::ZEXTLOAD: OS << ", zext"; break;
746 }
747 if (doExt)
748 OS << " from " << MLd->getMemoryVT().getEVTString();
749
750 const char *AM = getIndexedModeName(MLd->getAddressingMode());
751 if (*AM)
752 OS << ", " << AM;
753
754 if (MLd->isExpandingLoad())
755 OS << ", expanding";
756
757 OS << ">";
758 } else if (const MaskedStoreSDNode *MSt = dyn_cast<MaskedStoreSDNode>(this)) {
759 OS << "<";
760 printMemOperand(OS, *MSt->getMemOperand(), G);
761
762 if (MSt->isTruncatingStore())
763 OS << ", trunc to " << MSt->getMemoryVT().getEVTString();
764
765 const char *AM = getIndexedModeName(MSt->getAddressingMode());
766 if (*AM)
767 OS << ", " << AM;
768
769 if (MSt->isCompressingStore())
770 OS << ", compressing";
771
772 OS << ">";
773 } else if (const auto *MGather = dyn_cast<MaskedGatherSDNode>(this)) {
774 OS << "<";
775 printMemOperand(OS, *MGather->getMemOperand(), G);
776
777 bool doExt = true;
778 switch (MGather->getExtensionType()) {
779 default: doExt = false; break;
780 case ISD::EXTLOAD: OS << ", anyext"; break;
781 case ISD::SEXTLOAD: OS << ", sext"; break;
782 case ISD::ZEXTLOAD: OS << ", zext"; break;
783 }
784 if (doExt)
785 OS << " from " << MGather->getMemoryVT().getEVTString();
786
787 auto Signed = MGather->isIndexSigned() ? "signed" : "unsigned";
788 auto Scaled = MGather->isIndexScaled() ? "scaled" : "unscaled";
789 OS << ", " << Signed << " " << Scaled << " offset";
790
791 OS << ">";
792 } else if (const auto *MScatter = dyn_cast<MaskedScatterSDNode>(this)) {
793 OS << "<";
794 printMemOperand(OS, *MScatter->getMemOperand(), G);
795
796 if (MScatter->isTruncatingStore())
797 OS << ", trunc to " << MScatter->getMemoryVT().getEVTString();
798
799 auto Signed = MScatter->isIndexSigned() ? "signed" : "unsigned";
800 auto Scaled = MScatter->isIndexScaled() ? "scaled" : "unscaled";
801 OS << ", " << Signed << " " << Scaled << " offset";
802
803 OS << ">";
804 } else if (const MemSDNode *M = dyn_cast<MemSDNode>(this)) {
805 OS << "<";
806 printMemOperand(OS, *M->getMemOperand(), G);
807 OS << ">";
808 } else if (const BlockAddressSDNode *BA =
809 dyn_cast<BlockAddressSDNode>(this)) {
810 int64_t offset = BA->getOffset();
811 OS << "<";
812 BA->getBlockAddress()->getFunction()->printAsOperand(OS, false);
813 OS << ", ";
814 BA->getBlockAddress()->getBasicBlock()->printAsOperand(OS, false);
815 OS << ">";
816 if (offset > 0)
817 OS << " + " << offset;
818 else
819 OS << " " << offset;
820 if (unsigned int TF = BA->getTargetFlags())
821 OS << " [TF=" << TF << ']';
822 } else if (const AddrSpaceCastSDNode *ASC =
823 dyn_cast<AddrSpaceCastSDNode>(this)) {
824 OS << '['
825 << ASC->getSrcAddressSpace()
826 << " -> "
827 << ASC->getDestAddressSpace()
828 << ']';
829 } else if (const LifetimeSDNode *LN = dyn_cast<LifetimeSDNode>(this)) {
830 if (LN->hasOffset())
831 OS << "<" << LN->getOffset() << " to " << LN->getOffset() + LN->getSize() << ">";
832 } else if (const auto *AA = dyn_cast<AssertAlignSDNode>(this)) {
833 OS << '<' << AA->getAlign().value() << '>';
834 }
835
836 if (VerboseDAGDumping) {
837 if (unsigned Order = getIROrder())
838 OS << " [ORD=" << Order << ']';
839
840 if (getNodeId() != -1)
841 OS << " [ID=" << getNodeId() << ']';
842 if (!(isa<ConstantSDNode>(this) || (isa<ConstantFPSDNode>(this))))
843 OS << " # D:" << isDivergent();
844
845 if (G && !G->GetDbgValues(this).empty()) {
846 OS << " [NoOfDbgValues=" << G->GetDbgValues(this).size() << ']';
847 for (SDDbgValue *Dbg : G->GetDbgValues(this))
848 if (!Dbg->isInvalidated())
849 Dbg->print(OS);
850 } else if (getHasDebugValue())
851 OS << " [NoOfDbgValues>0]";
852 }
853 }
854
print(raw_ostream & OS) const855 LLVM_DUMP_METHOD void SDDbgValue::print(raw_ostream &OS) const {
856 OS << " DbgVal(Order=" << getOrder() << ')';
857 if (isInvalidated())
858 OS << "(Invalidated)";
859 if (isEmitted())
860 OS << "(Emitted)";
861 OS << "(";
862 bool Comma = false;
863 for (const SDDbgOperand &Op : getLocationOps()) {
864 if (Comma)
865 OS << ", ";
866 switch (Op.getKind()) {
867 case SDDbgOperand::SDNODE:
868 if (Op.getSDNode())
869 OS << "SDNODE=" << PrintNodeId(*Op.getSDNode()) << ':' << Op.getResNo();
870 else
871 OS << "SDNODE";
872 break;
873 case SDDbgOperand::CONST:
874 OS << "CONST";
875 break;
876 case SDDbgOperand::FRAMEIX:
877 OS << "FRAMEIX=" << Op.getFrameIx();
878 break;
879 case SDDbgOperand::VREG:
880 OS << "VREG=" << Op.getVReg();
881 break;
882 }
883 Comma = true;
884 }
885 OS << ")";
886 if (isIndirect()) OS << "(Indirect)";
887 if (isVariadic())
888 OS << "(Variadic)";
889 OS << ":\"" << Var->getName() << '"';
890 #ifndef NDEBUG
891 if (Expr->getNumElements())
892 Expr->dump();
893 #endif
894 }
895
896 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
dump() const897 LLVM_DUMP_METHOD void SDDbgValue::dump() const {
898 if (isInvalidated())
899 return;
900 print(dbgs());
901 dbgs() << "\n";
902 }
903 #endif
904
905 /// Return true if this node is so simple that we should just print it inline
906 /// if it appears as an operand.
shouldPrintInline(const SDNode & Node,const SelectionDAG * G)907 static bool shouldPrintInline(const SDNode &Node, const SelectionDAG *G) {
908 // Avoid lots of cluttering when inline printing nodes with associated
909 // DbgValues in verbose mode.
910 if (VerboseDAGDumping && G && !G->GetDbgValues(&Node).empty())
911 return false;
912 if (Node.getOpcode() == ISD::EntryToken)
913 return false;
914 return Node.getNumOperands() == 0;
915 }
916
917 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
DumpNodes(const SDNode * N,unsigned indent,const SelectionDAG * G)918 static void DumpNodes(const SDNode *N, unsigned indent, const SelectionDAG *G) {
919 for (const SDValue &Op : N->op_values()) {
920 if (shouldPrintInline(*Op.getNode(), G))
921 continue;
922 if (Op.getNode()->hasOneUse())
923 DumpNodes(Op.getNode(), indent+2, G);
924 }
925
926 dbgs().indent(indent);
927 N->dump(G);
928 }
929
dump() const930 LLVM_DUMP_METHOD void SelectionDAG::dump() const {
931 dbgs() << "SelectionDAG has " << AllNodes.size() << " nodes:\n";
932
933 for (const SDNode &N : allnodes()) {
934 if (!N.hasOneUse() && &N != getRoot().getNode() &&
935 (!shouldPrintInline(N, this) || N.use_empty()))
936 DumpNodes(&N, 2, this);
937 }
938
939 if (getRoot().getNode()) DumpNodes(getRoot().getNode(), 2, this);
940 dbgs() << "\n";
941
942 if (VerboseDAGDumping) {
943 if (DbgBegin() != DbgEnd())
944 dbgs() << "SDDbgValues:\n";
945 for (auto *Dbg : make_range(DbgBegin(), DbgEnd()))
946 Dbg->dump();
947 if (ByvalParmDbgBegin() != ByvalParmDbgEnd())
948 dbgs() << "Byval SDDbgValues:\n";
949 for (auto *Dbg : make_range(ByvalParmDbgBegin(), ByvalParmDbgEnd()))
950 Dbg->dump();
951 }
952 dbgs() << "\n";
953 }
954 #endif
955
printr(raw_ostream & OS,const SelectionDAG * G) const956 void SDNode::printr(raw_ostream &OS, const SelectionDAG *G) const {
957 OS << PrintNodeId(*this) << ": ";
958 print_types(OS, G);
959 OS << " = " << getOperationName(G);
960 print_details(OS, G);
961 }
962
printOperand(raw_ostream & OS,const SelectionDAG * G,const SDValue Value)963 static bool printOperand(raw_ostream &OS, const SelectionDAG *G,
964 const SDValue Value) {
965 if (!Value.getNode()) {
966 OS << "<null>";
967 return false;
968 }
969
970 if (shouldPrintInline(*Value.getNode(), G)) {
971 OS << Value->getOperationName(G) << ':';
972 Value->print_types(OS, G);
973 Value->print_details(OS, G);
974 return true;
975 }
976
977 OS << PrintNodeId(*Value.getNode());
978 if (unsigned RN = Value.getResNo())
979 OS << ':' << RN;
980 return false;
981 }
982
983 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
984 using VisitedSDNodeSet = SmallPtrSet<const SDNode *, 32>;
985
DumpNodesr(raw_ostream & OS,const SDNode * N,unsigned indent,const SelectionDAG * G,VisitedSDNodeSet & once)986 static void DumpNodesr(raw_ostream &OS, const SDNode *N, unsigned indent,
987 const SelectionDAG *G, VisitedSDNodeSet &once) {
988 if (!once.insert(N).second) // If we've been here before, return now.
989 return;
990
991 // Dump the current SDNode, but don't end the line yet.
992 OS.indent(indent);
993 N->printr(OS, G);
994
995 // Having printed this SDNode, walk the children:
996 for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i) {
997 if (i) OS << ",";
998 OS << " ";
999
1000 const SDValue Op = N->getOperand(i);
1001 bool printedInline = printOperand(OS, G, Op);
1002 if (printedInline)
1003 once.insert(Op.getNode());
1004 }
1005
1006 OS << "\n";
1007
1008 // Dump children that have grandchildren on their own line(s).
1009 for (const SDValue &Op : N->op_values())
1010 DumpNodesr(OS, Op.getNode(), indent+2, G, once);
1011 }
1012
dumpr() const1013 LLVM_DUMP_METHOD void SDNode::dumpr() const {
1014 VisitedSDNodeSet once;
1015 DumpNodesr(dbgs(), this, 0, nullptr, once);
1016 }
1017
dumpr(const SelectionDAG * G) const1018 LLVM_DUMP_METHOD void SDNode::dumpr(const SelectionDAG *G) const {
1019 VisitedSDNodeSet once;
1020 DumpNodesr(dbgs(), this, 0, G, once);
1021 }
1022 #endif
1023
printrWithDepthHelper(raw_ostream & OS,const SDNode * N,const SelectionDAG * G,unsigned depth,unsigned indent)1024 static void printrWithDepthHelper(raw_ostream &OS, const SDNode *N,
1025 const SelectionDAG *G, unsigned depth,
1026 unsigned indent) {
1027 if (depth == 0)
1028 return;
1029
1030 OS.indent(indent);
1031
1032 N->print(OS, G);
1033
1034 for (const SDValue &Op : N->op_values()) {
1035 // Don't follow chain operands.
1036 if (Op.getValueType() == MVT::Other)
1037 continue;
1038 OS << '\n';
1039 printrWithDepthHelper(OS, Op.getNode(), G, depth - 1, indent + 2);
1040 }
1041 }
1042
printrWithDepth(raw_ostream & OS,const SelectionDAG * G,unsigned depth) const1043 void SDNode::printrWithDepth(raw_ostream &OS, const SelectionDAG *G,
1044 unsigned depth) const {
1045 printrWithDepthHelper(OS, this, G, depth, 0);
1046 }
1047
printrFull(raw_ostream & OS,const SelectionDAG * G) const1048 void SDNode::printrFull(raw_ostream &OS, const SelectionDAG *G) const {
1049 // Don't print impossibly deep things.
1050 printrWithDepth(OS, G, 10);
1051 }
1052
1053 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
1054 LLVM_DUMP_METHOD
dumprWithDepth(const SelectionDAG * G,unsigned depth) const1055 void SDNode::dumprWithDepth(const SelectionDAG *G, unsigned depth) const {
1056 printrWithDepth(dbgs(), G, depth);
1057 }
1058
dumprFull(const SelectionDAG * G) const1059 LLVM_DUMP_METHOD void SDNode::dumprFull(const SelectionDAG *G) const {
1060 // Don't print impossibly deep things.
1061 dumprWithDepth(G, 10);
1062 }
1063 #endif
1064
print(raw_ostream & OS,const SelectionDAG * G) const1065 void SDNode::print(raw_ostream &OS, const SelectionDAG *G) const {
1066 printr(OS, G);
1067 // Under VerboseDAGDumping divergence will be printed always.
1068 if (isDivergent() && !VerboseDAGDumping)
1069 OS << " # D:1";
1070 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
1071 if (i) OS << ", "; else OS << " ";
1072 printOperand(OS, G, getOperand(i));
1073 }
1074 if (DebugLoc DL = getDebugLoc()) {
1075 OS << ", ";
1076 DL.print(OS);
1077 }
1078 }
1079