1 //===- ELFObjectFile.cpp - ELF object file implementation -----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Part of the ELFObjectFile class implementation. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "llvm/Object/ELFObjectFile.h" 14 #include "llvm/BinaryFormat/ELF.h" 15 #include "llvm/MC/MCInstrAnalysis.h" 16 #include "llvm/MC/TargetRegistry.h" 17 #include "llvm/Object/ELF.h" 18 #include "llvm/Object/ELFTypes.h" 19 #include "llvm/Object/Error.h" 20 #include "llvm/Support/ARMAttributeParser.h" 21 #include "llvm/Support/ARMBuildAttributes.h" 22 #include "llvm/Support/ErrorHandling.h" 23 #include "llvm/Support/HexagonAttributeParser.h" 24 #include "llvm/Support/RISCVAttributeParser.h" 25 #include "llvm/Support/RISCVAttributes.h" 26 #include "llvm/TargetParser/RISCVISAInfo.h" 27 #include "llvm/TargetParser/SubtargetFeature.h" 28 #include "llvm/TargetParser/Triple.h" 29 #include <algorithm> 30 #include <cstddef> 31 #include <cstdint> 32 #include <memory> 33 #include <optional> 34 #include <string> 35 #include <utility> 36 37 using namespace llvm; 38 using namespace object; 39 40 const EnumEntry<unsigned> llvm::object::ElfSymbolTypes[NumElfSymbolTypes] = { 41 {"None", "NOTYPE", ELF::STT_NOTYPE}, 42 {"Object", "OBJECT", ELF::STT_OBJECT}, 43 {"Function", "FUNC", ELF::STT_FUNC}, 44 {"Section", "SECTION", ELF::STT_SECTION}, 45 {"File", "FILE", ELF::STT_FILE}, 46 {"Common", "COMMON", ELF::STT_COMMON}, 47 {"TLS", "TLS", ELF::STT_TLS}, 48 {"Unknown", "<unknown>: 7", 7}, 49 {"Unknown", "<unknown>: 8", 8}, 50 {"Unknown", "<unknown>: 9", 9}, 51 {"GNU_IFunc", "IFUNC", ELF::STT_GNU_IFUNC}, 52 {"OS Specific", "<OS specific>: 11", 11}, 53 {"OS Specific", "<OS specific>: 12", 12}, 54 {"Proc Specific", "<processor specific>: 13", 13}, 55 {"Proc Specific", "<processor specific>: 14", 14}, 56 {"Proc Specific", "<processor specific>: 15", 15} 57 }; 58 59 ELFObjectFileBase::ELFObjectFileBase(unsigned int Type, MemoryBufferRef Source) 60 : ObjectFile(Type, Source) {} 61 62 template <class ELFT> 63 static Expected<std::unique_ptr<ELFObjectFile<ELFT>>> 64 createPtr(MemoryBufferRef Object, bool InitContent) { 65 auto Ret = ELFObjectFile<ELFT>::create(Object, InitContent); 66 if (Error E = Ret.takeError()) 67 return std::move(E); 68 return std::make_unique<ELFObjectFile<ELFT>>(std::move(*Ret)); 69 } 70 71 Expected<std::unique_ptr<ObjectFile>> 72 ObjectFile::createELFObjectFile(MemoryBufferRef Obj, bool InitContent) { 73 std::pair<unsigned char, unsigned char> Ident = 74 getElfArchType(Obj.getBuffer()); 75 std::size_t MaxAlignment = 76 1ULL << llvm::countr_zero( 77 reinterpret_cast<uintptr_t>(Obj.getBufferStart())); 78 79 if (MaxAlignment < 2) 80 return createError("Insufficient alignment"); 81 82 if (Ident.first == ELF::ELFCLASS32) { 83 if (Ident.second == ELF::ELFDATA2LSB) 84 return createPtr<ELF32LE>(Obj, InitContent); 85 else if (Ident.second == ELF::ELFDATA2MSB) 86 return createPtr<ELF32BE>(Obj, InitContent); 87 else 88 return createError("Invalid ELF data"); 89 } else if (Ident.first == ELF::ELFCLASS64) { 90 if (Ident.second == ELF::ELFDATA2LSB) 91 return createPtr<ELF64LE>(Obj, InitContent); 92 else if (Ident.second == ELF::ELFDATA2MSB) 93 return createPtr<ELF64BE>(Obj, InitContent); 94 else 95 return createError("Invalid ELF data"); 96 } 97 return createError("Invalid ELF class"); 98 } 99 100 SubtargetFeatures ELFObjectFileBase::getMIPSFeatures() const { 101 SubtargetFeatures Features; 102 unsigned PlatformFlags = getPlatformFlags(); 103 104 switch (PlatformFlags & ELF::EF_MIPS_ARCH) { 105 case ELF::EF_MIPS_ARCH_1: 106 break; 107 case ELF::EF_MIPS_ARCH_2: 108 Features.AddFeature("mips2"); 109 break; 110 case ELF::EF_MIPS_ARCH_3: 111 Features.AddFeature("mips3"); 112 break; 113 case ELF::EF_MIPS_ARCH_4: 114 Features.AddFeature("mips4"); 115 break; 116 case ELF::EF_MIPS_ARCH_5: 117 Features.AddFeature("mips5"); 118 break; 119 case ELF::EF_MIPS_ARCH_32: 120 Features.AddFeature("mips32"); 121 break; 122 case ELF::EF_MIPS_ARCH_64: 123 Features.AddFeature("mips64"); 124 break; 125 case ELF::EF_MIPS_ARCH_32R2: 126 Features.AddFeature("mips32r2"); 127 break; 128 case ELF::EF_MIPS_ARCH_64R2: 129 Features.AddFeature("mips64r2"); 130 break; 131 case ELF::EF_MIPS_ARCH_32R6: 132 Features.AddFeature("mips32r6"); 133 break; 134 case ELF::EF_MIPS_ARCH_64R6: 135 Features.AddFeature("mips64r6"); 136 break; 137 default: 138 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 139 } 140 141 switch (PlatformFlags & ELF::EF_MIPS_MACH) { 142 case ELF::EF_MIPS_MACH_NONE: 143 // No feature associated with this value. 144 break; 145 case ELF::EF_MIPS_MACH_OCTEON: 146 Features.AddFeature("cnmips"); 147 break; 148 default: 149 llvm_unreachable("Unknown EF_MIPS_ARCH value"); 150 } 151 152 if (PlatformFlags & ELF::EF_MIPS_ARCH_ASE_M16) 153 Features.AddFeature("mips16"); 154 if (PlatformFlags & ELF::EF_MIPS_MICROMIPS) 155 Features.AddFeature("micromips"); 156 157 return Features; 158 } 159 160 SubtargetFeatures ELFObjectFileBase::getARMFeatures() const { 161 SubtargetFeatures Features; 162 ARMAttributeParser Attributes; 163 if (Error E = getBuildAttributes(Attributes)) { 164 consumeError(std::move(E)); 165 return SubtargetFeatures(); 166 } 167 168 // both ARMv7-M and R have to support thumb hardware div 169 bool isV7 = false; 170 std::optional<unsigned> Attr = 171 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 172 if (Attr) 173 isV7 = *Attr == ARMBuildAttrs::v7; 174 175 Attr = Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 176 if (Attr) { 177 switch (*Attr) { 178 case ARMBuildAttrs::ApplicationProfile: 179 Features.AddFeature("aclass"); 180 break; 181 case ARMBuildAttrs::RealTimeProfile: 182 Features.AddFeature("rclass"); 183 if (isV7) 184 Features.AddFeature("hwdiv"); 185 break; 186 case ARMBuildAttrs::MicroControllerProfile: 187 Features.AddFeature("mclass"); 188 if (isV7) 189 Features.AddFeature("hwdiv"); 190 break; 191 } 192 } 193 194 Attr = Attributes.getAttributeValue(ARMBuildAttrs::THUMB_ISA_use); 195 if (Attr) { 196 switch (*Attr) { 197 default: 198 break; 199 case ARMBuildAttrs::Not_Allowed: 200 Features.AddFeature("thumb", false); 201 Features.AddFeature("thumb2", false); 202 break; 203 case ARMBuildAttrs::AllowThumb32: 204 Features.AddFeature("thumb2"); 205 break; 206 } 207 } 208 209 Attr = Attributes.getAttributeValue(ARMBuildAttrs::FP_arch); 210 if (Attr) { 211 switch (*Attr) { 212 default: 213 break; 214 case ARMBuildAttrs::Not_Allowed: 215 Features.AddFeature("vfp2sp", false); 216 Features.AddFeature("vfp3d16sp", false); 217 Features.AddFeature("vfp4d16sp", false); 218 break; 219 case ARMBuildAttrs::AllowFPv2: 220 Features.AddFeature("vfp2"); 221 break; 222 case ARMBuildAttrs::AllowFPv3A: 223 case ARMBuildAttrs::AllowFPv3B: 224 Features.AddFeature("vfp3"); 225 break; 226 case ARMBuildAttrs::AllowFPv4A: 227 case ARMBuildAttrs::AllowFPv4B: 228 Features.AddFeature("vfp4"); 229 break; 230 } 231 } 232 233 Attr = Attributes.getAttributeValue(ARMBuildAttrs::Advanced_SIMD_arch); 234 if (Attr) { 235 switch (*Attr) { 236 default: 237 break; 238 case ARMBuildAttrs::Not_Allowed: 239 Features.AddFeature("neon", false); 240 Features.AddFeature("fp16", false); 241 break; 242 case ARMBuildAttrs::AllowNeon: 243 Features.AddFeature("neon"); 244 break; 245 case ARMBuildAttrs::AllowNeon2: 246 Features.AddFeature("neon"); 247 Features.AddFeature("fp16"); 248 break; 249 } 250 } 251 252 Attr = Attributes.getAttributeValue(ARMBuildAttrs::MVE_arch); 253 if (Attr) { 254 switch (*Attr) { 255 default: 256 break; 257 case ARMBuildAttrs::Not_Allowed: 258 Features.AddFeature("mve", false); 259 Features.AddFeature("mve.fp", false); 260 break; 261 case ARMBuildAttrs::AllowMVEInteger: 262 Features.AddFeature("mve.fp", false); 263 Features.AddFeature("mve"); 264 break; 265 case ARMBuildAttrs::AllowMVEIntegerAndFloat: 266 Features.AddFeature("mve.fp"); 267 break; 268 } 269 } 270 271 Attr = Attributes.getAttributeValue(ARMBuildAttrs::DIV_use); 272 if (Attr) { 273 switch (*Attr) { 274 default: 275 break; 276 case ARMBuildAttrs::DisallowDIV: 277 Features.AddFeature("hwdiv", false); 278 Features.AddFeature("hwdiv-arm", false); 279 break; 280 case ARMBuildAttrs::AllowDIVExt: 281 Features.AddFeature("hwdiv"); 282 Features.AddFeature("hwdiv-arm"); 283 break; 284 } 285 } 286 287 return Features; 288 } 289 290 static std::optional<std::string> hexagonAttrToFeatureString(unsigned Attr) { 291 switch (Attr) { 292 case 5: 293 return "v5"; 294 case 55: 295 return "v55"; 296 case 60: 297 return "v60"; 298 case 62: 299 return "v62"; 300 case 65: 301 return "v65"; 302 case 67: 303 return "v67"; 304 case 68: 305 return "v68"; 306 case 69: 307 return "v69"; 308 case 71: 309 return "v71"; 310 case 73: 311 return "v73"; 312 case 75: 313 return "v75"; 314 default: 315 return {}; 316 } 317 } 318 319 SubtargetFeatures ELFObjectFileBase::getHexagonFeatures() const { 320 SubtargetFeatures Features; 321 HexagonAttributeParser Parser; 322 if (Error E = getBuildAttributes(Parser)) { 323 // Return no attributes if none can be read. 324 // This behavior is important for backwards compatibility. 325 consumeError(std::move(E)); 326 return Features; 327 } 328 std::optional<unsigned> Attr; 329 330 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ARCH))) { 331 if (std::optional<std::string> FeatureString = 332 hexagonAttrToFeatureString(*Attr)) 333 Features.AddFeature(*FeatureString); 334 } 335 336 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXARCH))) { 337 std::optional<std::string> FeatureString = 338 hexagonAttrToFeatureString(*Attr); 339 // There is no corresponding hvx arch for v5 and v55. 340 if (FeatureString && *Attr >= 60) 341 Features.AddFeature("hvx" + *FeatureString); 342 } 343 344 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXIEEEFP))) 345 if (*Attr) 346 Features.AddFeature("hvx-ieee-fp"); 347 348 if ((Attr = Parser.getAttributeValue(HexagonAttrs::HVXQFLOAT))) 349 if (*Attr) 350 Features.AddFeature("hvx-qfloat"); 351 352 if ((Attr = Parser.getAttributeValue(HexagonAttrs::ZREG))) 353 if (*Attr) 354 Features.AddFeature("zreg"); 355 356 if ((Attr = Parser.getAttributeValue(HexagonAttrs::AUDIO))) 357 if (*Attr) 358 Features.AddFeature("audio"); 359 360 if ((Attr = Parser.getAttributeValue(HexagonAttrs::CABAC))) 361 if (*Attr) 362 Features.AddFeature("cabac"); 363 364 return Features; 365 } 366 367 Expected<SubtargetFeatures> ELFObjectFileBase::getRISCVFeatures() const { 368 SubtargetFeatures Features; 369 unsigned PlatformFlags = getPlatformFlags(); 370 371 if (PlatformFlags & ELF::EF_RISCV_RVC) { 372 Features.AddFeature("zca"); 373 } 374 375 RISCVAttributeParser Attributes; 376 if (Error E = getBuildAttributes(Attributes)) { 377 return std::move(E); 378 } 379 380 std::optional<StringRef> Attr = 381 Attributes.getAttributeString(RISCVAttrs::ARCH); 382 if (Attr) { 383 auto ParseResult = RISCVISAInfo::parseNormalizedArchString(*Attr); 384 if (!ParseResult) 385 return ParseResult.takeError(); 386 auto &ISAInfo = *ParseResult; 387 388 if (ISAInfo->getXLen() == 32) 389 Features.AddFeature("64bit", false); 390 else if (ISAInfo->getXLen() == 64) 391 Features.AddFeature("64bit"); 392 else 393 llvm_unreachable("XLEN should be 32 or 64."); 394 395 Features.addFeaturesVector(ISAInfo->toFeatures()); 396 } 397 398 return Features; 399 } 400 401 SubtargetFeatures ELFObjectFileBase::getLoongArchFeatures() const { 402 SubtargetFeatures Features; 403 404 switch (getPlatformFlags() & ELF::EF_LOONGARCH_ABI_MODIFIER_MASK) { 405 case ELF::EF_LOONGARCH_ABI_SOFT_FLOAT: 406 break; 407 case ELF::EF_LOONGARCH_ABI_DOUBLE_FLOAT: 408 Features.AddFeature("d"); 409 // D implies F according to LoongArch ISA spec. 410 [[fallthrough]]; 411 case ELF::EF_LOONGARCH_ABI_SINGLE_FLOAT: 412 Features.AddFeature("f"); 413 break; 414 } 415 416 return Features; 417 } 418 419 Expected<SubtargetFeatures> ELFObjectFileBase::getFeatures() const { 420 switch (getEMachine()) { 421 case ELF::EM_MIPS: 422 return getMIPSFeatures(); 423 case ELF::EM_ARM: 424 return getARMFeatures(); 425 case ELF::EM_RISCV: 426 return getRISCVFeatures(); 427 case ELF::EM_LOONGARCH: 428 return getLoongArchFeatures(); 429 case ELF::EM_HEXAGON: 430 return getHexagonFeatures(); 431 default: 432 return SubtargetFeatures(); 433 } 434 } 435 436 std::optional<StringRef> ELFObjectFileBase::tryGetCPUName() const { 437 switch (getEMachine()) { 438 case ELF::EM_AMDGPU: 439 return getAMDGPUCPUName(); 440 case ELF::EM_CUDA: 441 return getNVPTXCPUName(); 442 case ELF::EM_PPC: 443 case ELF::EM_PPC64: 444 return StringRef("future"); 445 case ELF::EM_BPF: 446 return StringRef("v4"); 447 default: 448 return std::nullopt; 449 } 450 } 451 452 StringRef ELFObjectFileBase::getAMDGPUCPUName() const { 453 assert(getEMachine() == ELF::EM_AMDGPU); 454 unsigned CPU = getPlatformFlags() & ELF::EF_AMDGPU_MACH; 455 456 switch (CPU) { 457 // Radeon HD 2000/3000 Series (R600). 458 case ELF::EF_AMDGPU_MACH_R600_R600: 459 return "r600"; 460 case ELF::EF_AMDGPU_MACH_R600_R630: 461 return "r630"; 462 case ELF::EF_AMDGPU_MACH_R600_RS880: 463 return "rs880"; 464 case ELF::EF_AMDGPU_MACH_R600_RV670: 465 return "rv670"; 466 467 // Radeon HD 4000 Series (R700). 468 case ELF::EF_AMDGPU_MACH_R600_RV710: 469 return "rv710"; 470 case ELF::EF_AMDGPU_MACH_R600_RV730: 471 return "rv730"; 472 case ELF::EF_AMDGPU_MACH_R600_RV770: 473 return "rv770"; 474 475 // Radeon HD 5000 Series (Evergreen). 476 case ELF::EF_AMDGPU_MACH_R600_CEDAR: 477 return "cedar"; 478 case ELF::EF_AMDGPU_MACH_R600_CYPRESS: 479 return "cypress"; 480 case ELF::EF_AMDGPU_MACH_R600_JUNIPER: 481 return "juniper"; 482 case ELF::EF_AMDGPU_MACH_R600_REDWOOD: 483 return "redwood"; 484 case ELF::EF_AMDGPU_MACH_R600_SUMO: 485 return "sumo"; 486 487 // Radeon HD 6000 Series (Northern Islands). 488 case ELF::EF_AMDGPU_MACH_R600_BARTS: 489 return "barts"; 490 case ELF::EF_AMDGPU_MACH_R600_CAICOS: 491 return "caicos"; 492 case ELF::EF_AMDGPU_MACH_R600_CAYMAN: 493 return "cayman"; 494 case ELF::EF_AMDGPU_MACH_R600_TURKS: 495 return "turks"; 496 497 // AMDGCN GFX6. 498 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX600: 499 return "gfx600"; 500 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX601: 501 return "gfx601"; 502 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX602: 503 return "gfx602"; 504 505 // AMDGCN GFX7. 506 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX700: 507 return "gfx700"; 508 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX701: 509 return "gfx701"; 510 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX702: 511 return "gfx702"; 512 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX703: 513 return "gfx703"; 514 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX704: 515 return "gfx704"; 516 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX705: 517 return "gfx705"; 518 519 // AMDGCN GFX8. 520 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX801: 521 return "gfx801"; 522 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX802: 523 return "gfx802"; 524 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX803: 525 return "gfx803"; 526 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX805: 527 return "gfx805"; 528 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX810: 529 return "gfx810"; 530 531 // AMDGCN GFX9. 532 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX900: 533 return "gfx900"; 534 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX902: 535 return "gfx902"; 536 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX904: 537 return "gfx904"; 538 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX906: 539 return "gfx906"; 540 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX908: 541 return "gfx908"; 542 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX909: 543 return "gfx909"; 544 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90A: 545 return "gfx90a"; 546 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX90C: 547 return "gfx90c"; 548 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX940: 549 return "gfx940"; 550 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX941: 551 return "gfx941"; 552 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX942: 553 return "gfx942"; 554 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX950: 555 return "gfx950"; 556 557 // AMDGCN GFX10. 558 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1010: 559 return "gfx1010"; 560 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1011: 561 return "gfx1011"; 562 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1012: 563 return "gfx1012"; 564 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1013: 565 return "gfx1013"; 566 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1030: 567 return "gfx1030"; 568 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1031: 569 return "gfx1031"; 570 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1032: 571 return "gfx1032"; 572 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1033: 573 return "gfx1033"; 574 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1034: 575 return "gfx1034"; 576 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1035: 577 return "gfx1035"; 578 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1036: 579 return "gfx1036"; 580 581 // AMDGCN GFX11. 582 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1100: 583 return "gfx1100"; 584 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1101: 585 return "gfx1101"; 586 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1102: 587 return "gfx1102"; 588 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1103: 589 return "gfx1103"; 590 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1150: 591 return "gfx1150"; 592 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1151: 593 return "gfx1151"; 594 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1152: 595 return "gfx1152"; 596 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1153: 597 return "gfx1153"; 598 599 // AMDGCN GFX12. 600 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1200: 601 return "gfx1200"; 602 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX1201: 603 return "gfx1201"; 604 605 // Generic AMDGCN targets 606 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_GENERIC: 607 return "gfx9-generic"; 608 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX9_4_GENERIC: 609 return "gfx9-4-generic"; 610 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_1_GENERIC: 611 return "gfx10-1-generic"; 612 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX10_3_GENERIC: 613 return "gfx10-3-generic"; 614 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX11_GENERIC: 615 return "gfx11-generic"; 616 case ELF::EF_AMDGPU_MACH_AMDGCN_GFX12_GENERIC: 617 return "gfx12-generic"; 618 default: 619 llvm_unreachable("Unknown EF_AMDGPU_MACH value"); 620 } 621 } 622 623 StringRef ELFObjectFileBase::getNVPTXCPUName() const { 624 assert(getEMachine() == ELF::EM_CUDA); 625 unsigned SM = getPlatformFlags() & ELF::EF_CUDA_SM; 626 627 switch (SM) { 628 // Fermi architecture. 629 case ELF::EF_CUDA_SM20: 630 return "sm_20"; 631 case ELF::EF_CUDA_SM21: 632 return "sm_21"; 633 634 // Kepler architecture. 635 case ELF::EF_CUDA_SM30: 636 return "sm_30"; 637 case ELF::EF_CUDA_SM32: 638 return "sm_32"; 639 case ELF::EF_CUDA_SM35: 640 return "sm_35"; 641 case ELF::EF_CUDA_SM37: 642 return "sm_37"; 643 644 // Maxwell architecture. 645 case ELF::EF_CUDA_SM50: 646 return "sm_50"; 647 case ELF::EF_CUDA_SM52: 648 return "sm_52"; 649 case ELF::EF_CUDA_SM53: 650 return "sm_53"; 651 652 // Pascal architecture. 653 case ELF::EF_CUDA_SM60: 654 return "sm_60"; 655 case ELF::EF_CUDA_SM61: 656 return "sm_61"; 657 case ELF::EF_CUDA_SM62: 658 return "sm_62"; 659 660 // Volta architecture. 661 case ELF::EF_CUDA_SM70: 662 return "sm_70"; 663 case ELF::EF_CUDA_SM72: 664 return "sm_72"; 665 666 // Turing architecture. 667 case ELF::EF_CUDA_SM75: 668 return "sm_75"; 669 670 // Ampere architecture. 671 case ELF::EF_CUDA_SM80: 672 return "sm_80"; 673 case ELF::EF_CUDA_SM86: 674 return "sm_86"; 675 case ELF::EF_CUDA_SM87: 676 return "sm_87"; 677 678 // Ada architecture. 679 case ELF::EF_CUDA_SM89: 680 return "sm_89"; 681 682 // Hopper architecture. 683 case ELF::EF_CUDA_SM90: 684 return getPlatformFlags() & ELF::EF_CUDA_ACCELERATORS ? "sm_90a" : "sm_90"; 685 default: 686 llvm_unreachable("Unknown EF_CUDA_SM value"); 687 } 688 } 689 690 // FIXME Encode from a tablegen description or target parser. 691 void ELFObjectFileBase::setARMSubArch(Triple &TheTriple) const { 692 if (TheTriple.getSubArch() != Triple::NoSubArch) 693 return; 694 695 ARMAttributeParser Attributes; 696 if (Error E = getBuildAttributes(Attributes)) { 697 // TODO Propagate Error. 698 consumeError(std::move(E)); 699 return; 700 } 701 702 std::string Triple; 703 // Default to ARM, but use the triple if it's been set. 704 if (TheTriple.isThumb()) 705 Triple = "thumb"; 706 else 707 Triple = "arm"; 708 709 std::optional<unsigned> Attr = 710 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch); 711 if (Attr) { 712 switch (*Attr) { 713 case ARMBuildAttrs::v4: 714 Triple += "v4"; 715 break; 716 case ARMBuildAttrs::v4T: 717 Triple += "v4t"; 718 break; 719 case ARMBuildAttrs::v5T: 720 Triple += "v5t"; 721 break; 722 case ARMBuildAttrs::v5TE: 723 Triple += "v5te"; 724 break; 725 case ARMBuildAttrs::v5TEJ: 726 Triple += "v5tej"; 727 break; 728 case ARMBuildAttrs::v6: 729 Triple += "v6"; 730 break; 731 case ARMBuildAttrs::v6KZ: 732 Triple += "v6kz"; 733 break; 734 case ARMBuildAttrs::v6T2: 735 Triple += "v6t2"; 736 break; 737 case ARMBuildAttrs::v6K: 738 Triple += "v6k"; 739 break; 740 case ARMBuildAttrs::v7: { 741 std::optional<unsigned> ArchProfileAttr = 742 Attributes.getAttributeValue(ARMBuildAttrs::CPU_arch_profile); 743 if (ArchProfileAttr && 744 *ArchProfileAttr == ARMBuildAttrs::MicroControllerProfile) 745 Triple += "v7m"; 746 else 747 Triple += "v7"; 748 break; 749 } 750 case ARMBuildAttrs::v6_M: 751 Triple += "v6m"; 752 break; 753 case ARMBuildAttrs::v6S_M: 754 Triple += "v6sm"; 755 break; 756 case ARMBuildAttrs::v7E_M: 757 Triple += "v7em"; 758 break; 759 case ARMBuildAttrs::v8_A: 760 Triple += "v8a"; 761 break; 762 case ARMBuildAttrs::v8_R: 763 Triple += "v8r"; 764 break; 765 case ARMBuildAttrs::v8_M_Base: 766 Triple += "v8m.base"; 767 break; 768 case ARMBuildAttrs::v8_M_Main: 769 Triple += "v8m.main"; 770 break; 771 case ARMBuildAttrs::v8_1_M_Main: 772 Triple += "v8.1m.main"; 773 break; 774 case ARMBuildAttrs::v9_A: 775 Triple += "v9a"; 776 break; 777 } 778 } 779 if (!isLittleEndian()) 780 Triple += "eb"; 781 782 TheTriple.setArchName(Triple); 783 } 784 785 std::vector<ELFPltEntry> ELFObjectFileBase::getPltEntries() const { 786 std::string Err; 787 const auto Triple = makeTriple(); 788 const auto *T = TargetRegistry::lookupTarget(Triple.str(), Err); 789 if (!T) 790 return {}; 791 uint32_t JumpSlotReloc = 0, GlobDatReloc = 0; 792 switch (Triple.getArch()) { 793 case Triple::x86: 794 JumpSlotReloc = ELF::R_386_JUMP_SLOT; 795 GlobDatReloc = ELF::R_386_GLOB_DAT; 796 break; 797 case Triple::x86_64: 798 JumpSlotReloc = ELF::R_X86_64_JUMP_SLOT; 799 GlobDatReloc = ELF::R_X86_64_GLOB_DAT; 800 break; 801 case Triple::aarch64: 802 case Triple::aarch64_be: 803 JumpSlotReloc = ELF::R_AARCH64_JUMP_SLOT; 804 break; 805 case Triple::hexagon: 806 JumpSlotReloc = ELF::R_HEX_JMP_SLOT; 807 GlobDatReloc = ELF::R_HEX_GLOB_DAT; 808 break; 809 default: 810 return {}; 811 } 812 std::unique_ptr<const MCInstrInfo> MII(T->createMCInstrInfo()); 813 std::unique_ptr<const MCInstrAnalysis> MIA( 814 T->createMCInstrAnalysis(MII.get())); 815 if (!MIA) 816 return {}; 817 std::vector<std::pair<uint64_t, uint64_t>> PltEntries; 818 std::optional<SectionRef> RelaPlt, RelaDyn; 819 uint64_t GotBaseVA = 0; 820 for (const SectionRef &Section : sections()) { 821 Expected<StringRef> NameOrErr = Section.getName(); 822 if (!NameOrErr) { 823 consumeError(NameOrErr.takeError()); 824 continue; 825 } 826 StringRef Name = *NameOrErr; 827 828 if (Name == ".rela.plt" || Name == ".rel.plt") { 829 RelaPlt = Section; 830 } else if (Name == ".rela.dyn" || Name == ".rel.dyn") { 831 RelaDyn = Section; 832 } else if (Name == ".got.plt") { 833 GotBaseVA = Section.getAddress(); 834 } else if (Name == ".plt" || Name == ".plt.got") { 835 Expected<StringRef> PltContents = Section.getContents(); 836 if (!PltContents) { 837 consumeError(PltContents.takeError()); 838 return {}; 839 } 840 llvm::append_range( 841 PltEntries, 842 MIA->findPltEntries(Section.getAddress(), 843 arrayRefFromStringRef(*PltContents), Triple)); 844 } 845 } 846 847 // Build a map from GOT entry virtual address to PLT entry virtual address. 848 DenseMap<uint64_t, uint64_t> GotToPlt; 849 for (auto [Plt, GotPlt] : PltEntries) { 850 uint64_t GotPltEntry = GotPlt; 851 // An x86-32 PIC PLT uses jmp DWORD PTR [ebx-offset]. Add 852 // _GLOBAL_OFFSET_TABLE_ (EBX) to get the .got.plt (or .got) entry address. 853 // See X86MCTargetDesc.cpp:findPltEntries for the 1 << 32 bit. 854 if (GotPltEntry & (uint64_t(1) << 32) && getEMachine() == ELF::EM_386) 855 GotPltEntry = static_cast<int32_t>(GotPltEntry) + GotBaseVA; 856 GotToPlt.insert(std::make_pair(GotPltEntry, Plt)); 857 } 858 859 // Find the relocations in the dynamic relocation table that point to 860 // locations in the GOT for which we know the corresponding PLT entry. 861 std::vector<ELFPltEntry> Result; 862 auto handleRels = [&](iterator_range<relocation_iterator> Rels, 863 uint32_t RelType, StringRef PltSec) { 864 for (const auto &R : Rels) { 865 if (R.getType() != RelType) 866 continue; 867 auto PltEntryIter = GotToPlt.find(R.getOffset()); 868 if (PltEntryIter != GotToPlt.end()) { 869 symbol_iterator Sym = R.getSymbol(); 870 if (Sym == symbol_end()) 871 Result.push_back( 872 ELFPltEntry{PltSec, std::nullopt, PltEntryIter->second}); 873 else 874 Result.push_back(ELFPltEntry{PltSec, Sym->getRawDataRefImpl(), 875 PltEntryIter->second}); 876 } 877 } 878 }; 879 880 if (RelaPlt) 881 handleRels(RelaPlt->relocations(), JumpSlotReloc, ".plt"); 882 883 // If a symbol needing a PLT entry also needs a GLOB_DAT relocation, GNU ld's 884 // x86 port places the PLT entry in the .plt.got section. 885 if (RelaDyn) 886 handleRels(RelaDyn->relocations(), GlobDatReloc, ".plt.got"); 887 888 return Result; 889 } 890 891 template <class ELFT> 892 Expected<std::vector<BBAddrMap>> static readBBAddrMapImpl( 893 const ELFFile<ELFT> &EF, std::optional<unsigned> TextSectionIndex, 894 std::vector<PGOAnalysisMap> *PGOAnalyses) { 895 using Elf_Shdr = typename ELFT::Shdr; 896 bool IsRelocatable = EF.getHeader().e_type == ELF::ET_REL; 897 std::vector<BBAddrMap> BBAddrMaps; 898 if (PGOAnalyses) 899 PGOAnalyses->clear(); 900 901 const auto &Sections = cantFail(EF.sections()); 902 auto IsMatch = [&](const Elf_Shdr &Sec) -> Expected<bool> { 903 if (Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP && 904 Sec.sh_type != ELF::SHT_LLVM_BB_ADDR_MAP_V0) 905 return false; 906 if (!TextSectionIndex) 907 return true; 908 Expected<const Elf_Shdr *> TextSecOrErr = EF.getSection(Sec.sh_link); 909 if (!TextSecOrErr) 910 return createError("unable to get the linked-to section for " + 911 describe(EF, Sec) + ": " + 912 toString(TextSecOrErr.takeError())); 913 assert(*TextSecOrErr >= Sections.begin() && 914 "Text section pointer outside of bounds"); 915 if (*TextSectionIndex != 916 (unsigned)std::distance(Sections.begin(), *TextSecOrErr)) 917 return false; 918 return true; 919 }; 920 921 Expected<MapVector<const Elf_Shdr *, const Elf_Shdr *>> SectionRelocMapOrErr = 922 EF.getSectionAndRelocations(IsMatch); 923 if (!SectionRelocMapOrErr) 924 return SectionRelocMapOrErr.takeError(); 925 926 for (auto const &[Sec, RelocSec] : *SectionRelocMapOrErr) { 927 if (IsRelocatable && !RelocSec) 928 return createError("unable to get relocation section for " + 929 describe(EF, *Sec)); 930 Expected<std::vector<BBAddrMap>> BBAddrMapOrErr = 931 EF.decodeBBAddrMap(*Sec, RelocSec, PGOAnalyses); 932 if (!BBAddrMapOrErr) { 933 if (PGOAnalyses) 934 PGOAnalyses->clear(); 935 return createError("unable to read " + describe(EF, *Sec) + ": " + 936 toString(BBAddrMapOrErr.takeError())); 937 } 938 std::move(BBAddrMapOrErr->begin(), BBAddrMapOrErr->end(), 939 std::back_inserter(BBAddrMaps)); 940 } 941 if (PGOAnalyses) 942 assert(PGOAnalyses->size() == BBAddrMaps.size() && 943 "The same number of BBAddrMaps and PGOAnalysisMaps should be " 944 "returned when PGO information is requested"); 945 return BBAddrMaps; 946 } 947 948 template <class ELFT> 949 static Expected<std::vector<VersionEntry>> 950 readDynsymVersionsImpl(const ELFFile<ELFT> &EF, 951 ELFObjectFileBase::elf_symbol_iterator_range Symbols) { 952 using Elf_Shdr = typename ELFT::Shdr; 953 const Elf_Shdr *VerSec = nullptr; 954 const Elf_Shdr *VerNeedSec = nullptr; 955 const Elf_Shdr *VerDefSec = nullptr; 956 // The user should ensure sections() can't fail here. 957 for (const Elf_Shdr &Sec : cantFail(EF.sections())) { 958 if (Sec.sh_type == ELF::SHT_GNU_versym) 959 VerSec = &Sec; 960 else if (Sec.sh_type == ELF::SHT_GNU_verdef) 961 VerDefSec = &Sec; 962 else if (Sec.sh_type == ELF::SHT_GNU_verneed) 963 VerNeedSec = &Sec; 964 } 965 if (!VerSec) 966 return std::vector<VersionEntry>(); 967 968 Expected<SmallVector<std::optional<VersionEntry>, 0>> MapOrErr = 969 EF.loadVersionMap(VerNeedSec, VerDefSec); 970 if (!MapOrErr) 971 return MapOrErr.takeError(); 972 973 std::vector<VersionEntry> Ret; 974 size_t I = 0; 975 for (const ELFSymbolRef &Sym : Symbols) { 976 ++I; 977 Expected<const typename ELFT::Versym *> VerEntryOrErr = 978 EF.template getEntry<typename ELFT::Versym>(*VerSec, I); 979 if (!VerEntryOrErr) 980 return createError("unable to read an entry with index " + Twine(I) + 981 " from " + describe(EF, *VerSec) + ": " + 982 toString(VerEntryOrErr.takeError())); 983 984 Expected<uint32_t> FlagsOrErr = Sym.getFlags(); 985 if (!FlagsOrErr) 986 return createError("unable to read flags for symbol with index " + 987 Twine(I) + ": " + toString(FlagsOrErr.takeError())); 988 989 bool IsDefault; 990 Expected<StringRef> VerOrErr = EF.getSymbolVersionByIndex( 991 (*VerEntryOrErr)->vs_index, IsDefault, *MapOrErr, 992 (*FlagsOrErr) & SymbolRef::SF_Undefined); 993 if (!VerOrErr) 994 return createError("unable to get a version for entry " + Twine(I) + 995 " of " + describe(EF, *VerSec) + ": " + 996 toString(VerOrErr.takeError())); 997 998 Ret.push_back({(*VerOrErr).str(), IsDefault}); 999 } 1000 1001 return Ret; 1002 } 1003 1004 Expected<std::vector<VersionEntry>> 1005 ELFObjectFileBase::readDynsymVersions() const { 1006 elf_symbol_iterator_range Symbols = getDynamicSymbolIterators(); 1007 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1008 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1009 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1010 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1011 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1012 return readDynsymVersionsImpl(Obj->getELFFile(), Symbols); 1013 return readDynsymVersionsImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1014 Symbols); 1015 } 1016 1017 Expected<std::vector<BBAddrMap>> ELFObjectFileBase::readBBAddrMap( 1018 std::optional<unsigned> TextSectionIndex, 1019 std::vector<PGOAnalysisMap> *PGOAnalyses) const { 1020 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1021 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1022 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1023 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1024 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1025 return readBBAddrMapImpl(Obj->getELFFile(), TextSectionIndex, PGOAnalyses); 1026 return readBBAddrMapImpl(cast<ELF64BEObjectFile>(this)->getELFFile(), 1027 TextSectionIndex, PGOAnalyses); 1028 } 1029 1030 StringRef ELFObjectFileBase::getCrelDecodeProblem(SectionRef Sec) const { 1031 auto Data = Sec.getRawDataRefImpl(); 1032 if (const auto *Obj = dyn_cast<ELF32LEObjectFile>(this)) 1033 return Obj->getCrelDecodeProblem(Data); 1034 if (const auto *Obj = dyn_cast<ELF32BEObjectFile>(this)) 1035 return Obj->getCrelDecodeProblem(Data); 1036 if (const auto *Obj = dyn_cast<ELF64LEObjectFile>(this)) 1037 return Obj->getCrelDecodeProblem(Data); 1038 return cast<ELF64BEObjectFile>(this)->getCrelDecodeProblem(Data); 1039 } 1040