xref: /netbsd-src/external/gpl3/gdb/dist/sim/testsuite/frv/cor.cgs (revision 4b169a6ba595ae283ca507b26b15fdff40495b1c)
1# frv testcase for cor $GRi,$GRj,$GRk,$CCi,$cond
2# mach: all
3
4	.include "testutils.inc"
5
6	start
7
8	.global cor
9cor:
10	set_spr_immed	0x1b1b,cccr
11
12	set_gr_limmed  	0xaaaa,0xaaaa,gr7
13	set_gr_limmed   0x5555,0x5555,gr8
14	set_icc         0x07,0		; Set mask opposite of expected
15	cor      	gr7,gr8,gr8,cc0,1
16	test_icc	0 1 1 1 icc0
17	test_gr_limmed 	0xffff,0xffff,gr8
18
19	set_gr_immed   	0x00000000,gr7
20	set_gr_immed   	0x00000000,gr8
21	set_icc         0x08,0		; Set mask opposite of expected
22	cor		gr7,gr8,gr8,cc0,1
23	test_icc	1 0 0 0 icc0
24	test_gr_immed  	0x00000000,gr8
25
26	set_gr_limmed   0xdead,0x0000,gr7
27	set_gr_limmed  	0x0000,0xbeef,gr8
28	set_icc         0x05,0		; Set mask opposite of expected
29	cor		gr7,gr8,gr8,cc4,1
30	test_icc	0 1 0 1 icc0
31	test_gr_limmed 	0xdead,0xbeef,gr8
32
33	set_gr_limmed  	0xaaaa,0xaaaa,gr7
34	set_gr_limmed   0x5555,0x5555,gr8
35	set_icc         0x07,0		; Set mask opposite of expected
36	cor      	gr7,gr8,gr8,cc0,0
37	test_icc	0 1 1 1 icc0
38	test_gr_limmed 	0x5555,0x5555,gr8
39
40	set_gr_immed   	0x00007fff,gr7
41	set_gr_immed   	0x00000000,gr8
42	set_icc         0x08,0		; Set mask opposite of expected
43	cor		gr7,gr8,gr8,cc0,0
44	test_icc	1 0 0 0 icc0
45	test_gr_immed  	0x00000000,gr8
46
47	set_gr_limmed   0xdead,0x0000,gr7
48	set_gr_limmed  	0x0000,0xbeef,gr8
49	set_icc         0x05,0		; Set mask opposite of expected
50	cor		gr7,gr8,gr8,cc4,0
51	test_icc	0 1 0 1 icc0
52	test_gr_limmed 	0x0000,0xbeef,gr8
53
54	set_gr_limmed  	0xaaaa,0xaaaa,gr7
55	set_gr_limmed   0x5555,0x5555,gr8
56	set_icc         0x07,1		; Set mask opposite of expected
57	cor      	gr7,gr8,gr8,cc1,0
58	test_icc	0 1 1 1 icc1
59	test_gr_limmed 	0xffff,0xffff,gr8
60
61	set_gr_immed   	0x00000000,gr7
62	set_gr_immed   	0x00000000,gr8
63	set_icc         0x08,1		; Set mask opposite of expected
64	cor		gr7,gr8,gr8,cc1,0
65	test_icc	1 0 0 0 icc1
66	test_gr_immed  	0x00000000,gr8
67
68	set_gr_limmed   0xdead,0x0000,gr7
69	set_gr_limmed  	0x0000,0xbeef,gr8
70	set_icc         0x05,1		; Set mask opposite of expected
71	cor		gr7,gr8,gr8,cc5,0
72	test_icc	0 1 0 1 icc1
73	test_gr_limmed 	0xdead,0xbeef,gr8
74
75	set_gr_limmed  	0xaaaa,0xaaaa,gr7
76	set_gr_limmed   0x5555,0x5555,gr8
77	set_icc         0x07,1		; Set mask opposite of expected
78	cor      	gr7,gr8,gr8,cc1,1
79	test_icc	0 1 1 1 icc1
80	test_gr_limmed 	0x5555,0x5555,gr8
81
82	set_gr_immed   	0x00007fff,gr7
83	set_gr_immed   	0x00000000,gr8
84	set_icc         0x08,1		; Set mask opposite of expected
85	cor		gr7,gr8,gr8,cc1,1
86	test_icc	1 0 0 0 icc1
87	test_gr_immed  	0x00000000,gr8
88
89	set_gr_limmed   0xdead,0x0000,gr7
90	set_gr_limmed  	0x0000,0xbeef,gr8
91	set_icc         0x05,1		; Set mask opposite of expected
92	cor		gr7,gr8,gr8,cc5,1
93	test_icc	0 1 0 1 icc1
94	test_gr_limmed 	0x0000,0xbeef,gr8
95
96	set_gr_limmed  	0xaaaa,0xaaaa,gr7
97	set_gr_limmed   0x5555,0x5555,gr8
98	set_icc         0x07,2		; Set mask opposite of expected
99	cor      	gr7,gr8,gr8,cc2,0
100	test_icc	0 1 1 1 icc2
101	test_gr_limmed 	0x5555,0x5555,gr8
102
103	set_gr_immed   	0x00007fff,gr7
104	set_gr_immed   	0x00000000,gr8
105	set_icc         0x08,2		; Set mask opposite of expected
106	cor		gr7,gr8,gr8,cc2,0
107	test_icc	1 0 0 0 icc2
108	test_gr_immed  	0x00000000,gr8
109
110	set_gr_limmed   0xdead,0x0000,gr7
111	set_gr_limmed  	0x0000,0xbeef,gr8
112	set_icc         0x05,2		; Set mask opposite of expected
113	cor		gr7,gr8,gr8,cc6,1
114	test_icc	0 1 0 1 icc2
115	test_gr_limmed 	0x0000,0xbeef,gr8
116
117	set_gr_limmed  	0xaaaa,0xaaaa,gr7
118	set_gr_limmed   0x5555,0x5555,gr8
119	set_icc         0x07,3		; Set mask opposite of expected
120	cor      	gr7,gr8,gr8,cc3,0
121	test_icc	0 1 1 1 icc3
122	test_gr_limmed 	0x5555,0x5555,gr8
123
124	set_gr_immed   	0x00007fff,gr7
125	set_gr_immed   	0x00000000,gr8
126	set_icc         0x08,3		; Set mask opposite of expected
127	cor		gr7,gr8,gr8,cc3,0
128	test_icc	1 0 0 0 icc3
129	test_gr_immed  	0x00000000,gr8
130
131	set_gr_limmed   0xdead,0x0000,gr7
132	set_gr_limmed  	0x0000,0xbeef,gr8
133	set_icc         0x05,3		; Set mask opposite of expected
134	cor		gr7,gr8,gr8,cc7,1
135	test_icc	0 1 0 1 icc3
136	test_gr_limmed 	0x0000,0xbeef,gr8
137
138	pass
139