1# sh testcase for bst 2# mach: all 3# as(sh): -defsym sim_cpu=0 4# as(shdsp): -defsym sim_cpu=1 -dsp 5 6 .include "testutils.inc" 7 8 .align 2 9_x: .long 0 10_y: .long 0x55555555 11 12 start 13 14bst_b_imm_disp12_reg: 15 set_grs_a5a5 16 # Make sure T is true to start. 17 sett 18 19 mov.l x, r1 20 21 bst.b #0, @(3, r1) 22 assertmem _x, 0x1 23 bst.b #1, @(3, r1) 24 assertmem _x, 0x3 25 bst.b #2, @(3, r1) 26 assertmem _x, 0x7 27 bst.b #3, @(3, r1) 28 assertmem _x, 0xf 29 30 bst.b #4, @(3, r1) 31 assertmem _x, 0x1f 32 bst.b #5, @(3, r1) 33 assertmem _x, 0x3f 34 bst.b #6, @(3, r1) 35 assertmem _x, 0x7f 36 bst.b #7, @(3, r1) 37 assertmem _x, 0xff 38 39 bst.b #0, @(2, r1) 40 assertmem _x, 0x1ff 41 bst.b #1, @(2, r1) 42 assertmem _x, 0x3ff 43 bst.b #2, @(2, r1) 44 assertmem _x, 0x7ff 45 bst.b #3, @(2, r1) 46 assertmem _x, 0xfff 47 48 bra .L2 49 nop 50 51 .align 2 52x: .long _x 53y: .long _y 54 55.L2: 56 bst.b #4, @(2, r1) 57 assertmem _x, 0x1fff 58 bst.b #5, @(2, r1) 59 assertmem _x, 0x3fff 60 bst.b #6, @(2, r1) 61 assertmem _x, 0x7fff 62 bst.b #7, @(2, r1) 63 assertmem _x, 0xffff 64 65 bst.b #0, @(1, r1) 66 assertmem _x, 0x1ffff 67 bst.b #1, @(1, r1) 68 assertmem _x, 0x3ffff 69 bst.b #2, @(1, r1) 70 assertmem _x, 0x7ffff 71 bst.b #3, @(1, r1) 72 assertmem _x, 0xfffff 73 74 bst.b #4, @(1, r1) 75 assertmem _x, 0x1fffff 76 bst.b #5, @(1, r1) 77 assertmem _x, 0x3fffff 78 bst.b #6, @(1, r1) 79 assertmem _x, 0x7fffff 80 bst.b #7, @(1, r1) 81 assertmem _x, 0xffffff 82 83 bst.b #0, @(0, r1) 84 assertmem _x, 0x1ffffff 85 bst.b #1, @(0, r1) 86 assertmem _x, 0x3ffffff 87 bst.b #2, @(0, r1) 88 assertmem _x, 0x7ffffff 89 bst.b #3, @(0, r1) 90 assertmem _x, 0xfffffff 91 92 bst.b #4, @(0, r1) 93 assertmem _x, 0x1fffffff 94 bst.b #5, @(0, r1) 95 assertmem _x, 0x3fffffff 96 bst.b #6, @(0, r1) 97 assertmem _x, 0x7fffffff 98 bst.b #7, @(0, r1) 99 assertmem _x, 0xffffffff 100 101 assertreg _x, r1 102 103bst_imm_reg: 104 set_greg 0, r1 105 bst #0, r1 106 assertreg 0x1, r1 107 bst #1, r1 108 assertreg 0x3, r1 109 bst #2, r1 110 assertreg 0x7, r1 111 bst #3, r1 112 assertreg 0xf, r1 113 114 bst #4, r1 115 assertreg 0x1f, r1 116 bst #5, r1 117 assertreg 0x3f, r1 118 bst #6, r1 119 assertreg 0x7f, r1 120 bst #7, r1 121 assertreg 0xff, r1 122 123 test_gr_a5a5 r0 124 test_gr_a5a5 r2 125 test_gr_a5a5 r3 126 test_gr_a5a5 r4 127 test_gr_a5a5 r5 128 test_gr_a5a5 r6 129 test_gr_a5a5 r7 130 test_gr_a5a5 r8 131 test_gr_a5a5 r9 132 test_gr_a5a5 r10 133 test_gr_a5a5 r11 134 test_gr_a5a5 r12 135 test_gr_a5a5 r13 136 test_gr_a5a5 r14 137 138 pass 139 140 exit 0 141 142 143