1 //==-- AArch64FrameLowering.h - TargetFrameLowering for AArch64 --*- C++ -*-==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H 14 #define LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H 15 16 #include "AArch64ReturnProtectorLowering.h" 17 #include "llvm/Support/TypeSize.h" 18 #include "llvm/CodeGen/TargetFrameLowering.h" 19 20 namespace llvm { 21 22 class AArch64FrameLowering : public TargetFrameLowering { 23 public: 24 25 const AArch64ReturnProtectorLowering RPL; 26 AArch64FrameLowering()27 explicit AArch64FrameLowering() 28 : TargetFrameLowering(StackGrowsDown, Align(16), 0, Align(16), 29 true /*StackRealignable*/), RPL() {} 30 31 void resetCFIToInitialState(MachineBasicBlock &MBB) const override; 32 33 MachineBasicBlock::iterator 34 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 35 MachineBasicBlock::iterator I) const override; 36 37 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 38 /// the function. 39 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 40 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 41 42 const ReturnProtectorLowering *getReturnProtector() const override; 43 44 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 45 46 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 47 Register &FrameReg) const override; 48 StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI, 49 Register &FrameReg, bool PreferFP, 50 bool ForSimm) const; 51 StackOffset resolveFrameOffsetReference(const MachineFunction &MF, 52 int64_t ObjectOffset, bool isFixed, 53 bool isSVE, Register &FrameReg, 54 bool PreferFP, bool ForSimm) const; 55 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 56 MachineBasicBlock::iterator MI, 57 ArrayRef<CalleeSavedInfo> CSI, 58 const TargetRegisterInfo *TRI) const override; 59 60 bool 61 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 62 MachineBasicBlock::iterator MI, 63 MutableArrayRef<CalleeSavedInfo> CSI, 64 const TargetRegisterInfo *TRI) const override; 65 66 /// Can this function use the red zone for local allocations. 67 bool canUseRedZone(const MachineFunction &MF) const; 68 69 bool hasFP(const MachineFunction &MF) const override; 70 bool hasReservedCallFrame(const MachineFunction &MF) const override; 71 72 bool assignCalleeSavedSpillSlots(MachineFunction &MF, 73 const TargetRegisterInfo *TRI, 74 std::vector<CalleeSavedInfo> &CSI, 75 unsigned &MinCSFrameIndex, 76 unsigned &MaxCSFrameIndex) const override; 77 78 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 79 RegScavenger *RS) const override; 80 81 /// Returns true if the target will correctly handle shrink wrapping. enableShrinkWrapping(const MachineFunction & MF)82 bool enableShrinkWrapping(const MachineFunction &MF) const override { 83 return true; 84 } 85 86 bool enableStackSlotScavenging(const MachineFunction &MF) const override; 87 TargetStackID::Value getStackIDForScalableVectors() const override; 88 89 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 90 RegScavenger *RS) const override; 91 92 void 93 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, 94 RegScavenger *RS) const override; 95 96 unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override; 97 98 unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const; 99 100 StackOffset 101 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, 102 Register &FrameReg, 103 bool IgnoreSPUpdates) const override; 104 StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF, 105 int FI) const override; 106 int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const; 107 isSupportedStackID(TargetStackID::Value ID)108 bool isSupportedStackID(TargetStackID::Value ID) const override { 109 switch (ID) { 110 default: 111 return false; 112 case TargetStackID::Default: 113 case TargetStackID::ScalableVector: 114 case TargetStackID::NoAlloc: 115 return true; 116 } 117 } 118 isStackIdSafeForLocalArea(unsigned StackId)119 bool isStackIdSafeForLocalArea(unsigned StackId) const override { 120 // We don't support putting SVE objects into the pre-allocated local 121 // frame block at the moment. 122 return StackId != TargetStackID::ScalableVector; 123 } 124 125 void 126 orderFrameObjects(const MachineFunction &MF, 127 SmallVectorImpl<int> &ObjectsToAllocate) const override; 128 129 private: 130 /// Returns true if a homogeneous prolog or epilog code can be emitted 131 /// for the size optimization. If so, HOM_Prolog/HOM_Epilog pseudo 132 /// instructions are emitted in place. When Exit block is given, this check is 133 /// for epilog. 134 bool homogeneousPrologEpilog(MachineFunction &MF, 135 MachineBasicBlock *Exit = nullptr) const; 136 137 /// Returns true if CSRs should be paired. 138 bool producePairRegisters(MachineFunction &MF) const; 139 140 bool shouldCombineCSRLocalStackBump(MachineFunction &MF, 141 uint64_t StackBumpBytes) const; 142 143 int64_t estimateSVEStackObjectOffsets(MachineFrameInfo &MF) const; 144 int64_t assignSVEStackObjectOffsets(MachineFrameInfo &MF, 145 int &MinCSFrameIndex, 146 int &MaxCSFrameIndex) const; 147 bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB, 148 unsigned StackBumpBytes) const; 149 void emitCalleeSavedGPRLocations(MachineBasicBlock &MBB, 150 MachineBasicBlock::iterator MBBI) const; 151 void emitCalleeSavedSVELocations(MachineBasicBlock &MBB, 152 MachineBasicBlock::iterator MBBI) const; 153 void emitCalleeSavedGPRRestores(MachineBasicBlock &MBB, 154 MachineBasicBlock::iterator MBBI) const; 155 void emitCalleeSavedSVERestores(MachineBasicBlock &MBB, 156 MachineBasicBlock::iterator MBBI) const; 157 158 /// Emit target zero call-used regs. 159 void emitZeroCallUsedRegs(BitVector RegsToZero, 160 MachineBasicBlock &MBB) const override; 161 }; 162 163 } // End llvm namespace 164 165 #endif 166