1 /* 2 * powerpc 64 3 */ 4 #define NSNAME 8 5 #define NSYM 50 6 #define NREG 32 7 8 #define NOPROF (1<<0) 9 #define DUPOK (1<<1) 10 11 enum 12 { 13 REGZERO = 0, /* set to zero */ 14 REGSP = 1, 15 REGSB = 2, 16 REGRET = 3, 17 REGARG = 3, 18 REGMIN = 7, /* register variables allocated from here to REGMAX */ 19 REGMAX = 27, 20 REGEXT = 30, /* external registers allocated from here down */ 21 REGTMP = 31, /* used by the linker */ 22 23 FREGRET = 0, 24 FREGMIN = 17, /* first register variable */ 25 FREGEXT = 26, /* first external register */ 26 FREGCVI = 27, /* floating conversion constant */ 27 FREGZERO = 28, /* both float and double */ 28 FREGHALF = 29, /* double */ 29 FREGONE = 30, /* double */ 30 FREGTWO = 31 /* double */ 31 /* 32 * GENERAL: 33 * 34 * compiler allocates R3 up as temps 35 * compiler allocates register variables R7-R27 36 * compiler allocates external registers R30 down 37 * 38 * compiler allocates register variables F17-F26 39 * compiler allocates external registers F26 down 40 */ 41 }; 42 43 enum as 44 { 45 AXXX = 0, 46 AADD, 47 AADDCC, 48 AADDV, 49 AADDVCC, 50 AADDC, 51 AADDCCC, 52 AADDCV, 53 AADDCVCC, 54 AADDME, 55 AADDMECC, 56 AADDMEVCC, 57 AADDMEV, 58 AADDE, 59 AADDECC, 60 AADDEVCC, 61 AADDEV, 62 AADDZE, 63 AADDZECC, 64 AADDZEVCC, 65 AADDZEV, 66 AAND, 67 AANDCC, 68 AANDN, 69 AANDNCC, 70 ABC, 71 ABCL, 72 ABEQ, 73 ABGE, 74 ABGT, 75 ABL, 76 ABLE, 77 ABLT, 78 ABNE, 79 ABR, 80 ABVC, 81 ABVS, 82 ACMP, 83 ACMPU, 84 ACNTLZW, 85 ACNTLZWCC, 86 ACRAND, 87 ACRANDN, 88 ACREQV, 89 ACRNAND, 90 ACRNOR, 91 ACROR, 92 ACRORN, 93 ACRXOR, 94 ADIVW, 95 ADIVWCC, 96 ADIVWVCC, 97 ADIVWV, 98 ADIVWU, 99 ADIVWUCC, 100 ADIVWUVCC, 101 ADIVWUV, 102 AEQV, 103 AEQVCC, 104 AEXTSB, 105 AEXTSBCC, 106 AEXTSH, 107 AEXTSHCC, 108 AFABS, 109 AFABSCC, 110 AFADD, 111 AFADDCC, 112 AFADDS, 113 AFADDSCC, 114 AFCMPO, 115 AFCMPU, 116 AFCTIW, 117 AFCTIWCC, 118 AFCTIWZ, 119 AFCTIWZCC, 120 AFDIV, 121 AFDIVCC, 122 AFDIVS, 123 AFDIVSCC, 124 AFMADD, 125 AFMADDCC, 126 AFMADDS, 127 AFMADDSCC, 128 AFMOVD, 129 AFMOVDCC, 130 AFMOVDU, 131 AFMOVS, 132 AFMOVSU, 133 AFMSUB, 134 AFMSUBCC, 135 AFMSUBS, 136 AFMSUBSCC, 137 AFMUL, 138 AFMULCC, 139 AFMULS, 140 AFMULSCC, 141 AFNABS, 142 AFNABSCC, 143 AFNEG, 144 AFNEGCC, 145 AFNMADD, 146 AFNMADDCC, 147 AFNMADDS, 148 AFNMADDSCC, 149 AFNMSUB, 150 AFNMSUBCC, 151 AFNMSUBS, 152 AFNMSUBSCC, 153 AFRSP, 154 AFRSPCC, 155 AFSUB, 156 AFSUBCC, 157 AFSUBS, 158 AFSUBSCC, 159 AMOVMW, 160 ALSW, 161 ALWAR, 162 AMOVWBR, 163 AMOVB, 164 AMOVBU, 165 AMOVBZ, 166 AMOVBZU, 167 AMOVH, 168 AMOVHBR, 169 AMOVHU, 170 AMOVHZ, 171 AMOVHZU, 172 AMOVW, 173 AMOVWU, 174 AMOVFL, 175 AMOVCRFS, 176 AMTFSB0, 177 AMTFSB0CC, 178 AMTFSB1, 179 AMTFSB1CC, 180 AMULHW, 181 AMULHWCC, 182 AMULHWU, 183 AMULHWUCC, 184 AMULLW, 185 AMULLWCC, 186 AMULLWVCC, 187 AMULLWV, 188 ANAND, 189 ANANDCC, 190 ANEG, 191 ANEGCC, 192 ANEGVCC, 193 ANEGV, 194 ANOR, 195 ANORCC, 196 AOR, 197 AORCC, 198 AORN, 199 AORNCC, 200 AREM, 201 AREMCC, 202 AREMV, 203 AREMVCC, 204 AREMU, 205 AREMUCC, 206 AREMUV, 207 AREMUVCC, 208 ARFI, 209 ARLWMI, 210 ARLWMICC, 211 ARLWNM, 212 ARLWNMCC, 213 ASLW, 214 ASLWCC, 215 ASRW, 216 ASRAW, 217 ASRAWCC, 218 ASRWCC, 219 ASTSW, 220 ASTWCCC, 221 ASUB, 222 ASUBCC, 223 ASUBVCC, 224 ASUBC, 225 ASUBCCC, 226 ASUBCV, 227 ASUBCVCC, 228 ASUBME, 229 ASUBMECC, 230 ASUBMEVCC, 231 ASUBMEV, 232 ASUBV, 233 ASUBE, 234 ASUBECC, 235 ASUBEV, 236 ASUBEVCC, 237 ASUBZE, 238 ASUBZECC, 239 ASUBZEVCC, 240 ASUBZEV, 241 ASYNC, 242 AXOR, 243 AXORCC, 244 245 ADCBF, 246 ADCBI, 247 ADCBST, 248 ADCBT, 249 ADCBTST, 250 ADCBZ, 251 AECIWX, 252 AECOWX, 253 AEIEIO, 254 AICBI, 255 AISYNC, 256 APTESYNC, 257 ATLBIE, 258 ATLBIEL, 259 ATLBSYNC, 260 ATW, 261 262 ASYSCALL, 263 ADATA, 264 AGLOBL, 265 AGOK, 266 AHISTORY, 267 ANAME, 268 ANOP, 269 ARETURN, 270 ATEXT, 271 AWORD, 272 AEND, 273 ADYNT, 274 AINIT, 275 ASIGNAME, 276 277 ARFCI, 278 279 /* optional on 32-bit */ 280 AFRES, 281 AFRESCC, 282 AFRSQRTE, 283 AFRSQRTECC, 284 AFSEL, 285 AFSELCC, 286 AFSQRT, 287 AFSQRTCC, 288 AFSQRTS, 289 AFSQRTSCC, 290 291 /* 64-bit */ 292 293 ACNTLZD, 294 ACNTLZDCC, 295 ACMPW, /* CMP with L=0 */ 296 ACMPWU, 297 ADIVD, 298 ADIVDCC, 299 ADIVDVCC, 300 ADIVDV, 301 ADIVDU, 302 ADIVDUCC, 303 ADIVDUVCC, 304 ADIVDUV, 305 AEXTSW, 306 AEXTSWCC, 307 /* AFCFIW; AFCFIWCC */ 308 AFCFID, 309 AFCFIDCC, 310 AFCTID, 311 AFCTIDCC, 312 AFCTIDZ, 313 AFCTIDZCC, 314 ALDAR, 315 AMOVD, 316 AMOVDU, 317 AMOVWZ, 318 AMOVWZU, 319 AMULHD, 320 AMULHDCC, 321 AMULHDU, 322 AMULHDUCC, 323 AMULLD, 324 AMULLDCC, 325 AMULLDVCC, 326 AMULLDV, 327 ARFID, 328 ARLDMI, 329 ARLDMICC, 330 ARLDC, 331 ARLDCCC, 332 ARLDCR, 333 ARLDCRCC, 334 ARLDCL, 335 ARLDCLCC, 336 ASLBIA, 337 ASLBIE, 338 ASLBMFEE, 339 ASLBMFEV, 340 ASLBMTE, 341 ASLD, 342 ASLDCC, 343 ASRD, 344 ASRAD, 345 ASRADCC, 346 ASRDCC, 347 ASTDCCC, 348 ATD, 349 350 /* 64-bit pseudo operation */ 351 ADWORD, 352 AREMD, 353 AREMDCC, 354 AREMDV, 355 AREMDVCC, 356 AREMDU, 357 AREMDUCC, 358 AREMDUV, 359 AREMDUVCC, 360 361 /* more 64-bit operations */ 362 AHRFID, 363 364 ALAST 365 }; 366 367 /* type/name */ 368 enum 369 { 370 D_GOK = 0, 371 D_NONE, 372 373 /* name */ 374 D_EXTERN, 375 D_STATIC, 376 D_AUTO, 377 D_PARAM, 378 379 /* type */ 380 D_BRANCH, 381 D_OREG, 382 D_CONST, 383 D_FCONST, 384 D_SCONST, 385 D_REG, 386 D_FPSCR, 387 D_MSR, 388 D_FREG, 389 D_CREG, 390 D_SPR, 391 D_OPT, /* branch/trap option */ 392 D_FILE, 393 D_FILE1, 394 D_DCR, /* device control register */ 395 D_DCONST, 396 397 /* reg names iff type is D_SPR */ 398 D_XER = 1, 399 D_LR = 8, 400 D_CTR = 9 401 /* and many supervisor level registers */ 402 }; 403 404 /* 405 * this is the ranlib header 406 */ 407 #define SYMDEF "__.SYMDEF" 408 409 /* 410 * this is the simulated IEEE floating point 411 */ 412 typedef struct ieee Ieee; 413 struct ieee 414 { 415 long l; /* contains ls-man 0xffffffff */ 416 long h; /* contains sign 0x80000000 417 exp 0x7ff00000 418 ms-man 0x000fffff */ 419 }; 420