1 /* $NetBSD: amdgpu_dmub_reg.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $ */
2
3 /*
4 * Copyright 2019 Advanced Micro Devices, Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: AMD
25 *
26 */
27
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: amdgpu_dmub_reg.c,v 1.2 2021/12/18 23:45:07 riastradh Exp $");
30
31 #include "dmub_reg.h"
32 #include "../inc/dmub_srv.h"
33
34 struct dmub_reg_value_masks {
35 uint32_t value;
36 uint32_t mask;
37 };
38
39 static inline void
set_reg_field_value_masks(struct dmub_reg_value_masks * field_value_mask,uint32_t value,uint32_t mask,uint8_t shift)40 set_reg_field_value_masks(struct dmub_reg_value_masks *field_value_mask,
41 uint32_t value, uint32_t mask, uint8_t shift)
42 {
43 field_value_mask->value =
44 (field_value_mask->value & ~mask) | (mask & (value << shift));
45 field_value_mask->mask = field_value_mask->mask | mask;
46 }
47
set_reg_field_values(struct dmub_reg_value_masks * field_value_mask,uint32_t addr,int n,uint8_t shift1,uint32_t mask1,uint32_t field_value1,va_list ap)48 static void set_reg_field_values(struct dmub_reg_value_masks *field_value_mask,
49 uint32_t addr, int n, uint8_t shift1,
50 uint32_t mask1, uint32_t field_value1,
51 va_list ap)
52 {
53 uint32_t shift, mask, field_value;
54 int i = 1;
55
56 /* gather all bits value/mask getting updated in this register */
57 set_reg_field_value_masks(field_value_mask, field_value1, mask1,
58 shift1);
59
60 while (i < n) {
61 shift = va_arg(ap, uint32_t);
62 mask = va_arg(ap, uint32_t);
63 field_value = va_arg(ap, uint32_t);
64
65 set_reg_field_value_masks(field_value_mask, field_value, mask,
66 shift);
67 i++;
68 }
69 }
70
get_reg_field_value_ex(uint32_t reg_value,uint32_t mask,uint8_t shift)71 static inline uint32_t get_reg_field_value_ex(uint32_t reg_value, uint32_t mask,
72 uint8_t shift)
73 {
74 return (mask & reg_value) >> shift;
75 }
76
dmub_reg_update(struct dmub_srv * srv,uint32_t addr,int n,uint8_t shift1,uint32_t mask1,uint32_t field_value1,...)77 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
78 uint32_t mask1, uint32_t field_value1, ...)
79 {
80 struct dmub_reg_value_masks field_value_mask = { 0 };
81 uint32_t reg_val;
82 va_list ap;
83
84 va_start(ap, field_value1);
85 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1,
86 field_value1, ap);
87 va_end(ap);
88
89 reg_val = srv->funcs.reg_read(srv->user_ctx, addr);
90 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value;
91 srv->funcs.reg_write(srv->user_ctx, addr, reg_val);
92 }
93
dmub_reg_set(struct dmub_srv * srv,uint32_t addr,uint32_t reg_val,int n,uint8_t shift1,uint32_t mask1,uint32_t field_value1,...)94 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
95 uint8_t shift1, uint32_t mask1, uint32_t field_value1, ...)
96 {
97 struct dmub_reg_value_masks field_value_mask = { 0 };
98 va_list ap;
99
100 va_start(ap, field_value1);
101 set_reg_field_values(&field_value_mask, addr, n, shift1, mask1,
102 field_value1, ap);
103 va_end(ap);
104
105 reg_val = (reg_val & ~field_value_mask.mask) | field_value_mask.value;
106 srv->funcs.reg_write(srv->user_ctx, addr, reg_val);
107 }
108
dmub_reg_get(struct dmub_srv * srv,uint32_t addr,uint8_t shift,uint32_t mask,uint32_t * field_value)109 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
110 uint32_t mask, uint32_t *field_value)
111 {
112 uint32_t reg_val = srv->funcs.reg_read(srv->user_ctx, addr);
113 *field_value = get_reg_field_value_ex(reg_val, mask, shift);
114 }
115