Searched +full:zynqmp +full:- +full:gpio +full:- +full:modepin (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/gpio/xlnx,zynqmp-gpio-modepin.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: ZynqMP Mode Pin GPIO controller10 PS_MODE is 4-bits boot mode pins sampled on POR deassertion. Mode Pin11 GPIO controller with configurable from numbers of pins (from 0 to 3 per15 - Mubin Sayyed <mubin.sayyed@amd.com>16 - Radhey Shyam Pandey <radhey.shyam.pandey@amd.com>20 const: xlnx,zynqmp-gpio-modepin[all …]
1 // SPDX-License-Identifier: GPL-2.03 * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A5 * (C) Copyright 2020 - 2021, Xilinx, Inc.6 * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc.11 /dts-v1/;13 #include "zynqmp.dtsi"14 #include "zynqmp[all...]
1 // SPDX-License-Identifier: GPL-2.0+3 * dts file for Xilinx ZynqMP5 * (C) Copyright 2014 - 2021, Xilinx, Inc.15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>16 #include <dt-binding636 gpio: gpio@ff0a0000 { global() label [all...]