| /freebsd-src/sys/contrib/device-tree/Bindings/arm/mediatek/ |
| H A D | mediatek,vdecsys.txt | 1 Mediatek vdecsys controller
4 The Mediatek vdecsys controller provides various clocks to the system.
9 - "mediatek,mt2701-vdecsys", "syscon"
10 - "mediatek,mt2712-vdecsys", "syscon"
11 - "mediatek,mt6779-vdecsys", "syscon"
12 - "mediatek,mt6797-vdecsys", "syscon"
13 - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon"
14 - "mediatek,mt8167-vdecsys", "syscon"
15 - "mediatek,mt8173-vdecsys", "syscon"
16 - "mediatek,mt8183-vdecsys", "syscon"
[all …]
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| H A D | mediatek,mt8192-clock.yaml | 31 - mediatek,mt8192-vdecsys
138 vdecsys: clock-controller@1602f000 {
139 compatible = "mediatek,mt8192-vdecsys";
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| H A D | mediatek,mt8195-clock.yaml | 47 - mediatek,mt8195-vdecsys
206 vdecsys: clock-controller@1802f000 {
207 compatible = "mediatek,mt8195-vdecsys";
|
| H A D | mediatek,mt8186-clock.yaml | 31 - mediatek,mt8186-vdecsys
|
| /freebsd-src/sys/contrib/device-tree/Bindings/media/ |
| H A D | mediatek,vcodec-decoder.yaml | 78 mediatek,vdecsys:
80 description: Phandle to the vdecsys syscon node.
89 - mediatek,vdecsys
172 mediatek,vdecsys = <&vdecsys>;
|
| H A D | mediatek,vcodec-subdev-decoder.yaml | 258 <&vdecsys CLK_VDEC_VDEC>,
259 <&vdecsys CLK_VDEC_LAT>,
260 <&vdecsys CLK_VDEC_LARB1>,
|
| /freebsd-src/sys/contrib/device-tree/Bindings/clock/ |
| H A D | mediatek,mt6795-clock.yaml | 27 - mediatek,mt6795-vdecsys
55 vdecsys: clock-controller@16000000 {
56 compatible = "mediatek,mt6795-vdecsys";
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| H A D | mediatek,mt8188-clock.yaml | 43 - mediatek,mt8188-vdecsys
44 - mediatek,mt8188-vdecsys-soc
|
| H A D | mediatek,mt8365-clock.yaml | 19 - mediatek,mt8365-vdecsys
|
| /freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt8167.dtsi | 110 vdecsys: syscon@16000000 { label
111 compatible = "mediatek,mt8167-vdecsys", "syscon";
166 clocks = <&vdecsys CLK_VDEC_CKEN>,
167 <&vdecsys CLK_VDEC_LARB1_CKEN>;
|
| H A D | mt6779.dtsi | 263 vdecsys: clock-controller@16000000 { label
264 compatible = "mediatek,mt6779-vdecsys", "syscon";
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| H A D | mt8192.dtsi | 649 clocks = <&vdecsys CLK_VDEC_VDEC>,
650 <&vdecsys CLK_VDEC_LAT>,
651 <&vdecsys CLK_VDEC_LARB1>;
1746 <&vdecsys CLK_VDEC_VDEC>,
1747 <&vdecsys CLK_VDEC_LAT>,
1748 <&vdecsys CLK_VDEC_LARB1>,
1779 clocks = <&vdecsys CLK_VDEC_SOC_LARB1>,
1780 <&vdecsys CLK_VDEC_SOC_LARB1>;
1785 vdecsys: clock-controller@1602f000 {
1786 compatible = "mediatek,mt8192-vdecsys";
1776 vdecsys: clock-controller@1602f000 { global() label
[all...] |
| H A D | mt8365.dtsi | 777 vdecsys: syscon@16000000 {
778 compatible = "mediatek,mt8365-vdecsys", "syscon";
788 clocks = <&vdecsys CLK_VDEC_LARB1>,
789 <&vdecsys CLK_VDEC_LARB1>;
776 vdecsys: syscon@16000000 { global() label
|
| H A D | mt8173.dtsi | 1374 vdecsys: clock-controller@16000000 {
1375 compatible = "mediatek,mt8173-vdecsys", "syscon";
1405 mediatek,vdecsys = <&vdecsys>;
1439 clocks = <&vdecsys CLK_VDEC_CKEN>,
1440 <&vdecsys CLK_VDEC_LARB_CKEN>;
1365 vdecsys: clock-controller@16000000 { global() label
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| H A D | mt6797.dtsi | 461 vdecsys: syscon@16000000 { label
462 compatible = "mediatek,mt6797-vdecsys", "syscon";
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| H A D | mt6795.dtsi | 972 vdecsys: clock-controller@16000000 { label
973 compatible = "mediatek,mt6795-vdecsys";
983 clocks = <&vdecsys CLK_VDEC_CKEN>, <&vdecsys CLK_VDEC_LARB_CKEN>;
|
| H A D | mt2712e.dtsi | 1085 vdecsys: syscon@16000000 {
1086 compatible = "mediatek,mt2712-vdecsys", "syscon";
1097 clocks = <&vdecsys CLK_VDEC_CKEN>,
1098 <&vdecsys CLK_VDEC_LARB1_CKEN>;
1084 vdecsys: syscon@16000000 { global() label
|
| H A D | mt8183.dtsi | 1916 vdecsys: syscon@16000000 {
1917 compatible = "mediatek,mt8183-vdecsys", "syscon";
1946 mediatek,vdecsys = <&vdecsys>;
1948 clocks = <&vdecsys CLK_VDEC_VDEC>;
1956 clocks = <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LARB1>;
1897 vdecsys: syscon@16000000 { global() label
|
| H A D | mt8188.dtsi | 1066 clocks = <&vdecsys CLK_VDEC2_LARB1>;
1884 compatible = "mediatek,mt8188-vdecsys-soc";
1889 vdecsys: clock-controller@1802f000 {
1890 compatible = "mediatek,mt8188-vdecsys";
944 vdecsys: clock-controller@1802f000 { global() label
|
| /freebsd-src/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | mediatek,smi-larb.txt | 35 clocks = <&vdecsys CLK_VDEC_CKEN>,
36 <&vdecsys CLK_VDEC_LARB_CKEN>;
|
| H A D | mediatek,smi-larb.yaml | 140 clocks = <&vdecsys CLK_VDEC_CKEN>,
141 <&vdecsys CLK_VDEC_LARB_CKEN>;
|
| /freebsd-src/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt7623n.dtsi | 77 clocks = <&vdecsys CLK_VDEC_CKGEN>,
78 <&vdecsys CLK_VDEC_LARB>;
|
| H A D | mt2701.dtsi | 582 vdecsys: syscon@16000000 { label
583 compatible = "mediatek,mt2701-vdecsys", "syscon";
593 clocks = <&vdecsys CLK_VDEC_CKGEN>,
594 <&vdecsys CLK_VDEC_LARB>;
|
| /freebsd-src/sys/contrib/device-tree/include/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 125 /* VDECSYS */
|
| H A D | mediatek,mt8365-clk.h | 354 /* VDECSYS */
|