Searched +full:vdda1v1 +full:- +full:supply (Results 1 – 5 of 5) sorted by relevance
14 |_ PHY port#2 ----| |________________23 - compatible: must be "st,stm32mp1-usbphyc"24 - reg: address and length of the usb phy control register set25 - clocks: phandle + clock specifier for the PLL phy clock26 - #address-cells: number of address cells for phys sub-nodes, must be <1>27 - #size-cells: number of size cells for phys sub-nodes, must be <0>30 - assigned-clocks: phandle + clock specifier for the PLL phy clock31 - assigned-clock-parents: the PLL phy clock parent32 - resets: phandle + reset specifier34 Required nodes: one sub-node per port the controller provides.[all …]
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause3 ---4 $id: http://devicetree.org/schemas/phy/phy-stm3[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved10 compatible = "linaro,optee-tz";15 compatible = "linaro,scmi-optee";16 #address-cells = <1>;17 #size-cells = <0>;18 linaro,optee-channel-id = <0>;22 #clock-cells = <1>;27 #reset-cells = <1>;34 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-binding[all...]
1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved6 #include <dt-bindings/interrupt-controller/arm-gic.h>7 #include <dt-binding[all...]