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/freebsd-src/sys/contrib/device-tree/Bindings/usb/
H A Dusb-xhci.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/usb-xhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathias Nyman <mathias.nyman@intel.com>
13 - $ref: usb-hcd.yaml#
16 usb2-lpm-disable:
17 description: Indicates if we don't want to enable USB2 HW LPM
20 usb3-lpm-capable:
21 description: Determines if platform is USB3 LPM capable
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H A Dmediatek,mtk-xhci.txt3 The device node for Mediatek SOC USB3.0 host controller
6 the second one supports dual-role mode, and the host is based on xHCI
11 ------------------------------------------------------------------------
14 - compatible : should be "mediatek,<soc-model>-xhci", "mediatek,mtk-xhci",
15 soc-model is the name of SoC, such as mt8173, mt2712 etc, when using
16 "mediatek,mtk-xhci" compatible string, you need SoC specific ones in
18 - "mediatek,mt8173-xhci"
19 - reg : specifies physical base address and size of the registers
20 - reg-names: should be "mac" for xHCI MAC and "ippc" for IP port control
21 - interrupts : interrupt used by the controller
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H A Dusb-xhci.txt4 - compatible: should be one or more of
6 - "generic-xhci" for generic XHCI device
7 - "marvell,armada3700-xhci" for Armada 37xx SoCs
8 - "marvell,armada-375-xhci" for Armada 375 SoCs
9 - "marvell,armada-380-xhci" for Armada 38x SoCs
10 - "brcm,bcm7445-xhci" for Broadcom STB SoCs with XHCI
11 - "xhci-platform" (deprecated)
14 SoC-specific version corresponding to the platform first
17 - reg: should contain address and length of the standard XHCI
19 - interrupts: one XHCI interrupt should be described here.
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H A Dhisilicon,histb-xhci.txt6 - compatible: should be "hisilicon,hi3798cv200-xhci"
7 - reg: specifies physical base address and size of the registers
8 - interrupts : interrupt used by the controller
9 - clocks: a list of phandle + clock-specifier pairs, one for each
10 entry in clock-names
11 - clock-names: must contain
16 - resets: a list of phandle and reset specifier pairs as listed in
17 reset-names property.
18 - reset-names: must contain
20 - phys: a list of phandle + phy specifier pairs
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H A Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhc
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H A Ddwc3.txt3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
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H A Dsnps,dwc3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare USB3 Controller
10 - Felipe Balbi <balbi@kernel.org>
14 be presented as a standalone DT node with an optional vendor-specifi
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/freebsd-src/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1043a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include <dt-bindings/interrupt-controlle
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H A Dfsl-ls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1046A family SoC.
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-binding
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H A Dfsl-lx2160a.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 // Device Tree Include file for Layerscape-LX2160A family SoC.
5 // Copyright 2018-2020 NXP
7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controlle
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/freebsd-src/sys/dev/usb/controller/
H A Dxhcireg.h2 /*-
3 * SPDX-License-Identifier: BSD-2-Clause
40 #define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed Enable */
41 #define PCI_XHCI_INTEL_USB3PRM 0xDC /* Intel USB3 Port Routing Mask */
62 #define XHCI_HCS0_AC64(x) ((x) & 0x1) /* 64-bit capable */
87 #define XHCI_STS_HCH 0x00000001 /* RO - Host Controller Halted */
88 #define XHCI_STS_HSE 0x00000004 /* RW - Host System Error */
89 #define XHCI_STS_EINT 0x00000008 /* RW - Event Interrupt */
90 #define XHCI_STS_PCD 0x00000010 /* RW - Port Change Detect */
91 #define XHCI_STS_SSS 0x00000100 /* RO - Save State Status */
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