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/freebsd-src/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,wcd938x-sdw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/qcom,wcd938x-sdw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
14 It has RX and TX Soundwire slave devices. This bindings is for the
24 qcom,tx-port-mapping:
26 Specifies static port mapping between slave and master tx ports.
27 In the order of slave port index.
[all …]
H A Drockchip,i2s-tdm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
18 - $ref: dai-common.yaml#
23 - rockchip,px30-i2s-tdm
24 - rockchip,rk1808-i2s-tdm
25 - rockchip,rk3308-i2s-tdm
26 - rockchip,rk3568-i2s-tdm
[all …]
H A Dqcom,wcd938x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/contrib/device-tree/Bindings/hsi/
H A Domap-ssi.txt9 - compatible: Should include "ti,omap3-ssi" or "ti,omap4-hsi"
10 - reg-names: Contains the values "sys" and "gdd" (in this order).
11 - reg: Contains a matching register specifier for each entry
12 in reg-names.
13 - interrupt-names: Contains the value "gdd_mpu".
14 - interrupts: Contains matching interrupt information for each entry
15 in interrupt-names.
16 - ranges: Represents the bus address mapping between the main
18 - clock-names: Must include the following entries:
22 - clocks: Contains a matching clock specifier for each entry in
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/ata/
H A Dsata_highbank.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 activity LEDs and for mapping the ComboPHYs.
15 - Andre Przywara <andre.przywara@arm.com>
19 const: calxeda,hb-ahci
27 dma-coherent: true
29 calxeda,pre-clocks:
35 calxeda,post-clocks:
41 calxeda,led-order:
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/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
[all …]
H A Dcavium-pip.txt10 - compatible: "cavium,octeon-3860-pip"
14 - reg: The base address of the PIP's register bank.
16 - #address-cells: Must be <1>.
18 - #size-cells: Must be <0>.
21 - compatible: "cavium,octeon-3860-pip-interface"
25 - reg: The interface number.
27 - #address-cells: Must be <1>.
29 - #size-cells: Must be <0>.
31 Properties for PIP port which is a child the PIP interface:
32 - compatible: "cavium,octeon-3860-pip-port"
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/iommu/
H A Dmediatek,iommu.txt5 pagetable, and only supports 4K size page mapping. Generation two uses the
6 ARM Short-Descriptor translation table format for address translation.
14 +--------+
16 gals0-rx gals1-rx (Global Async Local Sync rx)
19 gals0-tx gals1-tx (Global Async Local Sync tx)
21 +--------+
25 +----------------+-------
27 | gals-rx There may be GALS in some larbs.
30 | gals-tx
36 +-----+-----+ +----+----+
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H A Dmediatek,iommu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
15 pagetable, and only supports 4K size page mapping. Generation two uses the
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
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/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6q-b650v3.dts5 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "imx6q-bx50v3.dtsi"
49 compatible = "ge,imx6q-b650v3", "advantech,imx6q-ba16", "fsl,imx6q";
52 stdout-path = &uart3;
55 panel-lvds0 {
56 compatible = "innolux,g121x1-l03";
58 power-supply = <&reg_lvds>;
60 port {
62 remote-endpoint = <&lvds0_out>;
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/freebsd-src/sys/contrib/xen/io/
H A Dnetif.h4 * Unified network-device I/O interface for Xen guest OSes.
24 * Copyright (c) 2003-2004, Keir Fraser
55 * feature 'feature-rx-notify' via xenbus. Otherwise the backend will assume
60 * "feature-split-event-channels" is introduced to separate guest TX
65 * channels for TX and RX, advertise them to backend as
66 * "event-channel-tx" and "event-channel-rx" respectively. If frontend
67 * doesn't want to use this feature, it just writes "event-channel"
73 * If supported, the backend will write the key "multi-queue-max-queues" to
77 * key "multi-queue-num-queues", set to the number they wish to use, which
79 * in "multi-queue-max-queues".
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/pci/
H A Daltera-pcie.txt4 - compatible : should contain "altr,pcie-root-port-1.0" or "altr,pcie-root-port-2.0"
5 - reg: a list of physical base address and length for TXS and CRA.
6 For "altr,pcie-root-port-2.0", additional HIP base address and length.
7 - reg-names: must include the following entries:
8 "Txs": TX slave port region
10 "Hip": Hard IP region (if "altr,pcie-root-port-2.0")
11 - interrupts: specifies the interrupt source of the parent interrupt
14 - device_type: must be "pci"
15 - #address-cells: set to <3>
16 - #size-cells: set to <2>
[all …]
/freebsd-src/share/man/man4/
H A Dsk.415 .\" 4. Neither the name of the author nor the names of any co-contributors
36 .Nd "SysKonnect SK-984x and SK-982x PCI Gigabit Ethernet adapter driver"
41 .Bd -ragged -offset indent
49 .Bd -literal -offset indent
55 driver provides support for the SysKonnect SK-984x and SK-982x series PCI
65 allowing dual-port NIC configurations.
67 The SK-982x 1000baseT adapters also include a Broadcom BCM5400 1000baseTX
69 The Broadcom PHY is connected to the XMAC via its GMII port.
73 driver configures dual port SysKonnect adapters such that each XMAC
79 second port on dual port adapters for failover purposes: if the link
[all …]
/freebsd-src/sys/dev/qlnx/qlnxe/
H A Decore_hsi_init_func.h2 * Copyright (c) 2017-2018 Cavium, Inc.
52 u8 num_active_tcs[MAX_NUM_PORTS] /* number of active TCs per port */;
56 * ETS per-TC init requirements
86 * NIG TC mapping for each priority
91 u8 valid /* indicates if the mapping entry is valid */;
103 * QM per-port init parameters
107 u8 active /* Indicates if this port is active */;
108 u8 active_phys_tcs /* Vector of valid bits for active TCs used by this port */;
109 u16 num_pbf_cmd_lines /* number of PBF command lines that can be used by this port */;
110 u16 num_btb_blocks /* number of BTB blocks that can be used by this port */;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/net/dsa/
H A Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
14 describing a port needs to have a valid phandle referencing the internal PHY
15 it is connected to. This is because there is no N:N mapping of port and PHY
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
17 the switch node and declare the phandle for the port, referencing the internal
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
[all …]
/freebsd-src/sys/ofed/drivers/infiniband/ulp/ipoib/
H A Dipoib.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
18 * - Redistributions of source code must retain the above
22 * - Redistributions in binary form must reproduce the above
202 u64 mapping[IPOIB_CM_RX_SG]; member
207 u64 mapping[IPOIB_CM_TX_SG]; member
212 u64 mapping[IPOIB_UD_RX_SG]; member
217 u64 mapping[IPOIB_UD_TX_SG]; member
239 * - Put the QP in the Error State
240 * - Wait for the Affiliated Asynchronous Last WQE Reached Event;
[all …]
/freebsd-src/sys/contrib/ncsw/inc/flib/
H A Dfsl_fman_port.h2 * Copyright 2008-2013 Freescale Semiconductor Inc.
137 /** @Description General port defines */
148 /** @Collection FM Port Register Map */
150 /** @Description BMI Rx port register map */
175 uint32_t reserved0074[0x2]; /**< (0x074-0x07C) */
179 /**< Buffer Manager pool Information-*/
181 /**< Allocate Counter-*/
183 /**< 0x130/0x140 - 0x15F reserved -*/
207 uint32_t fmbm_rdbg; /**< Rx Debug-*/
210 /** @Description BMI Tx port register map */
[all …]
/freebsd-src/sys/arm/ti/cpsw/
H A Dif_cpsw.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
36 * and in the TMS320C6452 3 Port Switch Ethernet Subsystem TRM.
38 * It is basically a single Ethernet port (port 0) wired internally to
39 * a 3-port stor
734 cpsw_get_fdt_data(struct cpsw_softc * sc,int port) cpsw_get_fdt_data() argument
1605 int nsegs, port, removed; cpsw_rx_dequeue() local
2728 char port[16]; cpsw_add_sysctls() local
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/display/ti/
H A Dti,am65x-dss.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/display/ti/ti,am65x-dss.yaml#
6 $schema: http://devicetree.org/meta-schema
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/freebsd-src/sys/dev/mii/
H A Dmiidevs3 /*-
35 * For a complete list see http://standards-oui.ieee.org/
39 * IEEE 802.3u-1995, subclause 22.2.4.3.1, figure 22-12, depicts the right
40 * mapping; the bit positions are defined in IEEE 802-1990, figure 5.2.
41 * (There is a formal 802.3 interpretation, number 1-07/98 of July 09 1998,
44 * If a vendor uses a different mapping, an "xx" prefixed OUI is defined here
68 oui PMCSIERRA 0x00e004 PMC-Sierra
109 oui xxPMCSIERRA 0x0009c0 PMC-Sierra
110 oui xxPMCSIERRA2 0x009057 PMC-Sierra
133 model yyAMD 79C972_10T 0x0001 Am79C972 internal 10BASE-T interface
[all …]
/freebsd-src/sys/dev/sfxge/common/
H A Def10_nic.c1 /*-
2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
52 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_assignment()
53 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_assignment()
54 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_assignment()
98 EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON || in efx_mcdi_get_port_modes()
99 enp->en_family == EFX_FAMILY_MEDFORD || in efx_mcdi_get_port_modes()
100 enp->en_family == EFX_FAMILY_MEDFORD2); in efx_mcdi_get_port_modes()
161 efx_port_t *epp = &(enp->en_port); in ef10_nic_get_port_mode_bandwidth()
171 /* No port mode info available. */ in ef10_nic_get_port_mode_bandwidth()
[all …]
/freebsd-src/sys/contrib/device-tree/src/mips/cavium-octeon/
H A Docteon_3xxx.dts1 // SPDX-License-Identifier: GPL-2.0
6 * use. Because of this, it contains a super-set of the available
15 phy0: ethernet-phy@0 {
17 marvell,reg-init =
18 /* Fix rx and tx clock transition timing */
21 <3 0x11 0 0x442a>, /* Reg 3,17 <- 0442a */
22 /* irq, blink-activity, blink-link */
23 <3 0x10 0 0x0242>; /* Reg 3,16 <- 0x0242 */
27 phy1: ethernet-phy@1 {
29 marvell,reg-init =
[all …]
/freebsd-src/contrib/wireguard-tools/man/
H A Dwg.84 wg - set and retrieve configuration of WireGuard interfaces
29 utility provides a series of sub-commands for changing WireGuard-specific
34 Sub-commands that take an INTERFACE must be passed a WireGuard interface.
39-key\fP | \fIprivate-key\fP | \fIlisten-port\fP | \fIfwmark\fP | \fIpeers\fP | \fIpreshared-keys\f…
46 newlines and tabs, meant to be used in scripts. For this script-friendly display,
49 the first contains in order separated by tab: private-key, public-key, listen-port,
51 by tab: public-key, preshared-key, endpoint, allowed-ips, latest-handshake,
52 transfer-rx, transfer-tx, persistent-keepalive.
58-port\fP \fI<port>\fP] [\fIfwmark\fP \fI<fwmark>\fP] [\fIprivate-key\fP \fI<file-path>\fP] [\fIpee…
61 for a peer, that peer is removed, not configured. If \fIlisten-port\fP
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsm8450-hdk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/iio/qcom,spmi-adc7-pm835
[all...]
/freebsd-src/lib/libnetmap/
H A Dlibnetmap.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 /* if thread-safety is not needed, define LIBNETMAP_NOTHREADSAFE before including
47 * A port open specification (portspec for brevity) has the following syntax
71 * same memory region as the subsystem:indentifier1 port.
78 * -NN bind individual NIC ring pair
79 * @NN open the port in the NN memory region
83 * z zero copy monitor (both tx and rx)
84 * t monitor tx side (copy monitor)
87 * T bind only TX ring(s)
[all …]

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