Home
last modified time | relevance | path

Searched +full:sram +full:- +full:supply (Results 1 – 25 of 43) sorted by relevance

12

/freebsd-src/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
10 /dts-v1/;
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
20 compatible = "mediatek,mt8365-ev
[all...]
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-suppl
[all...]
H A Dmt8173-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 chassis-type = "embedded";
14 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
31 compatible = "hdmi-connector";
37 remote-endpoin
[all...]
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r6
[all...]
H A Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulato
[all...]
H A Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-leve
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/cpufreq/
H A Dcpufreq-mediatek.txt5 - clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
6 - clock-names: Should contain the following:
7 "cpu" - The multiplexer for clock input of CPU cluster.
8 "intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
11 Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
13 - operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
15 - proc-supply: Regulator for Vproc of CPU cluster.
18 - sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
23 - mediatek,cci:
30 - #cooling-cells:
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/gpu/
H A Darm,mali-bifrost.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ro
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/interconnect/
H A Dmediatek,cci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jia-Wei Chang <jia-wei.chang@mediatek.com>
11 - Johnson Wang <johnson.wang@mediatek.com>
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
26 - description:
28 - description:
33 clock-names:
[all …]
/freebsd-src/share/man/man4/
H A Dhifn.437 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
59 SHA1, and SHA1-HMAC operations for
70 will also supply data to the kernel
79 .Bl -tag -width namenamenamena -offset indent
82 Came as 128KB SRAM model, or 2MB DRAM model.
84 Reference board with 512KB SRAM.
86 Comes with 512KB SRAM.
87 .It XL-Crypt
91 Supports the most IPsec sessions, with 1MB SRAM.
[all …]
H A Dds1307.430 .Nd 64 x 8, serial, i2c real-time clock (RTC)
38 serial real-time clock (RTC) is a low-power, full binary-coded decimal (BCD)
39 clock/calendar plus 56 bytes of NV SRAM.
43 has a built-in power-sense circuit that detects power failures and
44 automatically switches to the backup supply.
45 Timekeeping operation continues while the part operates from the backup supply.
52 .Bd -litera
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/st/
H A Dste-dbx5x0.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/clock/ste-db8500-clkout.h>
9 #include <dt-bindings/reset/stericsson,db8500-prcc-reset.h>
10 #include <dt-bindings/mfd/dbx500-prcmu.h>
11 #include <dt-bindings/arm/ux500_pm_domains.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/thermal/thermal.h>
16 #address-cells = <1>;
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nspire/
H A Dnspire.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&intc>;
12 #address-cells = <1>;
13 #size-cells = <0>;
16 compatible = "arm,arm926ej-
26 sram: sram@a4000000 { global() label
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4210-universal_c210.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
19 chassis-type = "handset";
35 stdout-path = "serial2:115200n8";
39 fixed-rate-clocks {
41 compatible = "samsung,clock-xxti";
42 clock-frequency = <0>;
46 compatible = "samsung,clock-xusbxti";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx27-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
11 compatible = "phytec,imx27-pcm038", "fsl,imx27";
18 reg_3v3: regulator-0 {
19 compatible = "regulator-fixed";
20 regulator-name = "3V3";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
25 reg_5v0: regulator-1 {
26 compatible = "regulator-fixed";
[all …]
H A Dimx6q.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6q-pinfunc.h"
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "arm,cortex-a9";
23 next-level-cache = <&L2>;
24 operating-points = <
32 fsl,soc-operating-points = <
33 /* ARM kHz SOC-PU uV */
[all …]
H A Dimx6dl.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/irq.h>
6 #include "imx6dl-pinfunc.h"
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
22 next-level-cache = <&L2>;
23 operating-points = <
29 fsl,soc-operating-points = <
30 /* ARM kHz SOC-PU uV */
[all …]
H A Dimx7d-smegw01.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 compatible = "storopack,imx7d-smegw01", "fsl,imx7d";
26 stdout-path = &uart1;
34 reg_lte_on: regulator-lte-on {
35 compatible = "regulator-fixed";
36 pinctrl-names = "default";
37 pinctrl-0 = <&pinctrl_lte_on>;
38 regulator-min-microvolt = <3300000>;
[all …]
/freebsd-src/sys/contrib/device-tree/Bindings/power/
H A Drockchip-io-domain.txt1 Rockchip SRAM for IO Voltage Domains:
2 -------------------------------------
9 - If the regulator hooked up to a pin like SDMMC0_VDD is 3.3V then
18 - any logic for deciding what voltage we should set regulators to
19 - any logic for deciding whether regulators (or internal SoC blocks)
33 - compatible: should be one of:
34 - "rockchip,px30-io-voltage-domain" for px30
35 - "rockchip,px30-pmu-io-voltage-domain" for px30 pmu-domains
36 - "rockchip,rk3188-io-voltage-domain" for rk3188
37 - "rockchip,rk3228-io-voltage-domain" for rk3228
[all …]
H A Drockchip-io-domain.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SRAM fo
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-apq8064-asus-nexus7-flo.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/gpio/gpio.h>
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include "qcom-apq8064-v2.0.dtsi"
12 compatible = "asus,nexus7-fl
[all...]
/freebsd-src/sys/contrib/device-tree/Bindings/net/
H A Dgpmc-eth.txt4 General-Purpose Memory Controller can be used to connect Pseudo-SRAM devices
12 Documentation/devicetree/bindings/memory-controllers/omap-gpmc.txt
18 Child nodes need to specify the GPMC bus address width using the "bank-width"
20 specify the I/O registers address width. Even when the GPMC has a maximum 16-bit
21 address width, it supports devices with 32-bit word registers.
23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;".
26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit
27 and 16-bit devices and so must be either 1 or 2 bytes.
28 - compatible: Compatible string property for the ethernet child device.
29 - gpmc,cs-on-ns: Chip-select assertion time
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/nxp/lpc/
H A Dlpc4350-hitex-eval.dts9 * Released under the terms of 3-clause BSD License
13 /dts-v1/;
18 #include "dt-bindings/input/input.h"
19 #include "dt-bindings/gpio/gpio.h"
23 compatible = "hitex,lpc4350-eval-board", "nxp,lpc4350";
33 stdout-path = &uart0;
42 compatible = "gpio-keys-polled";
43 poll-interval = <100>;
97 compatible = "gpio-leds";
102 linux,default-trigger = "heartbeat";
[all …]
/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controlle
[all...]
/freebsd-src/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-inspur-fp5280g2.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
3 #include "aspeed-g5.dtsi"
4 #include <dt-bindings/gpio/aspeed-gpio.h>
5 #include <dt-bindings/leds/leds-pca955x.h>
6 #include <dt-binding
[all...]

12