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/freebsd-src/sys/contrib/device-tree/Bindings/mux/
H A Dmux-consumer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mux/mux-consumer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Peter Rosin <peda@axentia.se>
13 Mux controller consumers should specify a list of mux controllers that they
14 want to use with a property containing a 'mux-ctrl-list':
16 mux-ctrl-list ::= <single-mux-ctrl> [mux-ctrl-list]
17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier]
18 mux-ctrl-phandle : phandle to mux controller node
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H A Dmux-controller.txt4 A multiplexer (or mux) controller will have one, or several, consumer devices
5 that uses the mux controller. Thus, a mux controller can possibly control
7 multiplexer needed by each consumer, but a single mux controller can of course
8 control several multiplexers for a single consumer.
10 A mux controller provides a number of states to its consumers, and the state
11 space is a simple zero-based enumeration. I.e. 0-1 for a 2-way multiplexer,
12 0-7 for an 8-way multiplexer, etc.
16 ---------
18 Mux controller consumers should specify a list of mux controllers that they
19 want to use with a property containing a 'mux-ctrl-list':
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/freebsd-src/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sra
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H A Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
9 serdes_refclk: serdes-refclk {
10 #clock-cells = <0>;
11 compatible = "fixed-clock";
17 compatible = "mmio-sra
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H A Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/phy/phy-ti.h>
9 #include <dt-binding
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H A Dk3-am64-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-t
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H A Dk3-j721s2-main.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/phy/phy-cadence.h>
9 #include <dt-bindings/phy/phy-t
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/freebsd-src/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-gxl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "meson-gx.dtsi"
8 #include <dt-bindings/clock/gxbb-clkc.h>
9 #include <dt-bindings/clock/gxbb-aoclkc.h>
10 #include <dt-bindings/gpio/meson-gx
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H A Dmeson-g12-common.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/phy/phy.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/g12a-clkc.h>
9 #include <dt-bindings/clock/g12a-aoclkc.h>
10 #include <dt-binding
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H A Dmeson-axg.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/axg-aoclkc.h>
7 #include <dt-bindings/clock/axg-audio-clkc.h>
8 #include <dt-bindings/clock/axg-clk
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/davinci/
H A Dda850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
20 #address-cell
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/freebsd-src/sys/dev/sound/pci/
H A Des137x.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause AND BSD-4-Clause
30 /*-
128 #define ES_BLK_ALIGN (~(ES_BLK_MIN - 1))
148 * 32bit Ensoniq Configuration (es->escf
223 uint32_t ctrl; global() member
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/freebsd-src/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap3-pandora-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <dt-bindings/input/input.h>
14 cpu0-supply = <&vcc>;
29 #clock-cells = <0>;
30 compatible = "fixed-clock";
31 clock-frequency = <26000000>;
35 compatible = "connector-analog-tv";
40 remote-endpoint = <&venc_out>;
45 gpio-leds {
47 compatible = "gpio-leds";
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H A Dam335x-guardian.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "bosch,am335x-guardian", "ti,am33xx";
17 stdout-pat
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H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
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/freebsd-src/usr.sbin/inetd/
H A Dinetd.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
33 * Inetd - Internet super-server
35 * This program invokes all internet services as needed. Connection-oriented
46 * out. The first type of server is said to be ``multi-threaded'';
47 * the second type of server ``single-threaded''.
60 * wait/nowait single-threaded/multi-threaded
61 * user[:group][/login-class] user/group/login-class to run daemon as
66 * RFC1078-based tcpmux internal service. Tcpmux listens on port 1 for
77 * because they do not have a well-known port and hence cannot listen
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/freebsd-src/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300reg.h32 /* MAC Control Register - only write values of 1 have effect */
37 #define AR_CR_SWI 0x00000040 // One-shot software interrupt
47 #define AR_CFG_AP_ADHOC_INDICATION 0x00000020 // AP/adhoc indication (0-AP 1-Adhoc)
55 /* Rx DMA Data Buffer Pointer Threshold - High and Low Priority register */
124 #define AR_RXCFG_ZLFDMA 0x00000010 // Enable DMA of zero-length frame
168 #define AR_MACMISC_DMA_OBS 0x000001E0 // Mask for DMA observation bus mux select
169 #define AR_MACMISC_DMA_OBS_S 5 // Shift for DMA observation bus mux select
179 #define AR_MACMISC_MISC_OBS 0x00000E00 // Mask for MISC observation bus mux select
180 #define AR_MACMISC_MISC_OBS_S 9 // Shift for MISC observation bus mux select
181 #define AR_MACMISC_MISC_OBS_BUS_LSB 0x00007000 // Mask for MAC observation bus mux select (lsb)
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/freebsd-src/sys/dev/bhnd/
H A Dbhnd_ids.h1 /*-
2 * SPDX-License-Identifier: ISC
4 * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
5 * Copyright (c) 1999-2015, Broadcom Corporation
9 * with the dd-wrt project, and the hndsoc.h header distributed with Broadcom's
30 * JEDEC JEP-106 Core Vendor IDs
32 * These are the JEDEC JEP-106 manufacturer ID representions (with ARM's
33 * non-standard 4-bit continutation code), as used in ARM's PrimeCell
38 * will need to convert bus-specific vendor IDs to their BHND_MFGID
39 * JEP-106 equivalents.
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/freebsd-src/sys/dev/e1000/
H A De1000_regs.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
38 #define E1000_CTRL 0x00000 /* Device Control - RW */
39 #define E1000_CTRL_DUP 0x00004 /* Device Control Duplicate (Shadow) - RW */
40 #define E1000_STATUS 0x00008 /* Device Status - RO */
41 #define E1000_EECD 0x00010 /* EEPROM/Flash Control - RW */
42 #define E1000_EERD 0x00014 /* EEPROM Read - RW */
43 #define E1000_CTRL_EXT 0x00018 /* Extended Device Control - RW */
44 #define E1000_FLA 0x0001C /* Flash Access - RW */
45 #define E1000_MDIC 0x00020 /* MDI Control - RW */
[all …]
/freebsd-src/sys/dev/vt/
H A Dvt_core.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
124 #define VT_UNIT(vw) ((vw)->vw_device->vd_unit * VT_MAXWINDOWS + \
125 (vw)->vw_number)
136 static VT_SYSCTL_INT(slow_down, 0, "Non-zero make console slower and synchronous.");
144 "See kbdmap(5) to configure (typically Ctrl
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/freebsd-src/contrib/wpa/src/common/
H A Dqca-vendor.h3 * Copyright (c) 2014-2017, Qualcomm Atheros, Inc.
4 * Copyright (c) 2018-2020, The Linux Foundation
5 * Copyright (c) 2021-2023, Qualcomm Innovation Center, Inc.
28 * enum qca_radiotap_vendor_ids - QCA radiotap vendor namespace IDs
41 * Global NSS configuration - Applies to all bands (2.4 GHz and 5/6 GHz)
62 * Per band NSS configuration - Applies to the 2.4 GHz or 5/6 GHz band
79 * Global chain configuration - Applies to all bands (2.4 GHz and 5/6 GHz)
96 * Per band chain configuration - Applies to the 2.4 GHz or 5/6 GHz band
117 * Case 1: CONFIG_NSS + CONFIG_TX_NSS/RX_NSS - Only CONFIG_NSS is applied
120 * Case 2: CONFIG_NSS + CONFIG_TX_NSS + CONFIG_RX_NSS - Sam
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/freebsd-src/sys/dev/bxe/
H A Decore_hsi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
145 /* Up to 16 bytes of NULL-terminated string */
164 (if multiple found, priority order is: NC-SI, UMP, IPMI) */
169 /* Use SPIO4 as an arbiter between: 0-NC_SI, 1-IPMI
170 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
172 /* Use SPIO4 as an arbiter between: 0-UMP, 1-IPMI
173 (can only be used when an add-in board, not BMC, pulls-down SPIO4) */
175 /* Use SPIO4 as an arbiter between: 0-NC-SI, 1-UMP
[all …]
/freebsd-src/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …s:R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header syn…
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
116 … (0x1<<9) // Fast back-to-back transaction ena…
128 … (0x1<<23) // Fast back-to-back capable. Not ap…
145 …l has_io_bar=0. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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