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/freebsd-src/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVSymbolicOperands.td331 defm Shader : CapabilityOperand<1, 0, 0, [], [Matrix]>;
332 defm Geometry : CapabilityOperand<2, 0, 0, [], [Shader]>;
333 defm Tessellation : CapabilityOperand<3, 0, 0, [], [Shader]>;
350 defm AtomicStorage : CapabilityOperand<21, 0, 0, [], [Shader]>;
354 defm ImageGatherExtended : CapabilityOperand<25, 0, 0, [], [Shader]>;
355 defm StorageImageMultisample : CapabilityOperand<27, 0, 0, [], [Shader]>;
356 defm UniformBufferArrayDynamicIndexing : CapabilityOperand<28, 0, 0, [], [Shader]>;
357 defm SampledImageArrayDymnamicIndexing : CapabilityOperand<29, 0, 0, [], [Shader]>;
358 defm ClipDistance : CapabilityOperand<32, 0, 0, [], [Shader]>;
359 defm CullDistance : CapabilityOperand<33, 0, 0, [], [Shader]>;
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H A DSPIRVModuleAnalysis.cpp43 cl::values(clEnumValN(SPIRV::Capability::Shader, "Shader",
44 "SPIR-V Shader capability")));
634 Capability::Shader}); in addOpTypeImageReqs()
675 addAvailableCaps({Capability::Shader, Capability::Linkage}); in addOpTypeImageReqs()
745 Reqs.addRequirements(SPIRV::Capability::Shader); in addInstrRequirements()
907 Reqs.addCapability(SPIRV::Capability::Shader); in addInstrRequirements()
914 Reqs.addCapability(SPIRV::Capability::Shader); in addInstrRequirements()
1184 // If we require capability Shader, then we can remove the requirement for
1185 // the BitInstructions capability, since Shader i
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H A DSPIRVCallLowering.cpp266 auto attribute = F.getFnAttribute("hlsl.shader"); in lowerFormalArguments()
269 "This entry point lacks mandatory hlsl.shader attribute."); in lowerFormalArguments()
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/Utils/
H A DAMDGPUPALMetadata.h56 // Set the rsrc1 register in the metadata for a particular shader stage.
61 // Set the rsrc2 register in the metadata for a particular shader stage.
82 // Set the entry point name for one shader.
87 // the shader stage to determine the number of vgprs to allocate.
98 // the shader stage to determine the number of sgprs to allocate.
111 // register for the shader stage to determine the amount of LDS to allocate.
116 // the shader stage to determine the number of vgprs to allocate.
122 // the shader stage to determine the number of sgprs to allocate.
127 // shader of the given calling convention.
193 // Reference (create if necessary) the node for the shader function
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H A DAMDGPUPALMetadata.cpp114 // with a constant offset to access any non-register shader-specific PAL
135 // Set the rsrc1 register in the metadata for a particular shader stage.
146 // Set the rsrc2 register in the metadata for a particular shader stage.
230 // Set the entry point name for one shader.
240 // register for the shader stage to determine the number of vgprs to in setScratchSize()
280 // the shader stage to determine the number of sgprs to allocate. in setWave32()
370 // shader of the given calling convention. in getRegisterName()
889 // Reference (create if necessary) the node for the shader functions map.
900 // Get (create if necessary) the shader functions map.
907 // Get (create if necessary) a function in the shader function
[all...]
/freebsd-src/contrib/llvm-project/llvm/lib/Target/DirectX/
H A DDXILShaderFlags.cpp1 //===- DXILShaderFlags.cpp - DXIL Shader Flags helper objects -------------===//
10 /// Shader Flags.
50 OS << formatv("; Shader Flags Value: {0:x8}\n;\n", FlagVal); in print()
53 OS << "; Note: shader requires additional functionality:\n"; in print()
82 INITIALIZE_PASS(ShaderFlagsAnalysisWrapper, "dx-shader-flag-analysis",
83 "DXIL Shader Flag Analysis", true, true)
H A DDXILMetadata.cpp113 // FIXME: support more shader profiles. in EntryProps()
123 Attribute EntryAttr = F.getFnAttribute("hlsl.shader"); in EntryProps()
156 // Add shader kind for lib entrys. in emitEntryPropsForEmptyEntry()
282 if (!F.hasFnAttribute("hlsl.shader")) in createEntryMD()
H A DDXILShaderFlags.h1 //===- DXILShaderFlags.h - DXIL Shader Flags helper objects ---------------===//
10 /// Shader Flags.
/freebsd-src/contrib/llvm-project/llvm/include/llvm/IR/
H A DCallingConv.h185 /// Used for Mesa vertex shaders, or AMDPAL last shader stage before
186 /// rasterization (vertex shader if tessellation and geometry are not in
187 /// use, or otherwise copy shader if one is needed).
212 /// Used for AMDPAL vertex shader if tessellation is in use.
215 /// Used for AMDPAL shader stage before geometry shader if geometry is in
216 /// use. So either the domain (= tessellation evaluation) shader if
217 /// tessellation is in use, or otherwise the vertex shader.
/freebsd-src/contrib/llvm-project/clang/include/clang/Basic/
H A DLangStandards.def232 HLSL, "High Level Shader Language",
236 HLSL, "High Level Shader Language 2015",
240 HLSL, "High Level Shader Language 2016",
244 HLSL, "High Level Shader Language 2017",
248 HLSL, "High Level Shader Language 2018",
252 HLSL, "High Level Shader Language 2021",
256 HLSL, "High Level Shader Language 202x",
/freebsd-src/sys/contrib/device-tree/Bindings/gpu/
H A Dvivante,gc.yaml35 - description: Shader clock (only required if GPU has feature PIPE_3D)
42 enum: [ bus, core, shader, reg ]
72 clock-names = "bus", "core", "shader";
/freebsd-src/contrib/llvm-project/llvm/include/llvm/BinaryFormat/
H A DDXContainerConstants.def16 // SHADER_FEATURE_FLAG(bit offset for the shader info flag, bit offset for DXIL module flag, name, description.
20 SHADER_FEATURE_FLAG(2, 16, UAVsAtEveryStage, "UAVs at every shader stage")
24 SHADER_FEATURE_FLAG(6, 7, DX11_1_ShaderExtensions, "Shader extensions for 11.1")
31 SHADER_FEATURE_FLAG(13, 9, ViewportAndRTArrayIndexFromAnyShaderFeedingRasterizer, "SV_RenderTargetArrayIndex or SV_ViewportArrayIndex from any shader feeding rasterizer")
50 SHADER_FEATURE_FLAG(31, 36, NextUnusedBit, "Next reserved shader flag bit (not a flag)")
H A DDXContainer.h43 "Shader kind out of expected range."); in getShaderStage()
53 IncludesSource = 1, // This flag indicates that the shader hash was computed
153 "Shader flag bits exceed enum size.");
/freebsd-src/sys/contrib/device-tree/Bindings/display/msm/
H A Dgpu.txt33 - zap-shader: For a5xx and a6xx devices this node contains a memory-region that
34 points to reserved memory to store the zap shader that can be used to help
36 - firmware-name: optional property of the 'zap-shader' node, listing the
152 zap-shader {
H A Dgpu.yaml105 zap-shader:
110 points to reserved memory to store the zap shader that can be used to
358 zap-shader {
/freebsd-src/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUExportClustering.cpp9 /// \file This file contains a DAG scheduling mutation to cluster shader
44 // Position exports should occur as soon as possible in the shader in sortChain()
H A DAMDGPUSetWavePriority.cpp11 /// the shader function until its last VMEM instructions to allow younger
171 // Raise the priority at the beginning of the shader. in runOnMachineFunction()
H A DR600FrameLowering.cpp29 // FIXME: We should only do this when the shader actually uses this in getFrameIndexReference()
H A DAMDGPUCallingConv.td80 // 32*4 + 4 is the minimum for a fetch shader consumer with 32 inputs.
113 // 32*4 + 4 is the minimum for a fetch shader with 32 outputs.
/freebsd-src/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm845-lg-judyp.dts37 zap-shader {
H A Dmsm8996-oneplus3t.dts32 zap-shader {
H A Dmsm8996-oneplus3.dts31 zap-shader {
H A Dsdm845-lg-judyln.dts51 zap-shader {
/freebsd-src/contrib/llvm-project/llvm/utils/TableGen/
H A DDXILEmitter.cpp57 ShaderStages; // shader stages to which this applies, empty for all.
58 DXILShaderModel ShaderModel; // minimum shader model required
59 DXILShaderModel ShaderModelTranslated; // minimum shader model required with
/freebsd-src/contrib/llvm-project/llvm/lib/Object/
H A DDXContainer.cpp199 // Fully parsing the PSVInfo requires knowing the shader kind which we read in parsePartOffsets()
411 // Hull shader: Input/Patch mapping table in parse()
421 // Domain Shader: Patch/Output mapping table in parse()

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